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x86/gpu: reserve ICL's graphics stolen memory
ICL changes the registers and addresses to 64 bits.
I also briefly looked at implementing an u64 version of the PCI config
read functions, but I concluded this wouldn't be trivial, so it's not
worth doing it for a single user that can't have any racing problems
while reading the register in two separate operations.
v2:
- Scrub the development (non-public) changelog (Joonas).
- Remove the i915.ko bits so this can be easily backported in order
to properly avoid stolen memory even on machines without i915.ko
(Joonas).
- CC stable for the reasons above.
Issue: VIZ-9250
CC: stable@vger.kernel.org
Cc: Ingo Molnar <mingo@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: x86@kernel.org
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Fixes: 412310019a ("drm/i915/icl: Add initial Icelake definitions.")
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180504203252.28048-1-paulo.r.zanoni@intel.com
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2 changed files with 21 additions and 1 deletions
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@ -95,7 +95,9 @@ extern struct resource intel_graphics_stolen_res;
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#define I845_TSEG_SIZE_512K (2 << 1)
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#define I845_TSEG_SIZE_1M (3 << 1)
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#define INTEL_BSM 0x5c
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#define INTEL_BSM 0x5c
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#define INTEL_GEN11_BSM_DW0 0xc0
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#define INTEL_GEN11_BSM_DW1 0xc4
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#define INTEL_BSM_MASK (-(1u << 20))
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#endif /* _I915_DRM_H_ */
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