From dc237cf8878993b94d357f3fd59db05862f13798 Mon Sep 17 00:00:00 2001 From: Santosh Mardi Date: Wed, 12 May 2021 17:10:51 +0530 Subject: [PATCH] ARM: dts: qcom: update mapping table for dcvvs nodes in blair target Update mapping table for memlat and compute dcvs nodes used for L3 and DDR frequency scaling for blair target. Change-Id: Ieba82318e7b7a4938285fcba3272f2afc7140715 --- qcom/blair.dtsi | 59 ++++++++++++++++++++++--------------------------- 1 file changed, 27 insertions(+), 32 deletions(-) diff --git a/qcom/blair.dtsi b/qcom/blair.dtsi index 4ef0dd0b6c34..c5d6368b1169 100644 --- a/qcom/blair.dtsi +++ b/qcom/blair.dtsi @@ -1434,27 +1434,27 @@ cpu0_cpu_l3_tbl: qcom,cpu0-cpu-l3-tbl { qcom,core-dev-table = - < 710400 300000000 >, - < 940800 518400000 >, - < 1190400 748800000 >, - < 1478400 921600000 >, - < 1574400 1305600000 >, - < 1804800 1459000000 >; + < 691200 300000000 >, + < 940800 556800000 >, + < 1113600 768000000 >, + < 1516800 921600000 >, + < 1651200 1382400000 >, + < 1804800 1497600000 >; }; cpu6_cpu_l3_tbl: qcom,cpu6-cpu-l3-tbl { qcom,core-dev-table = - < 1017600 518400000 >, - < 1248000 748800000 >, - < 1536000 921600000 >, + < 940800 556800000 >, + < 1228800 768000000 >, + < 1516800 921600000 >, < 1651200 1171200000 >, - < 1804800 1305600000 >, - < 2035200 1459000000 >; + < 1900800 1382400000 >, + < 2054400 1497600000 >; }; - cpu0_memlat_cpugrp: qcom,cpu0-cpugrp { + cpu_memlat_cpugrp: qcom,cpu-cpugrp { compatible = "qcom,arm-memlat-cpugrp"; - qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5 &CPU6 &CPU7>; cpu0_cpu_l3_latmon: qcom,cpu0-cpu-l3-latmon { compatible = "qcom,arm-memlat-mon"; @@ -1510,10 +1510,10 @@ qcom,target-dev = <&cpu0_cpu_ddr_lat>; qcom,cachemiss-ev = <0x2A>; qcom,core-dev-table = - < 710400 MHZ_TO_MBPS( 300, 4) >, + < 691200 MHZ_TO_MBPS( 300, 4) >, < 940800 MHZ_TO_MBPS( 451, 4) >, - < 1190400 MHZ_TO_MBPS( 547, 4) >, - < 1478400 MHZ_TO_MBPS( 768, 4) >, + < 1113600 MHZ_TO_MBPS( 547, 4) >, + < 1516800 MHZ_TO_MBPS( 768, 4) >, < 1804800 MHZ_TO_MBPS( 1017, 4) >; }; @@ -1521,16 +1521,11 @@ compatible = "qcom,arm-compute-mon"; qcom,target-dev = <&cpu0_cpu_ddr_latfloor>; qcom,core-dev-table = - < 710400 MHZ_TO_MBPS( 300, 4) >, - < 1190400 MHZ_TO_MBPS( 451, 4) >, - < 1478400 MHZ_TO_MBPS( 547, 4) >, + < 691200 MHZ_TO_MBPS( 300, 4) >, + < 1113600 MHZ_TO_MBPS( 451, 4) >, + < 1516800 MHZ_TO_MBPS( 547, 4) >, < 1804800 MHZ_TO_MBPS( 768, 4) >; }; - }; - - cpu6_memlat_cpugrp: qcom,cpu6-cpugrp { - compatible = "qcom,arm-memlat-cpugrp"; - qcom,cpulist = <&CPU6 &CPU7>; cpu6_cpu_l3_latmon: qcom,cpu6-cpu-l3-latmon { compatible = "qcom,arm-memlat-mon"; @@ -1558,11 +1553,11 @@ qcom,target-dev = <&cpu6_cpu_ddr_lat>; qcom,cachemiss-ev = <0x2A>; qcom,core-dev-table = - < 1017600 MHZ_TO_MBPS( 547, 4) >, - < 1248000 MHZ_TO_MBPS(1017, 4) >, - < 1536000 MHZ_TO_MBPS(1555, 4) >, - < 1804800 MHZ_TO_MBPS(1804, 4) >, - < 2035200 MHZ_TO_MBPS(2092, 4) >; + < 940800 MHZ_TO_MBPS( 547, 4) >, + < 1228800 MHZ_TO_MBPS(1017, 4) >, + < 1516800 MHZ_TO_MBPS(1555, 4) >, + < 1900800 MHZ_TO_MBPS(1804, 4) >, + < 2054400 MHZ_TO_MBPS(2092, 4) >; }; cpu6_computemon: qcom,cpu6-computemon { @@ -1571,10 +1566,10 @@ qcom,core-dev-table = < 1248800 MHZ_TO_MBPS( 547, 4) >, < 1401600 MHZ_TO_MBPS( 768, 4) >, - < 1536000 MHZ_TO_MBPS(1017, 4) >, + < 1516800 MHZ_TO_MBPS(1017, 4) >, < 1651200 MHZ_TO_MBPS(1555, 4) >, - < 1804800 MHZ_TO_MBPS(1804, 4) >, - < 2035200 MHZ_TO_MBPS(2092, 4) >; + < 1900800 MHZ_TO_MBPS(1804, 4) >, + < 2054400 MHZ_TO_MBPS(2092, 4) >; }; };