From eceeb6d6c24b276ed7f0209f693dd4b30101d973 Mon Sep 17 00:00:00 2001 From: Andhavarapu Karthik Date: Mon, 18 Jan 2021 22:31:41 +0530 Subject: [PATCH] ARM: dts: msm: remove gcc ahb clock for yupik Clock drivers have moved GCC_DISP_AHB_CLK to their probe and kept it always ON, and are not registering this clock with the framework. Hence, removing GCC_DISP_AHB_CLK from display clock list. Change-Id: Ifc21194814275f65776c642777263d9d37da3637 --- display/yupik-sde-common.dtsi | 4 ++-- display/yupik-sde.dtsi | 3 +-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/display/yupik-sde-common.dtsi b/display/yupik-sde-common.dtsi index 2a106f69f8bc..ca5e68650d1b 100644 --- a/display/yupik-sde-common.dtsi +++ b/display/yupik-sde-common.dtsi @@ -10,8 +10,8 @@ "vbif_phys", "regdma_phys"; - clock-rate = <0 0 0 0 506666667 19200000 506666667 19200000>; - clock-max-rate = <0 0 0 0 608000000 19200000 608000000 + clock-rate = <0 0 0 506666667 19200000 506666667 19200000>; + clock-max-rate = <0 0 0 608000000 19200000 608000000 608000000>; /* interrupt config */ diff --git a/display/yupik-sde.dtsi b/display/yupik-sde.dtsi index 464d7c34968c..d3cefc88044b 100644 --- a/display/yupik-sde.dtsi +++ b/display/yupik-sde.dtsi @@ -47,7 +47,6 @@ &mdss_mdp { clocks = - <&gcc GCC_DISP_AHB_CLK>, <&gcc GCC_DISP_HF_AXI_CLK>, <&gcc GCC_DISP_SF_AXI_CLK>, <&dispcc DISP_CC_MDSS_AHB_CLK>, @@ -55,7 +54,7 @@ <&dispcc DISP_CC_MDSS_VSYNC_CLK>, <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, <&dispcc DISP_CC_MDSS_ROT_CLK>; - clock-names = "gcc_iface", "gcc_bus", "gcc_nrt_bus", + clock-names = "gcc_bus", "gcc_nrt_bus", "iface_clk", "core_clk", "vsync_clk", "lut_clk", "rot_clk";