mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-13 00:00:00 -04:00
staging: comedi: cb_pcidas64: fix forward declararions 4
Move `disable_plx_interrupts()`, `disable_ai_interrupts()`, `enable_ai_interrupts()`, `set_ai_fifo_segment_length()`, `set_ai_fifo_size()`, `ai_fifo_size()`, `load_ao_dma_buffer()`, and `load_ao_dma()`, and remove forward declarations of these functions. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ian Abbott
Greg Kroah-Hartman
parent
012e642c01
commit
dd379fa23f
1 changed files with 188 additions and 198 deletions
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@ -1151,16 +1151,6 @@ struct pcidas64_private {
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short ao_bounce_buffer[DAC_FIFO_SIZE];
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};
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static void disable_plx_interrupts(struct comedi_device *dev);
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static int set_ai_fifo_size(struct comedi_device *dev,
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unsigned int num_samples);
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static unsigned int ai_fifo_size(struct comedi_device *dev);
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static int set_ai_fifo_segment_length(struct comedi_device *dev,
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unsigned int num_entries);
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static void disable_ai_interrupts(struct comedi_device *dev);
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static void load_ao_dma(struct comedi_device *dev,
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const struct comedi_cmd *cmd);
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static unsigned int ai_range_bits_6xxx(const struct comedi_device *dev,
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unsigned int range_index)
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{
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@ -1251,6 +1241,57 @@ static void abort_dma(struct comedi_device *dev, unsigned int channel)
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spin_unlock_irqrestore(&dev->spinlock, flags);
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}
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static void disable_plx_interrupts(struct comedi_device *dev)
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{
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struct pcidas64_private *devpriv = dev->private;
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devpriv->plx_intcsr_bits = 0;
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writel(devpriv->plx_intcsr_bits,
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devpriv->plx9080_iobase + PLX_INTRCS_REG);
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}
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static void disable_ai_interrupts(struct comedi_device *dev)
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{
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struct pcidas64_private *devpriv = dev->private;
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unsigned long flags;
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spin_lock_irqsave(&dev->spinlock, flags);
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devpriv->intr_enable_bits &=
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~EN_ADC_INTR_SRC_BIT & ~EN_ADC_DONE_INTR_BIT &
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~EN_ADC_ACTIVE_INTR_BIT & ~EN_ADC_STOP_INTR_BIT &
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~EN_ADC_OVERRUN_BIT & ~ADC_INTR_SRC_MASK;
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writew(devpriv->intr_enable_bits,
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devpriv->main_iobase + INTR_ENABLE_REG);
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spin_unlock_irqrestore(&dev->spinlock, flags);
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DEBUG_PRINT("intr enable bits 0x%x\n", devpriv->intr_enable_bits);
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}
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static void enable_ai_interrupts(struct comedi_device *dev,
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const struct comedi_cmd *cmd)
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{
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const struct pcidas64_board *thisboard = comedi_board(dev);
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struct pcidas64_private *devpriv = dev->private;
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uint32_t bits;
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unsigned long flags;
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bits = EN_ADC_OVERRUN_BIT | EN_ADC_DONE_INTR_BIT |
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EN_ADC_ACTIVE_INTR_BIT | EN_ADC_STOP_INTR_BIT;
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/* Use pio transfer and interrupt on end of conversion
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* if TRIG_WAKE_EOS flag is set. */
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if (cmd->flags & TRIG_WAKE_EOS) {
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/* 4020 doesn't support pio transfers except for fifo dregs */
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if (thisboard->layout != LAYOUT_4020)
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bits |= ADC_INTR_EOSCAN_BITS | EN_ADC_INTR_SRC_BIT;
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}
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spin_lock_irqsave(&dev->spinlock, flags);
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devpriv->intr_enable_bits |= bits;
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writew(devpriv->intr_enable_bits,
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devpriv->main_iobase + INTR_ENABLE_REG);
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DEBUG_PRINT("intr enable bits 0x%x\n", devpriv->intr_enable_bits);
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spin_unlock_irqrestore(&dev->spinlock, flags);
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}
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/* initialize plx9080 chip */
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static void init_plx9080(struct comedi_device *dev)
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{
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@ -1343,15 +1384,6 @@ static void init_plx9080(struct comedi_device *dev)
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devpriv->plx9080_iobase + PLX_INTRCS_REG);
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}
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static void disable_plx_interrupts(struct comedi_device *dev)
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{
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struct pcidas64_private *devpriv = dev->private;
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devpriv->plx_intcsr_bits = 0;
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writel(devpriv->plx_intcsr_bits,
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devpriv->plx9080_iobase + PLX_INTRCS_REG);
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}
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static void disable_ai_pacing(struct comedi_device *dev)
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{
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struct pcidas64_private *devpriv = dev->private;
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@ -1370,6 +1402,72 @@ static void disable_ai_pacing(struct comedi_device *dev)
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devpriv->main_iobase + ADC_CONTROL0_REG);
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}
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static int set_ai_fifo_segment_length(struct comedi_device *dev,
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unsigned int num_entries)
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{
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const struct pcidas64_board *thisboard = comedi_board(dev);
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struct pcidas64_private *devpriv = dev->private;
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static const int increment_size = 0x100;
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const struct hw_fifo_info *const fifo = thisboard->ai_fifo;
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unsigned int num_increments;
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uint16_t bits;
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if (num_entries < increment_size)
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num_entries = increment_size;
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if (num_entries > fifo->max_segment_length)
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num_entries = fifo->max_segment_length;
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/* 1 == 256 entries, 2 == 512 entries, etc */
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num_increments = (num_entries + increment_size / 2) / increment_size;
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bits = (~(num_increments - 1)) & fifo->fifo_size_reg_mask;
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devpriv->fifo_size_bits &= ~fifo->fifo_size_reg_mask;
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devpriv->fifo_size_bits |= bits;
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writew(devpriv->fifo_size_bits,
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devpriv->main_iobase + FIFO_SIZE_REG);
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devpriv->ai_fifo_segment_length = num_increments * increment_size;
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DEBUG_PRINT("set hardware fifo segment length to %i\n",
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devpriv->ai_fifo_segment_length);
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return devpriv->ai_fifo_segment_length;
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}
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/* adjusts the size of hardware fifo (which determines block size for dma xfers) */
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static int set_ai_fifo_size(struct comedi_device *dev, unsigned int num_samples)
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{
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const struct pcidas64_board *thisboard = comedi_board(dev);
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unsigned int num_fifo_entries;
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int retval;
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const struct hw_fifo_info *const fifo = thisboard->ai_fifo;
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num_fifo_entries = num_samples / fifo->sample_packing_ratio;
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retval = set_ai_fifo_segment_length(dev,
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num_fifo_entries /
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fifo->num_segments);
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if (retval < 0)
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return retval;
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num_samples = retval * fifo->num_segments * fifo->sample_packing_ratio;
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DEBUG_PRINT("set hardware fifo size to %i\n", num_samples);
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return num_samples;
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}
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/* query length of fifo */
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static unsigned int ai_fifo_size(struct comedi_device *dev)
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{
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const struct pcidas64_board *thisboard = comedi_board(dev);
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struct pcidas64_private *devpriv = dev->private;
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return devpriv->ai_fifo_segment_length *
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thisboard->ai_fifo->num_segments *
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thisboard->ai_fifo->sample_packing_ratio;
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}
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static void init_stc_registers(struct comedi_device *dev)
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{
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const struct pcidas64_board *thisboard = comedi_board(dev);
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@ -2177,48 +2275,6 @@ static inline unsigned int dma_transfer_size(struct comedi_device *dev)
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return num_samples;
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}
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static void disable_ai_interrupts(struct comedi_device *dev)
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{
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struct pcidas64_private *devpriv = dev->private;
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unsigned long flags;
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spin_lock_irqsave(&dev->spinlock, flags);
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devpriv->intr_enable_bits &=
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~EN_ADC_INTR_SRC_BIT & ~EN_ADC_DONE_INTR_BIT &
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~EN_ADC_ACTIVE_INTR_BIT & ~EN_ADC_STOP_INTR_BIT &
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~EN_ADC_OVERRUN_BIT & ~ADC_INTR_SRC_MASK;
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writew(devpriv->intr_enable_bits,
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devpriv->main_iobase + INTR_ENABLE_REG);
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spin_unlock_irqrestore(&dev->spinlock, flags);
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DEBUG_PRINT("intr enable bits 0x%x\n", devpriv->intr_enable_bits);
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}
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static void enable_ai_interrupts(struct comedi_device *dev,
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const struct comedi_cmd *cmd)
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{
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const struct pcidas64_board *thisboard = comedi_board(dev);
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struct pcidas64_private *devpriv = dev->private;
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uint32_t bits;
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unsigned long flags;
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bits = EN_ADC_OVERRUN_BIT | EN_ADC_DONE_INTR_BIT |
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EN_ADC_ACTIVE_INTR_BIT | EN_ADC_STOP_INTR_BIT;
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/* Use pio transfer and interrupt on end of conversion
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* if TRIG_WAKE_EOS flag is set. */
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if (cmd->flags & TRIG_WAKE_EOS) {
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/* 4020 doesn't support pio transfers except for fifo dregs */
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if (thisboard->layout != LAYOUT_4020)
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bits |= ADC_INTR_EOSCAN_BITS | EN_ADC_INTR_SRC_BIT;
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}
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spin_lock_irqsave(&dev->spinlock, flags);
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devpriv->intr_enable_bits |= bits;
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writew(devpriv->intr_enable_bits,
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devpriv->main_iobase + INTR_ENABLE_REG);
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DEBUG_PRINT("intr enable bits 0x%x\n", devpriv->intr_enable_bits);
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spin_unlock_irqrestore(&dev->spinlock, flags);
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}
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static uint32_t ai_convert_counter_6xxx(const struct comedi_device *dev,
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const struct comedi_cmd *cmd)
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{
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@ -2930,6 +2986,77 @@ static void restart_ao_dma(struct comedi_device *dev)
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dma_start_sync(dev, 0);
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}
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static unsigned int load_ao_dma_buffer(struct comedi_device *dev,
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const struct comedi_cmd *cmd)
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{
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struct pcidas64_private *devpriv = dev->private;
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unsigned int num_bytes, buffer_index, prev_buffer_index;
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unsigned int next_bits;
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buffer_index = devpriv->ao_dma_index;
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prev_buffer_index = prev_ao_dma_index(dev);
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DEBUG_PRINT("attempting to load ao buffer %i (0x%llx)\n", buffer_index,
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(unsigned long long)devpriv->ao_buffer_bus_addr[
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buffer_index]);
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num_bytes = comedi_buf_read_n_available(dev->write_subdev->async);
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if (num_bytes > DMA_BUFFER_SIZE)
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num_bytes = DMA_BUFFER_SIZE;
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if (cmd->stop_src == TRIG_COUNT && num_bytes > devpriv->ao_count)
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num_bytes = devpriv->ao_count;
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num_bytes -= num_bytes % bytes_in_sample;
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if (num_bytes == 0)
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return 0;
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DEBUG_PRINT("loading %i bytes\n", num_bytes);
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num_bytes = cfc_read_array_from_buffer(dev->write_subdev,
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devpriv->
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ao_buffer[buffer_index],
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num_bytes);
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devpriv->ao_dma_desc[buffer_index].transfer_size =
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cpu_to_le32(num_bytes);
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/* set end of chain bit so we catch underruns */
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next_bits = le32_to_cpu(devpriv->ao_dma_desc[buffer_index].next);
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next_bits |= PLX_END_OF_CHAIN_BIT;
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devpriv->ao_dma_desc[buffer_index].next = cpu_to_le32(next_bits);
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/* clear end of chain bit on previous buffer now that we have set it
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* for the last buffer */
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next_bits = le32_to_cpu(devpriv->ao_dma_desc[prev_buffer_index].next);
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next_bits &= ~PLX_END_OF_CHAIN_BIT;
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devpriv->ao_dma_desc[prev_buffer_index].next = cpu_to_le32(next_bits);
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devpriv->ao_dma_index = (buffer_index + 1) % AO_DMA_RING_COUNT;
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devpriv->ao_count -= num_bytes;
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return num_bytes;
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}
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static void load_ao_dma(struct comedi_device *dev, const struct comedi_cmd *cmd)
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{
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struct pcidas64_private *devpriv = dev->private;
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unsigned int num_bytes;
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unsigned int next_transfer_addr;
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void __iomem *pci_addr_reg =
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devpriv->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
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unsigned int buffer_index;
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do {
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buffer_index = devpriv->ao_dma_index;
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/* don't overwrite data that hasn't been transferred yet */
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next_transfer_addr = readl(pci_addr_reg);
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if (next_transfer_addr >=
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devpriv->ao_buffer_bus_addr[buffer_index] &&
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next_transfer_addr <
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devpriv->ao_buffer_bus_addr[buffer_index] +
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DMA_BUFFER_SIZE)
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return;
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num_bytes = load_ao_dma_buffer(dev, cmd);
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} while (num_bytes >= DMA_BUFFER_SIZE);
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}
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static void handle_ao_interrupt(struct comedi_device *dev,
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unsigned short status, unsigned int plx_status)
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{
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@ -3166,77 +3293,6 @@ static void set_dac_interval_regs(struct comedi_device *dev,
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devpriv->main_iobase + DAC_SAMPLE_INTERVAL_UPPER_REG);
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}
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static unsigned int load_ao_dma_buffer(struct comedi_device *dev,
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const struct comedi_cmd *cmd)
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{
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struct pcidas64_private *devpriv = dev->private;
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unsigned int num_bytes, buffer_index, prev_buffer_index;
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unsigned int next_bits;
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buffer_index = devpriv->ao_dma_index;
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prev_buffer_index = prev_ao_dma_index(dev);
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DEBUG_PRINT("attempting to load ao buffer %i (0x%llx)\n", buffer_index,
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(unsigned long long)devpriv->ao_buffer_bus_addr[
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buffer_index]);
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num_bytes = comedi_buf_read_n_available(dev->write_subdev->async);
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if (num_bytes > DMA_BUFFER_SIZE)
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num_bytes = DMA_BUFFER_SIZE;
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if (cmd->stop_src == TRIG_COUNT && num_bytes > devpriv->ao_count)
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num_bytes = devpriv->ao_count;
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num_bytes -= num_bytes % bytes_in_sample;
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if (num_bytes == 0)
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return 0;
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DEBUG_PRINT("loading %i bytes\n", num_bytes);
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num_bytes = cfc_read_array_from_buffer(dev->write_subdev,
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devpriv->
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ao_buffer[buffer_index],
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num_bytes);
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devpriv->ao_dma_desc[buffer_index].transfer_size =
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cpu_to_le32(num_bytes);
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/* set end of chain bit so we catch underruns */
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next_bits = le32_to_cpu(devpriv->ao_dma_desc[buffer_index].next);
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next_bits |= PLX_END_OF_CHAIN_BIT;
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devpriv->ao_dma_desc[buffer_index].next = cpu_to_le32(next_bits);
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/* clear end of chain bit on previous buffer now that we have set it
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* for the last buffer */
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next_bits = le32_to_cpu(devpriv->ao_dma_desc[prev_buffer_index].next);
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next_bits &= ~PLX_END_OF_CHAIN_BIT;
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devpriv->ao_dma_desc[prev_buffer_index].next = cpu_to_le32(next_bits);
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devpriv->ao_dma_index = (buffer_index + 1) % AO_DMA_RING_COUNT;
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devpriv->ao_count -= num_bytes;
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return num_bytes;
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}
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static void load_ao_dma(struct comedi_device *dev, const struct comedi_cmd *cmd)
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{
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struct pcidas64_private *devpriv = dev->private;
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unsigned int num_bytes;
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unsigned int next_transfer_addr;
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void __iomem *pci_addr_reg =
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devpriv->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
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unsigned int buffer_index;
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do {
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buffer_index = devpriv->ao_dma_index;
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/* don't overwrite data that hasn't been transferred yet */
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next_transfer_addr = readl(pci_addr_reg);
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if (next_transfer_addr >=
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devpriv->ao_buffer_bus_addr[buffer_index] &&
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next_transfer_addr <
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devpriv->ao_buffer_bus_addr[buffer_index] +
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DMA_BUFFER_SIZE)
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return;
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num_bytes = load_ao_dma_buffer(dev, cmd);
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} while (num_bytes >= DMA_BUFFER_SIZE);
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}
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static int prep_ao_dma(struct comedi_device *dev, const struct comedi_cmd *cmd)
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{
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struct pcidas64_private *devpriv = dev->private;
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@ -3839,72 +3895,6 @@ static int eeprom_read_insn(struct comedi_device *dev,
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return 1;
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}
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/* adjusts the size of hardware fifo (which determines block size for dma xfers) */
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static int set_ai_fifo_size(struct comedi_device *dev, unsigned int num_samples)
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{
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const struct pcidas64_board *thisboard = comedi_board(dev);
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unsigned int num_fifo_entries;
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int retval;
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const struct hw_fifo_info *const fifo = thisboard->ai_fifo;
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num_fifo_entries = num_samples / fifo->sample_packing_ratio;
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retval = set_ai_fifo_segment_length(dev,
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num_fifo_entries /
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fifo->num_segments);
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if (retval < 0)
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return retval;
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num_samples = retval * fifo->num_segments * fifo->sample_packing_ratio;
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DEBUG_PRINT("set hardware fifo size to %i\n", num_samples);
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return num_samples;
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}
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/* query length of fifo */
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static unsigned int ai_fifo_size(struct comedi_device *dev)
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{
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const struct pcidas64_board *thisboard = comedi_board(dev);
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struct pcidas64_private *devpriv = dev->private;
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return devpriv->ai_fifo_segment_length *
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thisboard->ai_fifo->num_segments *
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thisboard->ai_fifo->sample_packing_ratio;
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}
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static int set_ai_fifo_segment_length(struct comedi_device *dev,
|
||||
unsigned int num_entries)
|
||||
{
|
||||
const struct pcidas64_board *thisboard = comedi_board(dev);
|
||||
struct pcidas64_private *devpriv = dev->private;
|
||||
static const int increment_size = 0x100;
|
||||
const struct hw_fifo_info *const fifo = thisboard->ai_fifo;
|
||||
unsigned int num_increments;
|
||||
uint16_t bits;
|
||||
|
||||
if (num_entries < increment_size)
|
||||
num_entries = increment_size;
|
||||
if (num_entries > fifo->max_segment_length)
|
||||
num_entries = fifo->max_segment_length;
|
||||
|
||||
/* 1 == 256 entries, 2 == 512 entries, etc */
|
||||
num_increments = (num_entries + increment_size / 2) / increment_size;
|
||||
|
||||
bits = (~(num_increments - 1)) & fifo->fifo_size_reg_mask;
|
||||
devpriv->fifo_size_bits &= ~fifo->fifo_size_reg_mask;
|
||||
devpriv->fifo_size_bits |= bits;
|
||||
writew(devpriv->fifo_size_bits,
|
||||
devpriv->main_iobase + FIFO_SIZE_REG);
|
||||
|
||||
devpriv->ai_fifo_segment_length = num_increments * increment_size;
|
||||
|
||||
DEBUG_PRINT("set hardware fifo segment length to %i\n",
|
||||
devpriv->ai_fifo_segment_length);
|
||||
|
||||
return devpriv->ai_fifo_segment_length;
|
||||
}
|
||||
|
||||
/* Allocate and initialize the subdevice structures.
|
||||
*/
|
||||
static int setup_subdevices(struct comedi_device *dev)
|
||||
|
|
|
|||
Loading…
Reference in a new issue