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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (22 commits) acpiphp: Link-time error for PCI Hotplug shpchp: cleanup shpchp.h shpchp: remove shpchprm_get_physical_slot_number shpchp: cleanup struct controller shpchp: remove unnecessary struct php_ctlr PCI: ATI sb600 sata quirk PCI legacy resource fix PCI: don't export device IDs to userspace PCI: Be a bit defensive in quirk_nvidia_ck804() so we don't risk dereferencing a NULL pdev. PCI: Fix multiple problems with VIA hardware PCI: Only check the HT capability bits in mpic.c PCI: Use pci_find_ht_capability() in drivers/pci/quirks.c PCI: Add #defines for Hypertransport MSI fields PCI: Use pci_find_ht_capability() in drivers/pci/htirq.c PCI: Add pci_find_ht_capability() for finding Hypertransport capabilities PCI: Create __pci_bus_find_cap_start() from __pci_bus_find_cap() pci: Introduce pci_find_present PCI: pcieport-driver: remove invalid warning message rpaphp: compiler warning cleanup PCI quirks: remove redundant check ...
This commit is contained in:
Linus Torvalds
commit
de9b2fccb6
23 changed files with 537 additions and 606 deletions
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@ -35,6 +35,9 @@
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VMLINUX_SYMBOL(__start_pci_fixups_enable) = .; \
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*(.pci_fixup_enable) \
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VMLINUX_SYMBOL(__end_pci_fixups_enable) = .; \
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VMLINUX_SYMBOL(__start_pci_fixups_resume) = .; \
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*(.pci_fixup_resume) \
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VMLINUX_SYMBOL(__end_pci_fixups_resume) = .; \
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} \
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\
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/* RapidIO route ops */ \
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@ -119,7 +119,6 @@ header-y += nfs4_mount.h
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header-y += nfs_mount.h
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header-y += oom.h
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header-y += param.h
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header-y += pci_ids.h
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header-y += pci_regs.h
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header-y += personality.h
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header-y += pfkeyv2.h
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@ -162,7 +161,6 @@ header-y += vt.h
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header-y += wireless.h
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header-y += xattr.h
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header-y += x25.h
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header-y += zorro_ids.h
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unifdef-y += acct.h
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unifdef-y += adb.h
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@ -91,6 +91,9 @@ struct resource_list {
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#define IORESOURCE_ROM_COPY (1<<2) /* ROM is alloc'd copy, resource field overlaid */
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#define IORESOURCE_ROM_BIOS_COPY (1<<3) /* ROM is BIOS copy, resource field overlaid */
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/* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */
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#define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */
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/* PC/ISA/whatever - the normal PC address spaces: IO and memory */
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extern struct resource ioport_resource;
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extern struct resource iomem_resource;
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@ -20,9 +20,6 @@
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/* Include the pci register defines */
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#include <linux/pci_regs.h>
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/* Include the ID list */
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#include <linux/pci_ids.h>
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/*
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* The PCI interface treats multi-function devices as independent
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* devices. The slot/function address of each device is encoded
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@ -54,6 +51,9 @@
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#include <asm/atomic.h>
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#include <linux/device.h>
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/* Include the ID list */
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#include <linux/pci_ids.h>
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/* File state for mmap()s on /proc/bus/pci/X/Y */
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enum pci_mmap_state {
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pci_mmap_io,
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@ -396,6 +396,21 @@ struct pci_driver {
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*/
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#define pci_module_init pci_register_driver
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/**
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* PCI_VDEVICE - macro used to describe a specific pci device in short form
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* @vend: the vendor name
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* @dev: the 16 bit PCI Device ID
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*
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* This macro is used to create a struct pci_device_id that matches a
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* specific PCI device. The subvendor, and subdevice fields will be set
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* to PCI_ANY_ID. The macro allows the next field to follow as the device
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* private data.
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*/
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#define PCI_VDEVICE(vendor, device) \
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PCI_VENDOR_ID_##vendor, (device), \
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PCI_ANY_ID, PCI_ANY_ID, 0, 0
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/* these external functions are only available when PCI support is enabled */
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#ifdef CONFIG_PCI
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@ -454,6 +469,8 @@ struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
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int pci_find_capability (struct pci_dev *dev, int cap);
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int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
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int pci_find_ext_capability (struct pci_dev *dev, int cap);
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int pci_find_ht_capability (struct pci_dev *dev, int ht_cap);
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int pci_find_next_ht_capability (struct pci_dev *dev, int pos, int ht_cap);
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struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
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struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
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@ -468,6 +485,7 @@ struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
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struct pci_dev *pci_get_bus_and_slot (unsigned int bus, unsigned int devfn);
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struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
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int pci_dev_present(const struct pci_device_id *ids);
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const struct pci_device_id *pci_find_present(const struct pci_device_id *ids);
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int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
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int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
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@ -681,6 +699,7 @@ static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *
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{ return NULL; }
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#define pci_dev_present(ids) (0)
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#define pci_find_present(ids) (NULL)
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#define pci_dev_put(dev) do { } while (0)
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static inline void pci_set_master(struct pci_dev *dev) { }
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@ -783,6 +802,7 @@ enum pci_fixup_pass {
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pci_fixup_header, /* After reading configuration header */
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pci_fixup_final, /* Final phase of device fixups */
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pci_fixup_enable, /* pci_enable_device() time */
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pci_fixup_resume, /* pci_enable_device() time */
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};
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/* Anonymous variables would be nice... */
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@ -801,6 +821,9 @@ enum pci_fixup_pass {
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#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
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DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
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vendor##device##hook, vendor, device, hook)
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#define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
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DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
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resume##vendor##device##hook, vendor, device, hook)
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void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
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@ -104,6 +104,10 @@
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#define PCI_CLASS_SERIAL_FIBER 0x0c04
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#define PCI_CLASS_SERIAL_SMBUS 0x0c05
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#define PCI_BASE_CLASS_WIRELESS 0x0d
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#define PCI_CLASS_WIRELESS_RF_CONTROLLER 0x0d10
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#define PCI_CLASS_WIRELESS_WHCI 0x0d1010
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#define PCI_BASE_CLASS_INTELLIGENT 0x0e
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#define PCI_CLASS_INTELLIGENT_I2O 0x0e00
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@ -475,15 +475,32 @@
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#define PCI_PWR_CAP 12 /* Capability */
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#define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */
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/* Hypertransport sub capability types */
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/*
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* Hypertransport sub capability types
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*
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* Unfortunately there are both 3 bit and 5 bit capability types defined
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* in the HT spec, catering for that is a little messy. You probably don't
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* want to use these directly, just use pci_find_ht_capability() and it
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* will do the right thing for you.
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*/
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#define HT_3BIT_CAP_MASK 0xE0
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#define HT_CAPTYPE_SLAVE 0x00 /* Slave/Primary link configuration */
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#define HT_CAPTYPE_HOST 0x20 /* Host/Secondary link configuration */
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#define HT_5BIT_CAP_MASK 0xF8
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#define HT_CAPTYPE_IRQ 0x80 /* IRQ Configuration */
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#define HT_CAPTYPE_REMAPPING_40 0xA0 /* 40 bit address remapping */
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#define HT_CAPTYPE_REMAPPING_64 0xA2 /* 64 bit address remapping */
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#define HT_CAPTYPE_UNITID_CLUMP 0x90 /* Unit ID clumping */
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#define HT_CAPTYPE_EXTCONF 0x98 /* Extended Configuration Space Access */
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#define HT_CAPTYPE_MSI_MAPPING 0xA8 /* MSI Mapping Capability */
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#define HT_MSI_FLAGS 0x02 /* Offset to flags */
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#define HT_MSI_FLAGS_ENABLE 0x1 /* Mapping enable */
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#define HT_MSI_FLAGS_FIXED 0x2 /* Fixed mapping only */
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#define HT_MSI_FIXED_ADDR 0x00000000FEE00000ULL /* Fixed addr */
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#define HT_MSI_ADDR_LO 0x04 /* Offset to low addr bits */
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#define HT_MSI_ADDR_LO_MASK 0xFFF00000 /* Low address bit mask */
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#define HT_MSI_ADDR_HI 0x08 /* Offset to high addr bits */
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#define HT_CAPTYPE_DIRECT_ROUTE 0xB0 /* Direct routing configuration */
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#define HT_CAPTYPE_VCSET 0xB8 /* Virtual Channel configuration */
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#define HT_CAPTYPE_ERROR_RETRY 0xC0 /* Retry on error configuration */
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