mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-10 22:40:54 -04:00
Initial commit of WMI header files from cld3.0 1.1
Initial commit of WMI header files from cld3.0 1.1 Change-Id: I79e18d445d8634e269fca8481d74aca7f5c22a4f CRs-Fixed: 1080379
This commit is contained in:
Vishwajith Upendra
parent
818fcc801a
commit
dea4501bd3
17 changed files with 34252 additions and 0 deletions
114
fw/cepci.h
Executable file
114
fw/cepci.h
Executable file
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/*
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* Copyright (c) 2013-2014, 2016 The Linux Foundation. All rights reserved.
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*
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* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
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*
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
|
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* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
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||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* This file was originally distributed by Qualcomm Atheros, Inc.
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* under proprietary terms before Copyright ownership was assigned
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* to the Linux Foundation.
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*/
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#ifndef __CEPCI_H__
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#define __CEPCI_H__
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/*
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* Support for Copy Engine over PCI.
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* Structures shared between Host software and Target firmware.
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*/
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/*
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* Total number of PCIe MSI interrupts requested for all interrupt sources.
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* PCIe standard forces this to be a power of 2.
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* Some Host OS's limit MSI requests that can be granted to 8
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* so for now we abide by this limit and avoid requesting more
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* than that.
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*/
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#define MSI_NUM_REQUEST_LOG2 3
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#define MSI_NUM_REQUEST (1<<MSI_NUM_REQUEST_LOG2)
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/*
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* Granted MSIs are assigned as follows:
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* Firmware uses the first
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* Remaining MSIs, if any, are used by Copy Engines
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* This mapping is known to both Target firmware and Host software.
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* It may be changed as long as Host and Target are kept in sync.
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*/
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#define MSI_ASSIGN_FW 0 /* 1 MSI for firmware (errors, etc.) */
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#define MSI_ASSIGN_CE_INITIAL 1 /* 7 MSIs for Copy Engines */
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#define MSI_ASSIGN_CE_MAX 7
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/*
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* PCI-specific Target state. Much of this may be of interest
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* to the Host so HOST_INTEREST->hi_interconnect_state points
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* here (and all members are 32-bit quantities in order to
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* facilitate Host access). In particular, Host software is
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* required to initialize pipe_cfg_addr and svc_to_pipe_map.
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*/
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struct pcie_state_s {
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A_UINT32 pipe_cfg_addr; /* Pipe configuration Target address */
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/* NB: CE_pipe_config[CE_COUNT] */
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A_UINT32 svc_to_pipe_map; /* Service to pipe map Target address */
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/* NB: service_to_pipe[PIPE_TO_CE_MAP_CN] */
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A_UINT32 MSI_requested; /* number of MSI interrupts requested */
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A_UINT32 MSI_granted; /* number of MSI interrupts granted */
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A_UINT32 MSI_addr; /* Message Signalled Interrupt address */
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A_UINT32 MSI_data; /* Base data */
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A_UINT32 MSI_fw_intr_data; /* Data for firmware interrupt;
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MSI data for other interrupts are
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in various SoC registers */
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A_UINT32 power_mgmt_method; /* PCIE_PWR_METHOD_* */
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A_UINT32 config_flags; /* PCIE_CONFIG_FLAG_* */
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};
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/*
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* PCIE_CONFIG_FLAG definitions
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*/
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#define PCIE_CONFIG_FLAG_ENABLE_L1 0x0000001
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#define CE_PKTLOG_PIPE 8 /* used by both host and target side */
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#define PCIE_CONFIG_FLAG_CLK_GATING_L1 0x0000001
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#define PCIE_CONFIG_FLAG_CLK_SWITCH_WAIT 0x0000002
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#define PCIE_CONFIG_FLAG_AXI_CLK_GATE 0x0000004
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#define PCIE_CONFIG_FLAG_CLK_REQ_L1 0x0000008
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#define PIPE_TO_CE_MAP_CNT 32 /* simple implementation constant */
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/*
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* Configuration information for a Copy Engine pipe.
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* Passed from Host to Target during startup (one per CE).
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*/
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struct CE_pipe_config {
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A_UINT32 pipenum;
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A_UINT32 pipedir;
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A_UINT32 nentries;
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A_UINT32 nbytes_max;
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A_UINT32 flags;
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A_UINT32 reserved;
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};
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#endif /* __CEPCI_H__ */
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114
fw/dbglog.h
Executable file
114
fw/dbglog.h
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/*
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* Copyright (c) 2012, 2016 The Linux Foundation. All rights reserved.
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*
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* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
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*
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
|
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* above copyright notice and this permission notice appear in all
|
||||
* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* This file was originally distributed by Qualcomm Atheros, Inc.
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* under proprietary terms before Copyright ownership was assigned
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* to the Linux Foundation.
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*/
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#ifndef _DBGLOG_H_
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#define _DBGLOG_H_
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#ifndef ATH_TARGET
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#include "athstartpack.h"
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#endif
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#include <wlan_module_ids.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define DBGLOG_TIMESTAMP_OFFSET 0
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#define DBGLOG_TIMESTAMP_MASK 0xFFFFFFFF /* Bit 0-15. Contains bit
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8-23 of the LF0 timer */
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#define DBGLOG_DBGID_OFFSET 0
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#define DBGLOG_DBGID_MASK 0x000003FF /* Bit 0-9 */
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#define DBGLOG_DBGID_NUM_MAX 256 /* Upper limit is width of mask */
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#define DBGLOG_MODULEID_OFFSET 10
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#define DBGLOG_MODULEID_MASK 0x0003FC00 /* Bit 10-17 */
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#define DBGLOG_MODULEID_NUM_MAX 32 /* Upper limit is width of mask */
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#define DBGLOG_VDEVID_OFFSET 18
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#define DBGLOG_VDEVID_MASK 0x03FC0000 /* Bit 20-25*/
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#define DBGLOG_VDEVID_NUM_MAX 16
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#define DBGLOG_NUM_ARGS_OFFSET 26
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#define DBGLOG_NUM_ARGS_MASK 0xFC000000 /* Bit 26-31 */
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#define DBGLOG_NUM_ARGS_MAX 9 /* it is bcoz of limitation
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of corebsp MSG*() to accept max 9 arg */
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#define DBGLOG_LOG_BUFFER_SIZE 1500
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#define DBGLOG_DBGID_DEFINITION_LEN_MAX 90
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#define DBGLOG_HOST_LOG_BUFFER_SIZE DBGLOG_LOG_BUFFER_SIZE
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#define DBGLOG_GET_DBGID(arg) \
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((arg & DBGLOG_DBGID_MASK) >> DBGLOG_DBGID_OFFSET)
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#define DBGLOG_GET_MODULEID(arg) \
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((arg & DBGLOG_MODULEID_MASK) >> DBGLOG_MODULEID_OFFSET)
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#define DBGLOG_GET_VDEVID(arg) \
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((arg & DBGLOG_VDEVID_MASK) >> DBGLOG_VDEVID_OFFSET)
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#define DBGLOG_GET_NUMARGS(arg) \
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((arg & DBGLOG_NUM_ARGS_MASK) >> DBGLOG_NUM_ARGS_OFFSET)
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#define DBGLOG_GET_TIME_STAMP(arg) \
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((arg & DBGLOG_TIMESTAMP_MASK) >> DBGLOG_TIMESTAMP_OFFSET)
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/* Debug Log levels*/
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typedef enum {
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DBGLOG_VERBOSE = 0,
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DBGLOG_INFO,
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DBGLOG_INFO_LVL_1,
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DBGLOG_INFO_LVL_2,
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DBGLOG_WARN,
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DBGLOG_ERR,
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DBGLOG_LVL_MAX
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}DBGLOG_LOG_LVL;
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PREPACK struct dbglog_buf_s {
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struct dbglog_buf_s *next;
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A_UINT8 *buffer;
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A_UINT32 bufsize;
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A_UINT32 length;
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A_UINT32 count;
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A_UINT32 free;
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} POSTPACK;
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PREPACK struct dbglog_hdr_s {
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struct dbglog_buf_s *dbuf;
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A_UINT32 dropped;
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} POSTPACK;
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#define DBGLOG_MAX_VDEVID 15 /* 0-15 */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _DBGLOG_H_ */
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1744
fw/dbglog_id.h
Executable file
1744
fw/dbglog_id.h
Executable file
File diff suppressed because it is too large
Load diff
120
fw/htt_common.h
Executable file
120
fw/htt_common.h
Executable file
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@ -0,0 +1,120 @@
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/*
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* Copyright (c) 2012-2015 The Linux Foundation. All rights reserved.
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*
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* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
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*
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*
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* Permission to use, copy, modify, and/or distribute this software for
|
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* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* This file was originally distributed by Qualcomm Atheros, Inc.
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* under proprietary terms before Copyright ownership was assigned
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* to the Linux Foundation.
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*/
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/**
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* @file htt_common.h
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*
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* @details the public header file of HTT layer shared between host and firmware
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*/
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#ifndef _HTT_COMMON_H_
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#define _HTT_COMMON_H_
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enum htt_sec_type {
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htt_sec_type_none,
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htt_sec_type_wep128,
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htt_sec_type_wep104,
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htt_sec_type_wep40,
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htt_sec_type_tkip,
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htt_sec_type_tkip_nomic,
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htt_sec_type_aes_ccmp,
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htt_sec_type_wapi,
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htt_sec_type_aes_ccmp_256,
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htt_sec_type_aes_gcmp,
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htt_sec_type_aes_gcmp_256,
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/* keep this last! */
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htt_num_sec_types
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};
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enum htt_rx_ind_mpdu_status {
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HTT_RX_IND_MPDU_STATUS_UNKNOWN = 0x0,
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HTT_RX_IND_MPDU_STATUS_OK,
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HTT_RX_IND_MPDU_STATUS_ERR_FCS,
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HTT_RX_IND_MPDU_STATUS_ERR_DUP,
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HTT_RX_IND_MPDU_STATUS_ERR_REPLAY,
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HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER,
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HTT_RX_IND_MPDU_STATUS_UNAUTH_PEER, /* only accept EAPOL frames */
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HTT_RX_IND_MPDU_STATUS_OUT_OF_SYNC,
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HTT_RX_IND_MPDU_STATUS_MGMT_CTRL, /* Non-data in promiscous mode */
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HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR,
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HTT_RX_IND_MPDU_STATUS_DECRYPT_ERR,
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HTT_RX_IND_MPDU_STATUS_MPDU_LENGTH_ERR,
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HTT_RX_IND_MPDU_STATUS_ENCRYPT_REQUIRED_ERR,
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HTT_RX_IND_MPDU_STATUS_PRIVACY_ERR,
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/*
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* MISC: discard for unspecified reasons.
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* Leave this enum value last.
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*/
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HTT_RX_IND_MPDU_STATUS_ERR_MISC = 0xFF
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};
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#define HTT_INVALID_PEER 0xffff
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#define HTT_INVALID_VDEV 0xff
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#define HTT_NON_QOS_TID 16
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#define HTT_INVALID_TID 31
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#define HTT_TX_EXT_TID_DEFAULT 0
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#define HTT_TX_EXT_TID_NON_QOS_MCAST_BCAST HTT_NON_QOS_TID
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#define HTT_TX_EXT_TID_MGMT 17
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#define HTT_TX_EXT_TID_INVALID HTT_INVALID_TID
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#define HTT_TX_EXT_TID_NONPAUSE 19
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#define HTT_TX_L3_CKSUM_OFFLOAD 1
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#define HTT_TX_L4_CKSUM_OFFLOAD 2
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/**
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* @brief General specification of the tx frame contents
|
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*
|
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* @details
|
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* For efficiency, the HTT packet type values correspond
|
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* to the bit positions of the WAL packet type values, so the
|
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* translation is a simple shift operation.
|
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* The exception is the "mgmt" type, which specifies frame payload
|
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* type rather than L2 header type.
|
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*/
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enum htt_pkt_type {
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htt_pkt_type_raw = 0,
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htt_pkt_type_native_wifi = 1,
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htt_pkt_type_ethernet = 2,
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htt_pkt_type_mgmt = 3,
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htt_pkt_type_eth2 = 4,
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/* keep this last */
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htt_pkt_num_types
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};
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#define HTT_TX_HOST_MSDU_ID_SPACE_BEGIN 0
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#define HTT_TX_IPA_MSDU_ID_SPACE_BEGIN 3000
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#define TGT_RX2TX_MSDU_ID_SPACE_BEGIN 6000
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#endif /* _HTT_COMMON_H_ */
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720
fw/targaddrs.h
Executable file
720
fw/targaddrs.h
Executable file
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@ -0,0 +1,720 @@
|
|||
/*
|
||||
* Copyright (c) 2012-2016 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
|
||||
*
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file was originally distributed by Qualcomm Atheros, Inc.
|
||||
* under proprietary terms before Copyright ownership was assigned
|
||||
* to the Linux Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __TARGADDRS_H__
|
||||
#define __TARGADDRS_H__
|
||||
|
||||
#if defined(ATH_TARGET)
|
||||
#include "soc_addrs.h"
|
||||
#endif
|
||||
|
||||
#if !defined(ATH_TARGET)
|
||||
#include "athstartpack.h"
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SOC option bits, to enable/disable various features.
|
||||
* By default, all option bits are 0.
|
||||
* AR6004: These bits can be set in LOCAL_SCRATCH register 0.
|
||||
* AR9888: These bits can be set in soc_core register SCRATCH_0.
|
||||
*/
|
||||
#define SOC_OPTION_BMI_DISABLE 0x01 /* Disable BMI comm with Host */
|
||||
#define SOC_OPTION_SERIAL_ENABLE 0x02 /* Enable serial port msgs */
|
||||
#define SOC_OPTION_WDT_DISABLE 0x04 /* WatchDog Timer override */
|
||||
#define SOC_OPTION_SLEEP_DISABLE 0x08 /* Disable system sleep */
|
||||
#define SOC_OPTION_STOP_BOOT 0x10 /* Stop boot processes (for ATE) */
|
||||
#define SOC_OPTION_ENABLE_NOANI 0x20 /* Operate without ANI */
|
||||
#define SOC_OPTION_DSET_DISABLE 0x40 /* Ignore DataSets */
|
||||
#define SOC_OPTION_IGNORE_FLASH 0x80 /* Ignore flash during bootup */
|
||||
|
||||
/*
|
||||
* xxx_HOST_INTEREST_ADDRESS is the address in Target RAM of the
|
||||
* host_interest structure. It must match the address of the _host_interest
|
||||
* symbol (see linker script).
|
||||
*
|
||||
* Host Interest is shared between Host and Target in order to coordinate
|
||||
* between the two, and is intended to remain constant (with additions only
|
||||
* at the end) across software releases.
|
||||
*
|
||||
* All addresses are available here so that it's possible to
|
||||
* write a single binary that works with all Target Types.
|
||||
* May be used in assembler code as well as C.
|
||||
*/
|
||||
#define AR6002_HOST_INTEREST_ADDRESS 0x00500400
|
||||
#define AR6003_HOST_INTEREST_ADDRESS 0x00540600
|
||||
#define AR6004_HOST_INTEREST_ADDRESS 0x00400800
|
||||
#define AR9888_HOST_INTEREST_ADDRESS 0x00400800
|
||||
#define AR900B_HOST_INTEREST_ADDRESS 0x00400800
|
||||
#define AR6320_HOST_INTEREST_ADDRESS 0x00400800
|
||||
#define QCA9377_HOST_INTEREST_ADDRESS 0x00400800
|
||||
#define AR6004_SOC_RESET_ADDRESS 0X00004000
|
||||
#define AR6004_SOC_RESET_CPU_INIT_RESET_MASK 0X00000800
|
||||
#if defined(AR6006_MEMORY_NEW_ARCH)
|
||||
#define AR6006_HOST_INTEREST_ADDRESS 0x00428800
|
||||
#else
|
||||
#define AR6006_HOST_INTEREST_ADDRESS 0x00400800
|
||||
#endif
|
||||
#define AR6006_SOC_RESET_ADDRESS 0X00004000
|
||||
#define AR6006_SOC_RESET_CPU_INIT_RESET_MASK 0X00000800
|
||||
#define QCA9984_HOST_INTEREST_ADDRESS 0x00400800
|
||||
#define IPQ4019_HOST_INTEREST_ADDRESS 0x00400800
|
||||
#define QCA9888_HOST_INTEREST_ADDRESS 0x00400800
|
||||
|
||||
|
||||
#define HOST_INTEREST_MAX_SIZE 0x200
|
||||
|
||||
#if !defined(__ASSEMBLER__)
|
||||
struct register_dump_s;
|
||||
struct dbglog_hdr_s;
|
||||
|
||||
/*
|
||||
* These are items that the Host may need to access
|
||||
* via BMI or via the Diagnostic Window. The position
|
||||
* of items in this structure must remain constant
|
||||
* across firmware revisions!
|
||||
*
|
||||
* Types for each item must be fixed size across
|
||||
* target and host platforms.
|
||||
*
|
||||
* More items may be added at the end.
|
||||
*/
|
||||
PREPACK64 struct host_interest_s {
|
||||
/*
|
||||
* Pointer to application-defined area, if any.
|
||||
* Set by Target application during startup.
|
||||
*/
|
||||
A_UINT32 hi_app_host_interest; /* 0x00 */
|
||||
|
||||
/* Pointer to register dump area, valid after Target crash. */
|
||||
A_UINT32 hi_failure_state; /* 0x04 */
|
||||
|
||||
/* Pointer to debug logging header */
|
||||
A_UINT32 hi_dbglog_hdr; /* 0x08 */
|
||||
|
||||
/* Save SW ROM version */
|
||||
A_UINT32 hi_sw_rom_version; /* 0x0c */
|
||||
|
||||
/*
|
||||
* General-purpose flag bits, similar to SOC_OPTION_* flags.
|
||||
* Can be used by application rather than by OS.
|
||||
*/
|
||||
volatile A_UINT32 hi_option_flag; /* 0x10 */
|
||||
|
||||
/*
|
||||
* Boolean that determines whether or not to
|
||||
* display messages on the serial port.
|
||||
*/
|
||||
A_UINT32 hi_serial_enable; /* 0x14 */
|
||||
|
||||
/* Start address of DataSet index, if any */
|
||||
A_UINT32 hi_dset_list_head; /* 0x18 */
|
||||
|
||||
/* Override Target application start address */
|
||||
A_UINT32 hi_app_start; /* 0x1c */
|
||||
|
||||
/* Clock and voltage tuning */
|
||||
A_UINT32 hi_skip_clock_init; /* 0x20 */
|
||||
A_UINT32 hi_core_clock_setting; /* 0x24 */
|
||||
A_UINT32 hi_cpu_clock_setting; /* 0x28 */
|
||||
A_UINT32 hi_system_sleep_setting; /* 0x2c */
|
||||
A_UINT32 hi_xtal_control_setting; /* 0x30 */
|
||||
A_UINT32 hi_pll_ctrl_setting_24ghz; /* 0x34 */
|
||||
A_UINT32 hi_pll_ctrl_setting_5ghz; /* 0x38 */
|
||||
A_UINT32 hi_ref_voltage_trim_setting; /* 0x3c */
|
||||
A_UINT32 hi_clock_info; /* 0x40 */
|
||||
|
||||
/* Host uses BE CPU or not */
|
||||
A_UINT32 hi_be; /* 0x44 */
|
||||
|
||||
A_UINT32 hi_stack; /* normal stack */ /* 0x48 */
|
||||
A_UINT32 hi_err_stack; /* error stack */ /* 0x4c */
|
||||
A_UINT32 hi_desired_cpu_speed_hz; /* 0x50 */
|
||||
|
||||
/* Pointer to Board Data */
|
||||
A_UINT32 hi_board_data; /* 0x54 */
|
||||
|
||||
/*
|
||||
* Indication of Board Data state:
|
||||
* 0: board data is not yet initialized.
|
||||
* 1: board data is initialized; unknown size
|
||||
* >1: number of bytes of initialized board data (varies with board type)
|
||||
*/
|
||||
A_UINT32 hi_board_data_initialized; /* 0x58 */
|
||||
|
||||
A_UINT32 hi_dset_RAM_index_table; /* 0x5c */
|
||||
|
||||
A_UINT32 hi_desired_baud_rate; /* 0x60 */
|
||||
A_UINT32 hi_dbglog_config; /* 0x64 */
|
||||
A_UINT32 hi_end_RAM_reserve_sz; /* 0x68 */
|
||||
A_UINT32 hi_mbox_io_block_sz; /* 0x6c */
|
||||
|
||||
A_UINT32 hi_num_bpatch_streams; /* 0x70 -- unused */
|
||||
A_UINT32 hi_mbox_isr_yield_limit; /* 0x74 */
|
||||
|
||||
A_UINT32 hi_refclk_hz; /* 0x78 */
|
||||
A_UINT32 hi_ext_clk_detected; /* 0x7c */
|
||||
A_UINT32 hi_dbg_uart_txpin; /* 0x80 */
|
||||
A_UINT32 hi_dbg_uart_rxpin; /* 0x84 */
|
||||
A_UINT32 hi_hci_uart_baud; /* 0x88 */
|
||||
A_UINT32 hi_hci_uart_pin_assignments; /* 0x8C */
|
||||
/* NOTE: byte [0] = tx pin, [1] = rx pin, [2] = rts pin, [3] = cts pin */
|
||||
A_UINT32 hi_hci_uart_baud_scale_val; /* 0x90 */
|
||||
A_UINT32 hi_hci_uart_baud_step_val; /* 0x94 */
|
||||
|
||||
A_UINT32 hi_allocram_start; /* 0x98 */
|
||||
A_UINT32 hi_allocram_sz; /* 0x9c */
|
||||
A_UINT32 hi_hci_bridge_flags; /* 0xa0 */
|
||||
A_UINT32 hi_hci_uart_support_pins; /* 0xa4 */
|
||||
/* NOTE: byte [0] = RESET pin (bit 7 is polarity), bytes[1]..bytes[3] are for future use */
|
||||
A_UINT32 hi_hci_uart_pwr_mgmt_params; /* 0xa8 */
|
||||
/* 0xa8 - [1]: 0 = UART FC active low, 1 = UART FC active high
|
||||
* [31:16]: wakeup timeout in ms
|
||||
*/
|
||||
/* Pointer to extended board Data */
|
||||
A_UINT32 hi_board_ext_data; /* 0xac */
|
||||
A_UINT32 hi_board_ext_data_config; /* 0xb0 */
|
||||
/*
|
||||
* Bit [0] : valid
|
||||
* Bit[31:16: size
|
||||
*/
|
||||
/*
|
||||
* hi_reset_flag is used to do some stuff when target reset.
|
||||
* such as restore app_start after warm reset or
|
||||
* preserve host Interest area, or preserve ROM data, literals etc.
|
||||
*/
|
||||
A_UINT32 hi_reset_flag; /* 0xb4 */
|
||||
/* indicate hi_reset_flag is valid */
|
||||
A_UINT32 hi_reset_flag_valid; /* 0xb8 */
|
||||
A_UINT32 hi_hci_uart_pwr_mgmt_params_ext; /* 0xbc */
|
||||
/* 0xbc - [31:0]: idle timeout in ms
|
||||
*/
|
||||
/* ACS flags */
|
||||
A_UINT32 hi_acs_flags; /* 0xc0 */
|
||||
A_UINT32 hi_console_flags; /* 0xc4 */
|
||||
A_UINT32 hi_nvram_state; /* 0xc8 */
|
||||
volatile A_UINT32 hi_option_flag2; /* 0xcc */
|
||||
|
||||
/* If non-zero, override values sent to Host in WMI_READY event. */
|
||||
A_UINT32 hi_sw_version_override; /* 0xd0 */
|
||||
A_UINT32 hi_abi_version_override; /* 0xd4 */
|
||||
|
||||
/* Percentage of high priority RX traffic to total expected RX traffic -
|
||||
* applicable only to ar6004 */
|
||||
A_UINT32 hi_hp_rx_traffic_ratio; /* 0xd8 */
|
||||
|
||||
/* test applications flags */
|
||||
A_UINT32 hi_test_apps_related ; /* 0xdc */
|
||||
/* location of test script */
|
||||
A_UINT32 hi_ota_testscript; /* 0xe0 */
|
||||
/* location of CAL data */
|
||||
A_UINT32 hi_cal_data; /* 0xe4 */
|
||||
|
||||
/* Number of packet log buffers */
|
||||
volatile A_UINT32 hi_pktlog_num_buffers; /* 0xe8 */
|
||||
|
||||
/* wow extension configuration */
|
||||
A_UINT32 hi_wow_ext_config; /* 0xec */
|
||||
A_UINT32 hi_pwr_save_flags; /* 0xf0 */
|
||||
|
||||
/* Spatial Multiplexing Power Save (SMPS) options */
|
||||
A_UINT32 hi_smps_options; /* 0xf4 */
|
||||
|
||||
/* Interconnect-specific state */
|
||||
A_UINT32 hi_interconnect_state; /* 0xf8 */
|
||||
|
||||
/* Coex configuration flags */
|
||||
A_UINT32 hi_coex_config; /* 0xfc */
|
||||
|
||||
/* Early allocation support */
|
||||
A_UINT32 hi_early_alloc; /* 0x100 */
|
||||
|
||||
/* FW swap field */
|
||||
/* Bits of this 32bit word will be used to pass specific swap
|
||||
instruction to FW */
|
||||
/* Bit 0 -- AP Nart descriptor no swap. When this bit is set
|
||||
FW will not swap TX descriptor. Meaning packets are formed
|
||||
on the target processor.*/
|
||||
/* Bit 1 -- TBD */
|
||||
|
||||
A_UINT32 hi_fw_swap; /* 0x104 */
|
||||
|
||||
/* global arenas pointer address, used by host driver debug */
|
||||
A_UINT32 hi_dynamic_mem_arenas_addr; /* 0x108 */
|
||||
|
||||
/* allocated bytes of DRAM use by allocated */
|
||||
A_UINT32 hi_dynamic_mem_allocated; /* 0x10C */
|
||||
|
||||
/* remaining bytes of DRAM */
|
||||
A_UINT32 hi_dynamic_mem_remaining; /* 0x110 */
|
||||
|
||||
/* memory track count, configured by host */
|
||||
A_UINT32 hi_dynamic_mem_track_max; /* 0x114 */
|
||||
|
||||
/* minidump buffer */
|
||||
A_UINT32 hi_minidump; /* 0x118 */
|
||||
|
||||
/* bdata's sig and key addr */
|
||||
A_UINT32 hi_bd_sig_key; /* 0x11c */
|
||||
|
||||
} POSTPACK64;
|
||||
|
||||
/* bitmap for hi_test_apps_related */
|
||||
#define HI_TEST_APPS_TESTSCRIPT_LOADED 0x00000001
|
||||
#define HI_TEST_APPS_CAL_DATA_AVAIL 0x00000002
|
||||
|
||||
/* Bits defined in hi_option_flag */
|
||||
#define HI_OPTION_TIMER_WAR 0x01 /* Enable timer workaround */
|
||||
#define HI_OPTION_BMI_CRED_LIMIT 0x02 /* Limit BMI command credits */
|
||||
#define HI_OPTION_RELAY_DOT11_HDR 0x04 /* Relay Dot11 hdr to/from host */
|
||||
#define HI_OPTION_MAC_ADDR_METHOD 0x08 /* MAC addr method 0-locally administred 1-globally unique addrs */
|
||||
#define HI_OPTION_FW_BRIDGE 0x10 /* Firmware Bridging */
|
||||
#define HI_OPTION_ENABLE_PROFILE 0x20 /* Enable CPU profiling */
|
||||
#define HI_OPTION_DISABLE_DBGLOG 0x40 /* Disable debug logging */
|
||||
#define HI_OPTION_SKIP_ERA_TRACKING 0x80 /* Skip Era Tracking */
|
||||
#define HI_OPTION_PAPRD_DISABLE 0x100 /* Disable PAPRD (debug) */
|
||||
#define HI_OPTION_NUM_DEV_LSB 0x200
|
||||
#define HI_OPTION_NUM_DEV_MSB 0x800
|
||||
#define HI_OPTION_DEV_MODE_LSB 0x1000
|
||||
#define HI_OPTION_DEV_MODE_MSB 0x8000000
|
||||
#define HI_OPTION_NO_LFT_STBL 0x10000000 /* Disable LowFreq Timer Stabilization */
|
||||
#define HI_OPTION_SKIP_REG_SCAN 0x20000000 /* Skip regulatory scan */
|
||||
#define HI_OPTION_INIT_REG_SCAN 0x40000000 /* Do regulatory scan during init before
|
||||
* sending WMI ready event to host */
|
||||
#define HI_OPTION_SKIP_MEMMAP 0x80000000 /* REV6: Do not adjust memory map */
|
||||
|
||||
#define HI_OPTION_MAC_ADDR_METHOD_SHIFT 3
|
||||
|
||||
/* 2 bits of hi_option_flag are used to represent 3 modes */
|
||||
#define HI_OPTION_FW_MODE_IBSS 0x0 /* IBSS Mode */
|
||||
#define HI_OPTION_FW_MODE_BSS_STA 0x1 /* STA Mode */
|
||||
#define HI_OPTION_FW_MODE_AP 0x2 /* AP Mode */
|
||||
#define HI_OPTION_FW_MODE_BT30AMP 0x3 /* BT30 AMP Mode */
|
||||
|
||||
/* 2 bits of hi_option flag are usedto represent 4 submodes */
|
||||
#define HI_OPTION_FW_SUBMODE_NONE 0x0 /* Normal mode */
|
||||
#define HI_OPTION_FW_SUBMODE_P2PDEV 0x1 /* p2p device mode */
|
||||
#define HI_OPTION_FW_SUBMODE_P2PCLIENT 0x2 /* p2p client mode */
|
||||
#define HI_OPTION_FW_SUBMODE_P2PGO 0x3 /* p2p go mode */
|
||||
|
||||
/* Num dev Mask */
|
||||
#define HI_OPTION_NUM_DEV_MASK 0x7
|
||||
#define HI_OPTION_NUM_DEV_SHIFT 0x9
|
||||
|
||||
/* firmware bridging */
|
||||
#define HI_OPTION_FW_BRIDGE_SHIFT 0x04
|
||||
|
||||
/* Fw Mode/SubMode Mask
|
||||
|-------------------------------------------------------------------------------|
|
||||
| SUB | SUB | SUB | SUB | | | | |
|
||||
| MODE[3] | MODE[2] | MODE[1] | MODE[0] | MODE[3] | MODE[2] | MODE[1] | MODE[0] |
|
||||
| (2) | (2) | (2) | (2) | (2) | (2) | (2) | (2) |
|
||||
|-------------------------------------------------------------------------------|
|
||||
*/
|
||||
#define HI_OPTION_FW_MODE_BITS 0x2
|
||||
#define HI_OPTION_FW_MODE_MASK 0x3
|
||||
#define HI_OPTION_FW_MODE_SHIFT 0xC
|
||||
#define HI_OPTION_ALL_FW_MODE_MASK 0xFF
|
||||
|
||||
#define HI_OPTION_FW_SUBMODE_BITS 0x2
|
||||
#define HI_OPTION_FW_SUBMODE_MASK 0x3
|
||||
#define HI_OPTION_FW_SUBMODE_SHIFT 0x14
|
||||
#define HI_OPTION_ALL_FW_SUBMODE_MASK 0xFF00
|
||||
#define HI_OPTION_ALL_FW_SUBMODE_SHIFT 0x8
|
||||
|
||||
|
||||
/* hi_option_flag2 options */
|
||||
#define HI_OPTION_OFFLOAD_AMSDU 0x01
|
||||
#define HI_OPTION_DFS_SUPPORT 0x02 /* Enable DFS support */
|
||||
#define HI_OPTION_ENABLE_RFKILL 0x04 /* RFKill Enable Feature*/
|
||||
#define HI_OPTION_RADIO_RETENTION_DISABLE 0x08 /* Disable radio retention */
|
||||
#define HI_OPTION_EARLY_CFG_DONE 0x10 /* Early configuration is complete */
|
||||
|
||||
#define HI_OPTION_RF_KILL_SHIFT 0x2
|
||||
#define HI_OPTION_RF_KILL_MASK 0x1
|
||||
|
||||
#define HI_OPTION_HTT_TGT_DEBUG_TX_COMPL_IDX 0x20
|
||||
|
||||
#define HTT_TGT_DEBUG_TX_COMPL_IDX_VALUE() \
|
||||
((HOST_INTEREST->hi_option_flag2 & HI_OPTION_HTT_TGT_DEBUG_TX_COMPL_IDX))
|
||||
|
||||
/* AR9888 1.0 only. Enable/disable CDC max perf support from host */
|
||||
#define HI_OPTION_DISABLE_CDC_MAX_PERF_WAR 0x20
|
||||
#define CDC_MAX_PERF_WAR_ENABLED() \
|
||||
(!(HOST_INTEREST->hi_option_flag2 & HI_OPTION_DISABLE_CDC_MAX_PERF_WAR))
|
||||
#define HI_OPTION_USE_EXT_LDO 0x40 /* use LDO27 for 1.1V instead of PMU. */
|
||||
#define HI_OPTION_DBUART_SUPPORT 0x80 /* Enable uart debug support */
|
||||
#define HI_OPTION_BE_LATENCY_OPTIMIZE 0x100 /* This bit is to enable BE low latency for some customers. The side effect is TCP DL will be 8Mbps decreased (673Mbps -> 665Mbps).*/
|
||||
#define HT_OPTION_GPIO_WAKEUP_SUPPORT 0x200 /* GPIO wake up support */
|
||||
|
||||
#define GPIO_WAKEUP_ENABLED() \
|
||||
(HOST_INTEREST->hi_option_flag2 & HT_OPTION_GPIO_WAKEUP_SUPPORT)
|
||||
|
||||
|
||||
/* hi_reset_flag */
|
||||
#define HI_RESET_FLAG_PRESERVE_APP_START 0x01 /* preserve App Start address */
|
||||
#define HI_RESET_FLAG_PRESERVE_HOST_INTEREST 0x02 /* preserve host interest */
|
||||
#define HI_RESET_FLAG_PRESERVE_ROMDATA 0x04 /* preserve ROM data */
|
||||
#define HI_RESET_FLAG_PRESERVE_NVRAM_STATE 0x08
|
||||
#define HI_RESET_FLAG_PRESERVE_BOOT_INFO 0x10
|
||||
#define HI_RESET_FLAG_WARM_RESET 0x20
|
||||
|
||||
/* define hi_fw_swap bits */
|
||||
#define HI_DESC_IN_FW_BIT 0x01
|
||||
|
||||
#define HI_RESET_FLAG_IS_VALID 0x12345678 /* indicate the reset flag is valid */
|
||||
|
||||
#define ON_RESET_FLAGS_VALID() \
|
||||
(HOST_INTEREST->hi_reset_flag_valid == HI_RESET_FLAG_IS_VALID)
|
||||
|
||||
#define RESET_FLAGS_VALIDATE() \
|
||||
(HOST_INTEREST->hi_reset_flag_valid = HI_RESET_FLAG_IS_VALID)
|
||||
|
||||
#define RESET_FLAGS_INVALIDATE() \
|
||||
(HOST_INTEREST->hi_reset_flag_valid = 0)
|
||||
|
||||
#define ON_RESET_PRESERVE_APP_START() \
|
||||
(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_APP_START)
|
||||
|
||||
#define ON_RESET_PRESERVE_NVRAM_STATE() \
|
||||
(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_NVRAM_STATE)
|
||||
|
||||
#define ON_RESET_PRESERVE_HOST_INTEREST() \
|
||||
(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_HOST_INTEREST)
|
||||
|
||||
#define ON_RESET_PRESERVE_ROMDATA() \
|
||||
(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_ROMDATA)
|
||||
|
||||
#define ON_RESET_PRESERVE_BOOT_INFO() \
|
||||
(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_PRESERVE_BOOT_INFO)
|
||||
|
||||
#define ON_RESET_WARM_RESET() \
|
||||
(HOST_INTEREST->hi_reset_flag & HI_RESET_FLAG_WARM_RESET)
|
||||
|
||||
/* host CPU endianness */
|
||||
#define HOST_ON_BE_CPU() \
|
||||
(HOST_INTEREST->hi_be)
|
||||
|
||||
/* AP nart no swap descriptor flag. Decsriptors are created on the target processor. */
|
||||
#define DESC_IN_FW() \
|
||||
(HOST_INTEREST->hi_fw_swap & HI_DESC_IN_FW_BIT)
|
||||
|
||||
|
||||
/* redefine for hi_acs_flags since no product ever use it
|
||||
* NOTE:
|
||||
* This flag was only used in AR6004 for a customer project that has
|
||||
* been canceled, we are reusing it to avoid extending the Host interest
|
||||
* area.
|
||||
* BIT Range Meaning
|
||||
* --------- ----------------------------------
|
||||
* 0 HOST wants to swap MBOX usage
|
||||
* 1 HOST supports HTT reduced tx completion
|
||||
* 2 HOST supports HTT alternate credit size for data frames
|
||||
* 15..3 reserved for HOST
|
||||
* 16 FW set it before sending HTC_Ready to HOST to indicate MBOX swap is done
|
||||
* 17 same as above but to indicate HTT reduced tx completion capability
|
||||
* 31..18 reserved for FW
|
||||
*/
|
||||
#define HI_ACS_FLAGS_HOST_SWAP_MBOX (1 << 0) /* HOST require to swap MBOX */
|
||||
#define HI_ACS_FLAGS_HOST_REDUCE_TX_COMPL (1 << 1) /* HOST supports HTT reduced tx completion */
|
||||
#define HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE (1 << 2) /* HOST supports alternate credit size for data frames */
|
||||
#define HI_ACS_FLAGS_FW_SWAPPED_MBOX (1 << 16) /* FW swapped MBOX */
|
||||
#define HI_ACS_FLAGS_FW_REDUCE_TX_COMPL (1 << 17) /* FW support HTT reduced tx completion */
|
||||
|
||||
/* CONSOLE FLAGS
|
||||
*
|
||||
* Bit Range Meaning
|
||||
* --------- --------------------------------
|
||||
* 2..0 UART ID (0 = Default)
|
||||
* 3 Baud Select (0 = 9600, 1 = 115200)
|
||||
* 30..4 Reserved
|
||||
* 31 Enable Console
|
||||
*
|
||||
* */
|
||||
|
||||
#define HI_CONSOLE_FLAGS_ENABLE (1 << 31)
|
||||
#define HI_CONSOLE_FLAGS_UART_MASK (0x7)
|
||||
#define HI_CONSOLE_FLAGS_UART_SHIFT 0
|
||||
#define HI_CONSOLE_FLAGS_BAUD_SELECT (1 << 3)
|
||||
|
||||
/* SM power save options */
|
||||
#define HI_SMPS_ALLOW_MASK (0x00000001)
|
||||
#define HI_SMPS_MODE_MASK (0x00000002)
|
||||
#define HI_SMPS_MODE_STATIC (0x00000000)
|
||||
#define HI_SMPS_MODE_DYNAMIC (0x00000002)
|
||||
#define HI_SMPS_DISABLE_AUTO_MODE (0x00000004)
|
||||
#define HI_SMPS_DATA_THRESH_MASK (0x000007f8)
|
||||
#define HI_SMPS_DATA_THRESH_SHIFT (3)
|
||||
#define HI_SMPS_RSSI_THRESH_MASK (0x0007f800)
|
||||
#define HI_SMPS_RSSI_THRESH_SHIFT (11)
|
||||
#define HI_SMPS_LOWPWR_CM_MASK (0x00380000)
|
||||
#define HI_SMPS_LOWPWR_CM_SHIFT (15)
|
||||
#define HI_SMPS_HIPWR_CM_MASK (0x03c00000)
|
||||
#define HI_SMPS_HIPWR_CM_SHIFT (19)
|
||||
|
||||
#define HOST_INTEREST_SMPS_GET_MODE() (HOST_INTEREST->hi_smps_options & HI_SMPS_MODE_MASK)
|
||||
#define HOST_INTEREST_SMPS_GET_DATA_THRESH() ((HOST_INTEREST->hi_smps_options & HI_SMPS_DATA_THRESH_MASK) >> HI_SMPS_DATA_THRESH_SHIFT)
|
||||
#define HOST_INTEREST_SMPS_SET_DATA_THRESH(x) (((x) << HI_SMPS_DATA_THRESH_SHIFT) & HI_SMPS_DATA_THRESH_MASK)
|
||||
#define HOST_INTEREST_SMPS_GET_RSSI_THRESH() ((HOST_INTEREST->hi_smps_options & HI_SMPS_RSSI_THRESH_MASK) >> HI_SMPS_RSSI_THRESH_SHIFT)
|
||||
#define HOST_INTEREST_SMPS_SET_RSSI_THRESH(x) (((x) << HI_SMPS_RSSI_THRESH_SHIFT) & HI_SMPS_RSSI_THRESH_MASK)
|
||||
#define HOST_INTEREST_SMPS_SET_LOWPWR_CM() ((HOST_INTEREST->hi_smps_options & HI_SMPS_LOWPWR_CM_MASK) >> HI_SMPS_LOWPWR_CM_SHIFT)
|
||||
#define HOST_INTEREST_SMPS_SET_HIPWR_CM() ((HOST_INTEREST->hi_smps_options << HI_SMPS_HIPWR_CM_MASK) & HI_SMPS_HIPWR_CM_SHIFT)
|
||||
#define HOST_INTEREST_SMPS_IS_AUTO_MODE_DISABLED() (HOST_INTEREST->hi_smps_options & HI_SMPS_DISABLE_AUTO_MODE)
|
||||
|
||||
|
||||
/* WOW Extension configuration
|
||||
*
|
||||
* Bit Range Meaning
|
||||
* --------- --------------------------------
|
||||
* 8..0 Size of each WOW pattern (max 511)
|
||||
* 15..9 Number of patterns per list (max 127)
|
||||
* 17..16 Number of lists (max 4)
|
||||
* 30..18 Reserved
|
||||
* 31 Enabled
|
||||
*
|
||||
* set values (except enable) to zeros for default settings
|
||||
*
|
||||
* */
|
||||
|
||||
#define HI_WOW_EXT_ENABLED_MASK (1 << 31)
|
||||
#define HI_WOW_EXT_NUM_LIST_SHIFT 16
|
||||
#define HI_WOW_EXT_NUM_LIST_MASK (0x3 << HI_WOW_EXT_NUM_LIST_SHIFT)
|
||||
#define HI_WOW_EXT_NUM_PATTERNS_SHIFT 9
|
||||
#define HI_WOW_EXT_NUM_PATTERNS_MASK (0x7F << HI_WOW_EXT_NUM_PATTERNS_SHIFT)
|
||||
#define HI_WOW_EXT_PATTERN_SIZE_SHIFT 0
|
||||
#define HI_WOW_EXT_PATTERN_SIZE_MASK (0x1FF << HI_WOW_EXT_PATTERN_SIZE_SHIFT)
|
||||
|
||||
#define HI_WOW_EXT_MAKE_CONFIG(num_lists,count,size) \
|
||||
((((num_lists) << HI_WOW_EXT_NUM_LIST_SHIFT) & HI_WOW_EXT_NUM_LIST_MASK) | \
|
||||
(((count) << HI_WOW_EXT_NUM_PATTERNS_SHIFT) & HI_WOW_EXT_NUM_PATTERNS_MASK) | \
|
||||
(((size) << HI_WOW_EXT_PATTERN_SIZE_SHIFT) & HI_WOW_EXT_PATTERN_SIZE_MASK))
|
||||
|
||||
#define HI_WOW_EXT_GET_NUM_LISTS(config) \
|
||||
(((config) & HI_WOW_EXT_NUM_LIST_MASK) >> HI_WOW_EXT_NUM_LIST_SHIFT)
|
||||
#define HI_WOW_EXT_GET_NUM_PATTERNS(config) \
|
||||
(((config) & HI_WOW_EXT_NUM_PATTERNS_MASK) >> HI_WOW_EXT_NUM_PATTERNS_SHIFT)
|
||||
#define HI_WOW_EXT_GET_PATTERN_SIZE(config) \
|
||||
(((config) & HI_WOW_EXT_PATTERN_SIZE_MASK) >> HI_WOW_EXT_PATTERN_SIZE_SHIFT)
|
||||
|
||||
/*
|
||||
* Early allocation configuration
|
||||
* Support RAM bank configuration before BMI done and this eases the memory
|
||||
* allocation at very early stage
|
||||
* Bit Range Meaning
|
||||
* --------- ----------------------------------
|
||||
* [0:3] number of bank assigned to be IRAM
|
||||
* [4:15] reserved
|
||||
* [16:31] magic number
|
||||
*
|
||||
* Note:
|
||||
* 1. target firmware would check magic number and if it's a match, firmware
|
||||
* would consider the bits[0:15] are valid and base on that to calculate
|
||||
* the end of DRAM. Early allocation would be located at that area and
|
||||
* may be reclaimed when necesary
|
||||
* 2. if no magic number is found, early allocation would happen at "_end"
|
||||
* symbol of ROM which is located before the app-data and might NOT be
|
||||
* re-claimable. If this is adopted, link script should keep this in
|
||||
* mind to avoid data corruption.
|
||||
*/
|
||||
#define HI_EARLY_ALLOC_MAGIC 0x6d8a
|
||||
#define HI_EARLY_ALLOC_MAGIC_MASK 0xffff0000
|
||||
#define HI_EARLY_ALLOC_MAGIC_SHIFT 16
|
||||
#define HI_EARLY_ALLOC_IRAM_BANKS_MASK 0x0000000f
|
||||
#define HI_EARLY_ALLOC_IRAM_BANKS_SHIFT 0
|
||||
|
||||
#define HI_EARLY_ALLOC_VALID() \
|
||||
((((HOST_INTEREST->hi_early_alloc) & HI_EARLY_ALLOC_MAGIC_MASK) >> HI_EARLY_ALLOC_MAGIC_SHIFT) \
|
||||
== (HI_EARLY_ALLOC_MAGIC))
|
||||
#define HI_EARLY_ALLOC_GET_IRAM_BANKS() \
|
||||
(((HOST_INTEREST->hi_early_alloc) & HI_EARLY_ALLOC_IRAM_BANKS_MASK) >> HI_EARLY_ALLOC_IRAM_BANKS_SHIFT)
|
||||
|
||||
/*
|
||||
* Intended for use by Host software, this macro returns the Target RAM
|
||||
* address of any item in the host_interest structure.
|
||||
* Example: target_addr = AR6002_HOST_INTEREST_ITEM_ADDRESS(hi_board_data);
|
||||
*/
|
||||
#define AR6002_HOST_INTEREST_ITEM_ADDRESS(item) \
|
||||
(A_UINT32)((size_t)&((((struct host_interest_s *)(AR6002_HOST_INTEREST_ADDRESS))->item)))
|
||||
|
||||
#define AR6003_HOST_INTEREST_ITEM_ADDRESS(item) \
|
||||
(A_UINT32)((size_t)&((((struct host_interest_s *)(AR6003_HOST_INTEREST_ADDRESS))->item)))
|
||||
|
||||
#define AR6004_HOST_INTEREST_ITEM_ADDRESS(item) \
|
||||
(A_UINT32)((size_t)&((((struct host_interest_s *)(AR6004_HOST_INTEREST_ADDRESS))->item)))
|
||||
|
||||
#define AR6006_HOST_INTEREST_ITEM_ADDRESS(item) \
|
||||
(A_UINT32)((size_t)&((((struct host_interest_s *)(AR6006_HOST_INTEREST_ADDRESS))->item)))
|
||||
|
||||
#define AR9888_HOST_INTEREST_ITEM_ADDRESS(item) \
|
||||
(A_UINT32)((size_t)&((((struct host_interest_s *)(AR9888_HOST_INTEREST_ADDRESS))->item)))
|
||||
|
||||
#define AR6320_HOST_INTEREST_ITEM_ADDRESS(item) \
|
||||
(A_UINT32)((size_t)&((((struct host_interest_s *)(AR6320_HOST_INTEREST_ADDRESS))->item)))
|
||||
|
||||
#define AR900B_HOST_INTEREST_ITEM_ADDRESS(item) \
|
||||
(A_UINT32)((size_t)&((((struct host_interest_s *)(AR900B_HOST_INTEREST_ADDRESS))->item)))
|
||||
|
||||
#define HOST_INTEREST_DBGLOG_IS_ENABLED() \
|
||||
(!(HOST_INTEREST->hi_option_flag & HI_OPTION_DISABLE_DBGLOG))
|
||||
|
||||
#define HOST_INTEREST_PKTLOG_IS_ENABLED() \
|
||||
((HOST_INTEREST->hi_pktlog_num_buffers))
|
||||
|
||||
#define HOST_INTEREST_PROFILE_IS_ENABLED() \
|
||||
(HOST_INTEREST->hi_option_flag & HI_OPTION_ENABLE_PROFILE)
|
||||
|
||||
#define LF_TIMER_STABILIZATION_IS_ENABLED() \
|
||||
(!(HOST_INTEREST->hi_option_flag & HI_OPTION_NO_LFT_STBL))
|
||||
|
||||
#define IS_AMSDU_OFFLAOD_ENABLED() \
|
||||
((HOST_INTEREST->hi_option_flag2 & HI_OPTION_OFFLOAD_AMSDU))
|
||||
|
||||
#define HOST_INTEREST_DFS_IS_ENABLED() \
|
||||
((HOST_INTEREST->hi_option_flag2 & HI_OPTION_DFS_SUPPORT))
|
||||
|
||||
#define HOST_INTEREST_EARLY_CFG_DONE() \
|
||||
((HOST_INTEREST->hi_option_flag2 & HI_OPTION_EARLY_CFG_DONE))
|
||||
|
||||
/*power save flag bit definitions*/
|
||||
#define HI_PWR_SAVE_LPL_ENABLED 0x1
|
||||
/*b1-b3 reserved*/
|
||||
/*b4-b5 : dev0 LPL type : 0 - none
|
||||
1- Reduce Pwr Search
|
||||
2- Reduce Pwr Listen*/
|
||||
/*b6-b7 : dev1 LPL type and so on for Max 8 devices*/
|
||||
#define HI_PWR_SAVE_LPL_DEV0_LSB 4
|
||||
#define HI_PWR_SAVE_LPL_DEV_MASK 0x3
|
||||
/*power save related utility macros*/
|
||||
#define HI_LPL_ENABLED() \
|
||||
((HOST_INTEREST->hi_pwr_save_flags & HI_PWR_SAVE_LPL_ENABLED))
|
||||
#define HI_DEV_LPL_TYPE_GET(_devix) \
|
||||
(HOST_INTEREST->hi_pwr_save_flags & \
|
||||
((HI_PWR_SAVE_LPL_DEV_MASK) << \
|
||||
(HI_PWR_SAVE_LPL_DEV0_LSB + \
|
||||
(_devix)*2)))
|
||||
|
||||
#define HOST_INTEREST_SMPS_IS_ALLOWED() \
|
||||
((HOST_INTEREST->hi_smps_options & HI_SMPS_ALLOW_MASK))
|
||||
|
||||
/* Convert a Target virtual address into a Target physical address */
|
||||
#define AR6002_VTOP(vaddr) ((vaddr) & 0x001fffff)
|
||||
#define AR6003_VTOP(vaddr) ((vaddr) & 0x001fffff)
|
||||
#define AR6004_VTOP(vaddr) (vaddr)
|
||||
#define AR6006_VTOP(vaddr) (vaddr)
|
||||
#define AR9888_VTOP(vaddr) (vaddr)
|
||||
#define AR6320_VTOP(vaddr) (vaddr)
|
||||
#define AR900B_VTOP(vaddr) (vaddr)
|
||||
#define TARG_VTOP(TargetType, vaddr) \
|
||||
(((TargetType) == TARGET_TYPE_AR6002) ? AR6002_VTOP(vaddr) : \
|
||||
(((TargetType) == TARGET_TYPE_AR6003) ? AR6003_VTOP(vaddr) : \
|
||||
(((TargetType) == TARGET_TYPE_AR6004) ? AR6004_VTOP(vaddr) : \
|
||||
(((TargetType) == TARGET_TYPE_AR6006) ? AR6006_VTOP(vaddr) : \
|
||||
(((TargetType) == TARGET_TYPE_AR9888) ? AR9888_VTOP(vaddr) : \
|
||||
(((TargetType) == TARGET_TYPE_AR6320) ? AR6320_VTOP(vaddr) : \
|
||||
(((TargetType) == TARGET_TYPE_AR900B) ? AR900B_VTOP(vaddr) : \
|
||||
0)))))))
|
||||
|
||||
#define HOST_INTEREST_ITEM_ADDRESS(TargetType, item) \
|
||||
(((TargetType) == TARGET_TYPE_AR6002) ? AR6002_HOST_INTEREST_ITEM_ADDRESS(item) : \
|
||||
(((TargetType) == TARGET_TYPE_AR6003) ? AR6003_HOST_INTEREST_ITEM_ADDRESS(item) : \
|
||||
(((TargetType) == TARGET_TYPE_AR6004) ? AR6004_HOST_INTEREST_ITEM_ADDRESS(item) : \
|
||||
(((TargetType) == TARGET_TYPE_AR6006) ? AR6006_HOST_INTEREST_ITEM_ADDRESS(item) : \
|
||||
(((TargetType) == TARGET_TYPE_AR9888) ? AR9888_HOST_INTEREST_ITEM_ADDRESS(item) : \
|
||||
(((TargetType) == TARGET_TYPE_AR6320) ? AR6320_HOST_INTEREST_ITEM_ADDRESS(item) : \
|
||||
(((TargetType) == TARGET_TYPE_AR900B) ? AR900B_HOST_INTEREST_ITEM_ADDRESS(item) : \
|
||||
0)))))))
|
||||
|
||||
#define AR6002_BOARD_DATA_SZ 768
|
||||
#define AR6002_BOARD_EXT_DATA_SZ 0
|
||||
#define AR6003_BOARD_DATA_SZ 1024
|
||||
/* Reserve 1024 bytes for extended board data */
|
||||
#if defined(AR6002_REV43)
|
||||
#define AR6003_BOARD_EXT_DATA_SZ 1024
|
||||
#else
|
||||
#define AR6003_BOARD_EXT_DATA_SZ 768
|
||||
#endif
|
||||
#define AR6004_BOARD_DATA_SZ 7168
|
||||
#define AR6004_BOARD_EXT_DATA_SZ 0
|
||||
#define AR9888_BOARD_DATA_SZ 7168
|
||||
#define AR9888_BOARD_EXT_DATA_SZ 0
|
||||
#define AR6320_BOARD_DATA_SZ 8192
|
||||
#define AR6320_BOARD_EXT_DATA_SZ 0
|
||||
#define QCA9377_BOARD_DATA_SZ 8192
|
||||
#define QCA9377_BOARD_EXT_DATA_SZ 0
|
||||
#define AR900B_BOARD_DATA_SZ (14 * 1024)
|
||||
#define AR900B_BOARD_EXT_DATA_SZ 0
|
||||
#define QCA9984_BOARD_DATA_SZ (14 * 1024)
|
||||
#define QCA9984_BOARD_EXT_DATA_SZ 0
|
||||
#define QCA9888_BOARD_DATA_SZ (14 * 1024)
|
||||
#define QCA9888_BOARD_EXT_DATA_SZ 0
|
||||
#define IPQ4019_BOARD_DATA_SZ (14 * 1024)
|
||||
#define IPQ4019_BOARD_EXT_DATA_SZ 0
|
||||
|
||||
/* Allocate board data right at the begining of AXI SRAM,
|
||||
* Current size for beeliner is 14K.
|
||||
* Allocate it towards the end of DRAM, until AXI SRAM is functional.
|
||||
*/
|
||||
#define AR900B_BOARD_DATA_ADDR 0xc0000
|
||||
#define QCA9984_BOARD_DATA_ADDR 0xc0000
|
||||
#define QCA9888_BOARD_DATA_ADDR 0xc0000
|
||||
#define IPQ4019_BOARD_DATA_ADDR 0xc0000
|
||||
|
||||
#define AR6003_REV3_APP_START_OVERRIDE 0x946100
|
||||
#define AR6003_REV3_APP_LOAD_ADDRESS 0x545000
|
||||
#define AR6003_REV3_BOARD_EXT_DATA_ADDRESS 0x542330
|
||||
#define AR6003_REV3_DATASET_PATCH_ADDRESS 0x57FF74
|
||||
#define AR6003_REV3_RAM_RESERVE_SIZE 4096
|
||||
|
||||
#define AR6004_REV1_BOARD_DATA_ADDRESS 0x423900
|
||||
#define AR6004_REV1_RAM_RESERVE_SIZE 19456
|
||||
#define AR6004_REV1_DATASET_PATCH_ADDRESS 0x425294
|
||||
|
||||
#define AR6004_REV2_BOARD_DATA_ADDRESS 0x426400
|
||||
#define AR6004_REV2_RAM_RESERVE_SIZE 7168
|
||||
#define AR6004_REV2_DATASET_PATCH_ADDRESS 0x435294
|
||||
|
||||
#define AR6004_REV5_BOARD_DATA_ADDRESS 0x436400
|
||||
#define AR6004_REV5_RAM_RESERVE_SIZE 7168
|
||||
#define AR6004_REV5_DATASET_PATCH_ADDRESS 0x437860
|
||||
|
||||
/* Reserve 4K for OTA test script */
|
||||
#define AR6004_REV1_RAM_RESERVE_SIZE_FOR_TEST_SCRIPT 4096
|
||||
#define AR6004_REV1_TEST_SCRIPT_ADDRESS 0x422900
|
||||
|
||||
/* # of A_UINT32 entries in targregs, used by DIAG_FETCH_TARG_REGS */
|
||||
#define AR6003_FETCH_TARG_REGS_COUNT 64
|
||||
#define AR6004_FETCH_TARG_REGS_COUNT 64
|
||||
#define AR9888_FETCH_TARG_REGS_COUNT 64
|
||||
#define AR6320_FETCH_TARG_REGS_COUNT 64
|
||||
#define AR900B_FETCH_TARG_REGS_COUNT 64
|
||||
|
||||
#endif /* !__ASSEMBLER__ */
|
||||
|
||||
#ifndef ATH_TARGET
|
||||
#include "athendpack.h"
|
||||
#endif
|
||||
|
||||
#endif /* __TARGADDRS_H__ */
|
||||
53
fw/targcfg.h
Executable file
53
fw/targcfg.h
Executable file
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
|
||||
*
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file was originally distributed by Qualcomm Atheros, Inc.
|
||||
* under proprietary terms before Copyright ownership was assigned
|
||||
* to the Linux Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __TARGCFG_H__
|
||||
#define __TARGCFG_H__
|
||||
|
||||
#if defined(ATH_TARGET)
|
||||
#include <osapi.h> /* A_UINT32 */
|
||||
#else
|
||||
#include <a_types.h> /* A_UINT32 */
|
||||
#endif
|
||||
|
||||
typedef struct _targcfg_t {
|
||||
A_UINT32 num_vdev;
|
||||
A_UINT32 num_peers;
|
||||
A_UINT32 num_peer_ast;
|
||||
A_UINT32 num_peer_keys;
|
||||
A_UINT32 num_peer_tid;
|
||||
A_UINT32 num_mcast_keys;
|
||||
A_UINT32 num_tx;
|
||||
A_UINT32 num_rx;
|
||||
A_UINT32 num_mgmt_tx;
|
||||
A_UINT32 num_mgmt_rx;
|
||||
A_UINT32 tx_chain_mask;
|
||||
A_UINT32 rx_chain_mask;
|
||||
A_UINT32 override; /* Override target with the values supplied above */
|
||||
} targcfg_t;
|
||||
|
||||
#endif /* __TARGCFG_H__ */
|
||||
244
fw/wal_rx_desc.h
Executable file
244
fw/wal_rx_desc.h
Executable file
|
|
@ -0,0 +1,244 @@
|
|||
/*
|
||||
* Copyright (c) 2011-2012, 2014, 2016 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
|
||||
*
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file was originally distributed by Qualcomm Atheros, Inc.
|
||||
* under proprietary terms before Copyright ownership was assigned
|
||||
* to the Linux Foundation.
|
||||
*/
|
||||
|
||||
#ifndef _WAL_RX_DESC__H_
|
||||
#define _WAL_RX_DESC__H_
|
||||
|
||||
|
||||
#if defined(ATH_TARGET)
|
||||
#include <athdefs.h> /* A_UINT8 */
|
||||
#else
|
||||
#include <a_types.h> /* A_UINT8 */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* As this header is used by host also,
|
||||
* and host will access target registers by target reg tbl,
|
||||
* so disable direct-reference here for host.
|
||||
*
|
||||
*/
|
||||
#if !defined(ATH_PERF_PWR_OFFLOAD)
|
||||
#if defined(CONFIG_AR900B_SUPPORT) || defined(AR900B) //FIXME_WIFI2 beeliner enbled by default (will be removed once we have target aware HTT)
|
||||
#include <hw/interface/rx_location_info.h>
|
||||
#include <hw/interface/rx_pkt_end.h>
|
||||
#include <hw/interface/rx_phy_ppdu_end.h>
|
||||
#include <hw/interface/rx_timing_offset.h>
|
||||
#include <hw/interface/rx_location_info.h>
|
||||
#include <hw/tlv/rx_attention.h>
|
||||
#include <hw/tlv/rx_frag_info.h>
|
||||
#include <hw/tlv/rx_msdu_start.h>
|
||||
#include <hw/tlv/rx_msdu_end.h>
|
||||
#include <hw/tlv/rx_mpdu_start.h>
|
||||
#include <hw/tlv/rx_mpdu_end.h>
|
||||
#include <hw/tlv/rx_ppdu_start.h>
|
||||
#include <hw/tlv/rx_ppdu_end.h>
|
||||
#else
|
||||
/* HW rx descriptor definitions */
|
||||
#include <mac_descriptors/rx_attention.h>
|
||||
#include <mac_descriptors/rx_frag_info.h>
|
||||
#include <mac_descriptors/rx_msdu_start.h>
|
||||
#include <mac_descriptors/rx_msdu_end.h>
|
||||
#include <mac_descriptors/rx_mpdu_start.h>
|
||||
#include <mac_descriptors/rx_mpdu_end.h>
|
||||
#include <mac_descriptors/rx_ppdu_start.h>
|
||||
#include <mac_descriptors/rx_ppdu_end.h>
|
||||
#endif
|
||||
/*
|
||||
* This struct defines the basic descriptor information, which is
|
||||
* written by the 11ac HW MAC into the WAL's rx status descriptor
|
||||
* ring.
|
||||
*/
|
||||
struct hw_rx_desc_base {
|
||||
struct rx_attention attention;
|
||||
struct rx_frag_info frag_info;
|
||||
struct rx_mpdu_start mpdu_start;
|
||||
struct rx_msdu_start msdu_start;
|
||||
struct rx_msdu_end msdu_end;
|
||||
struct rx_mpdu_end mpdu_end;
|
||||
struct rx_ppdu_start ppdu_start;
|
||||
struct rx_ppdu_end ppdu_end;
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This struct defines the basic MSDU rx descriptor created by FW.
|
||||
*/
|
||||
struct fw_rx_desc_base {
|
||||
union {
|
||||
struct {
|
||||
A_UINT8 discard : 1,
|
||||
forward : 1,
|
||||
any_err : 1,
|
||||
dup_err : 1,
|
||||
ipa_ind : 1,
|
||||
inspect : 1,
|
||||
extension: 2;
|
||||
}bits;
|
||||
A_UINT8 val;
|
||||
}u;
|
||||
};
|
||||
|
||||
#define FW_RX_DESC_DISCARD_M 0x1
|
||||
#define FW_RX_DESC_DISCARD_S 0
|
||||
#define FW_RX_DESC_FORWARD_M 0x2
|
||||
#define FW_RX_DESC_FORWARD_S 1
|
||||
#define FW_RX_DESC_ANY_ERR_M 0x4
|
||||
#define FW_RX_DESC_ANY_ERR_S 2
|
||||
#define FW_RX_DESC_DUP_ERR_M 0x8
|
||||
#define FW_RX_DESC_DUP_ERR_S 3
|
||||
#define FW_RX_DESC_INSPECT_M 0x20
|
||||
#define FW_RX_DESC_INSPECT_S 5
|
||||
#define FW_RX_DESC_EXT_M 0xc0
|
||||
#define FW_RX_DESC_EXT_S 6
|
||||
|
||||
#define FW_RX_DESC_CNT_2_BYTES(_fw_desc_cnt) (_fw_desc_cnt)
|
||||
|
||||
enum {
|
||||
FW_RX_DESC_EXT_NONE = 0,
|
||||
FW_RX_DESC_EXT_LRO_ONLY,
|
||||
FW_RX_DESC_EXT_LRO_AND_OTHER,
|
||||
FW_RX_DESC_EXT_OTHER
|
||||
};
|
||||
|
||||
#define FW_RX_DESC_DISCARD_GET(_var) \
|
||||
(((_var) & FW_RX_DESC_DISCARD_M) >> FW_RX_DESC_DISCARD_S)
|
||||
#define FW_RX_DESC_DISCARD_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_DESC_DISCARD_S))
|
||||
|
||||
#define FW_RX_DESC_FORWARD_GET(_var) \
|
||||
(((_var) & FW_RX_DESC_FORWARD_M) >> FW_RX_DESC_FORWARD_S)
|
||||
#define FW_RX_DESC_FORWARD_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_DESC_FORWARD_S))
|
||||
|
||||
#define FW_RX_DESC_INSPECT_GET(_var) \
|
||||
(((_var) & FW_RX_DESC_INSPECT_M) >> FW_RX_DESC_INSPECT_S)
|
||||
#define FW_RX_DESC_INSPECT_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_DESC_INSPECT_S))
|
||||
|
||||
#define FW_RX_DESC_EXT_GET(_var) \
|
||||
(((_var) & FW_RX_DESC_EXT_M) >> FW_RX_DESC_EXT_S)
|
||||
#define FW_RX_DESC_EXT_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_DESC_EXT_S))
|
||||
|
||||
|
||||
/*
|
||||
* This struct defines TCP_CHKSUM_OFFLOAD bit fields which are needed by host.
|
||||
*/
|
||||
struct fw_rx_msdu_info {
|
||||
union {
|
||||
/*
|
||||
* The "bits" struct defines the flags in fw_rx_msdu_info used
|
||||
* during regular operation.
|
||||
*/
|
||||
struct {
|
||||
A_UINT8 tcp_udp_chksum_fail : 1, /* for tcp checksum offload use */
|
||||
ip_chksum_fail : 1,
|
||||
ipv6_proto : 1,
|
||||
tcp_proto : 1,
|
||||
udp_proto : 1,
|
||||
ip_frag : 1,
|
||||
first_wakeup : 1,
|
||||
reserved : 1;
|
||||
} bits;
|
||||
/*
|
||||
* The "mon" struct defines the flags in fw_rx_msdu_info used
|
||||
* during monitor mode.
|
||||
*/
|
||||
struct {
|
||||
A_UINT8 last_frag : 1,
|
||||
reserved : 7;
|
||||
} mon;
|
||||
A_UINT8 val;
|
||||
} u;
|
||||
};
|
||||
|
||||
/* regular operation flags */
|
||||
|
||||
#define FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_M 0x1
|
||||
#define FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_S 0
|
||||
#define FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_M 0x2
|
||||
#define FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_S 1
|
||||
#define FW_RX_MSDU_INFO_IPV6_PROTO_M 0x4
|
||||
#define FW_RX_MSDU_INFO_IPV6_PROTO_S 2
|
||||
#define FW_RX_MSDU_INFO_TCP_PROTO_M 0x8
|
||||
#define FW_RX_MSDU_INFO_TCP_PROTO_S 3
|
||||
#define FW_RX_MSDU_INFO_UDP_PROTO_M 0x10
|
||||
#define FW_RX_MSDU_INFO_UDP_PROTO_S 4
|
||||
#define FW_RX_MSDU_INFO_IP_FRAG_M 0x20
|
||||
#define FW_RX_MSDU_INFO_IP_FRAG_S 5
|
||||
#define FW_RX_MSDU_INFO_FIRST_WAKEUP_M 0x40
|
||||
#define FW_RX_MSDU_INFO_FIRST_WAKEUP_S 6
|
||||
|
||||
#define FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_GET(_var) \
|
||||
(((_var) & FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_M) >> FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_S)
|
||||
#define FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_S))
|
||||
|
||||
#define FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_GET(_var) \
|
||||
(((_var) & FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_M) >> FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_S)
|
||||
#define FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_S))
|
||||
|
||||
#define FW_RX_MSDU_INFO_IPV6_PROTO_GET(_var) \
|
||||
(((_var) & FW_RX_MSDU_INFO_IPV6_PROTO_M) >> FW_RX_MSDU_INFO_IPV6_PROTO_S)
|
||||
#define FW_RX_MSDU_INFO_IPV6_PROTO_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_MSDU_INFO_IPV6_PROTO_S))
|
||||
|
||||
#define FW_RX_MSDU_INFO_TCP_PROTO_GET(_var) \
|
||||
(((_var) & FW_RX_MSDU_INFO_TCP_PROTO_M) >> FW_RX_MSDU_INFO_TCP_PROTO_S)
|
||||
#define FW_RX_MSDU_INFO_TCP_PROTO_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_MSDU_INFO_TCP_PROTO_S))
|
||||
|
||||
#define FW_RX_MSDU_INFO_UDP_PROTO_GET(_var) \
|
||||
(((_var) & FW_RX_MSDU_INFO_UDP_PROTO_M) >> FW_RX_MSDU_INFO_UDP_PROTO_S)
|
||||
#define FW_RX_MSDU_INFO_UDP_PROTO_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_MSDU_INFO_UDP_PROTO_S))
|
||||
|
||||
#define FW_RX_MSDU_INFO_IP_FRAG_GET(_var) \
|
||||
(((_var) & FW_RX_MSDU_INFO_IP_FRAG_M) >> FW_RX_MSDU_INFO_IP_FRAG_S)
|
||||
#define FW_RX_MSDU_INFO_IP_FRAG_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_MSDU_INFO_IP_FRAG_S))
|
||||
|
||||
#define FW_RX_MSDU_INFO_FIRST_WAKEUP_GET(_var) \
|
||||
(((_var) & FW_RX_MSDU_INFO_FIRST_WAKEUP_M) >> FW_RX_MSDU_INFO_FIRST_WAKEUP_S)
|
||||
#define FW_RX_MSDU_INFO_FIRST_WAKEUP_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_MSDU_INFO_FIRST_WAKEUP_S))
|
||||
|
||||
|
||||
/* monitor mode flags */
|
||||
|
||||
#define FW_RX_MSDU_INFO_MON_LAST_FRAG_M 0x1
|
||||
#define FW_RX_MSDU_INFO_MON_LAST_FRAG_S 0
|
||||
|
||||
|
||||
#define FW_RX_MSDU_INFO_MON_LAST_FRAG_GET(_var) \
|
||||
(((_var) & FW_RX_MSDU_INFO_MON_LAST_FRAG_M) >> FW_RX_MSDU_INFO_MON_LAST_FRAG_S)
|
||||
#define FW_RX_MSDU_INFO_MON_LAST_FRAG_SET(_var, _val) \
|
||||
((_var) |= ((_val) << FW_RX_MSDU_INFO_MON_LAST_FRAG_S))
|
||||
|
||||
|
||||
#endif /* _WAL_RX_DESC__H_ */
|
||||
895
fw/wlan_defs.h
Executable file
895
fw/wlan_defs.h
Executable file
|
|
@ -0,0 +1,895 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2010, 2013-2016 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
|
||||
*
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file was originally distributed by Qualcomm Atheros, Inc.
|
||||
* under proprietary terms before Copyright ownership was assigned
|
||||
* to the Linux Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __WLAN_DEFS_H__
|
||||
#define __WLAN_DEFS_H__
|
||||
|
||||
#include <a_osapi.h> /* A_COMPILE_TIME_ASSERT */
|
||||
|
||||
/*
|
||||
* This file contains WLAN definitions that may be used across both
|
||||
* Host and Target software.
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* MAX_SPATIAL_STREAM should be defined in a fwconfig_xxx.h file,
|
||||
* but for now provide a default value here in case it's not defined
|
||||
* in the fwconfig_xxx.h file.
|
||||
*/
|
||||
#ifndef MAX_SPATIAL_STREAM
|
||||
#define MAX_SPATIAL_STREAM 3
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_160MHZ_SUPPORT
|
||||
#define CONFIG_160MHZ_SUPPORT 0 /* default: 160 MHz channels not supported */
|
||||
#endif
|
||||
|
||||
#ifndef SUPPORT_11AX
|
||||
#define SUPPORT_11AX 0 /* 11ax not supported by default */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* MAX_SPATIAL_STREAM_ANY -
|
||||
* what is the largest number of spatial streams that any target supports
|
||||
*/
|
||||
#define MAX_SPATIAL_STREAM_ANY_V2 4 /* pre-hawkeye */
|
||||
#define MAX_SPATIAL_STREAM_ANY_V3 8 /* includes hawkeye */
|
||||
/*
|
||||
* (temporarily) leave the old MAX_SPATIAL_STREAM_ANY name in place as an alias,
|
||||
* and in case some old code is using it
|
||||
*/
|
||||
#define MAX_SPATIAL_STREAM_ANY MAX_SPATIAL_STREAM_ANY_V2 /* DEPRECATED */
|
||||
|
||||
typedef enum {
|
||||
MODE_11A = 0, /* 11a Mode */
|
||||
MODE_11G = 1, /* 11b/g Mode */
|
||||
MODE_11B = 2, /* 11b Mode */
|
||||
MODE_11GONLY = 3, /* 11g only Mode */
|
||||
MODE_11NA_HT20 = 4, /* 11a HT20 mode */
|
||||
MODE_11NG_HT20 = 5, /* 11g HT20 mode */
|
||||
MODE_11NA_HT40 = 6, /* 11a HT40 mode */
|
||||
MODE_11NG_HT40 = 7, /* 11g HT40 mode */
|
||||
MODE_11AC_VHT20 = 8,
|
||||
MODE_11AC_VHT40 = 9,
|
||||
MODE_11AC_VHT80 = 10,
|
||||
MODE_11AC_VHT20_2G = 11,
|
||||
MODE_11AC_VHT40_2G = 12,
|
||||
MODE_11AC_VHT80_2G = 13,
|
||||
#if CONFIG_160MHZ_SUPPORT
|
||||
MODE_11AC_VHT80_80 = 14,
|
||||
MODE_11AC_VHT160 = 15,
|
||||
#endif
|
||||
|
||||
#if SUPPORT_11AX
|
||||
MODE_11AX_HE20 = 16,
|
||||
MODE_11AX_HE40 = 17,
|
||||
MODE_11AX_HE80 = 18,
|
||||
MODE_11AX_HE80_80 = 19,
|
||||
MODE_11AX_HE160 = 20,
|
||||
MODE_11AX_HE20_2G = 21,
|
||||
MODE_11AX_HE40_2G = 22,
|
||||
MODE_11AX_HE80_2G = 23,
|
||||
#endif
|
||||
|
||||
/*
|
||||
* MODE_UNKNOWN should not be used within the host / target interface.
|
||||
* Thus, it is permissible for ODE_UNKNOWN to be conditionally-defined,
|
||||
* taking different values when compiling for different targets.
|
||||
*/
|
||||
MODE_UNKNOWN,
|
||||
MODE_UNKNOWN_NO_160MHZ_SUPPORT = 14, /* not needed? */
|
||||
#if 0
|
||||
MODE_UNKNOWN_NO_11AX_SUPPORT = 16, /* not needed? */
|
||||
MODE_UNKNOWN_11AX_SUPPORT = 24, /* not needed? */
|
||||
#endif
|
||||
MODE_UNKNOWN_160MHZ_SUPPORT = MODE_UNKNOWN, /* not needed? */
|
||||
|
||||
#ifdef ATHR_WIN_NWF
|
||||
PHY_MODE_MAX = MODE_UNKNOWN,
|
||||
PHY_MODE_MAX_NO_160_MHZ_SUPPORT = MODE_UNKNOWN_NO_160MHZ_SUPPORT,
|
||||
PHY_MODE_MAX_160_MHZ_SUPPORT = MODE_UNKNOWN_160MHZ_SUPPORT,
|
||||
#else
|
||||
MODE_MAX = MODE_UNKNOWN,
|
||||
MODE_MAX_NO_160_MHZ_SUPPORT = MODE_UNKNOWN_NO_160MHZ_SUPPORT,
|
||||
MODE_MAX_160_MHZ_SUPPORT = MODE_UNKNOWN_160MHZ_SUPPORT,
|
||||
#endif
|
||||
} WLAN_PHY_MODE;
|
||||
|
||||
#if CONFIG_160MHZ_SUPPORT == 0
|
||||
A_COMPILE_TIME_ASSERT(
|
||||
mode_unknown_value_consistency_Check,
|
||||
MODE_UNKNOWN == MODE_UNKNOWN_NO_160MHZ_SUPPORT);
|
||||
#else
|
||||
A_COMPILE_TIME_ASSERT(
|
||||
mode_unknown_value_consistency_Check,
|
||||
MODE_UNKNOWN == MODE_UNKNOWN_160MHZ_SUPPORT);
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
VHT_MODE_NONE = 0, /* NON VHT Mode, e.g., HT, DSSS, CCK */
|
||||
VHT_MODE_20M = 1,
|
||||
VHT_MODE_40M = 2,
|
||||
VHT_MODE_80M = 3,
|
||||
VHT_MODE_160M = 4
|
||||
} VHT_OPER_MODE;
|
||||
|
||||
typedef enum {
|
||||
WLAN_11A_CAPABILITY = 1,
|
||||
WLAN_11G_CAPABILITY = 2,
|
||||
WLAN_11AG_CAPABILITY = 3,
|
||||
} WLAN_CAPABILITY;
|
||||
|
||||
#if (NUM_SPATIAL_STREAM > 4) || SUPPORT_11AX
|
||||
typedef struct {
|
||||
A_UINT64 mask_l;
|
||||
A_UINT64 mask_h;
|
||||
} A_RATEMASK;
|
||||
#elif (NUM_SPATIAL_STREAM > 3)
|
||||
#define A_RATEMASK A_UINT64
|
||||
#else
|
||||
#define A_RATEMASK A_UINT32
|
||||
#endif
|
||||
|
||||
#if (NUM_SPATIAL_STREAM > 4) || SUPPORT_11AX
|
||||
typedef A_UINT16 A_RATE;
|
||||
typedef A_UINT16 A_RATECODE;
|
||||
#else
|
||||
typedef A_UINT8 A_RATE;
|
||||
typedef A_UINT8 A_RATECODE;
|
||||
#endif
|
||||
|
||||
#define A_RATEMASK_NUM_OCTET (sizeof (A_RATEMASK))
|
||||
#define A_RATEMASK_NUM_BITS ((sizeof (A_RATEMASK)) << 3)
|
||||
|
||||
|
||||
#if CONFIG_160MHZ_SUPPORT
|
||||
#define IS_MODE_VHT(mode) (((mode) == MODE_11AC_VHT20) || \
|
||||
((mode) == MODE_11AC_VHT40) || \
|
||||
((mode) == MODE_11AC_VHT80) || \
|
||||
((mode) == MODE_11AC_VHT80_80) || \
|
||||
((mode) == MODE_11AC_VHT160))
|
||||
#else
|
||||
#define IS_MODE_VHT(mode) (((mode) == MODE_11AC_VHT20) || \
|
||||
((mode) == MODE_11AC_VHT40) || \
|
||||
((mode) == MODE_11AC_VHT80))
|
||||
#endif
|
||||
|
||||
#define IS_MODE_HE(mode) (((mode) == MODE_11AX_HE20) || \
|
||||
((mode) == MODE_11AX_HE40) || \
|
||||
((mode) == MODE_11AX_HE80) || \
|
||||
((mode) == MODE_11AX_HE80_80) || \
|
||||
((mode) == MODE_11AX_HE160) || \
|
||||
((mode) == MODE_11AX_HE20_2G) || \
|
||||
((mode) == MODE_11AX_HE40_2G) || \
|
||||
((mode) == MODE_11AX_HE80_2G))
|
||||
|
||||
#define IS_MODE_VHT_2G(mode) (((mode) == MODE_11AC_VHT20_2G) || \
|
||||
((mode) == MODE_11AC_VHT40_2G) || \
|
||||
((mode) == MODE_11AC_VHT80_2G))
|
||||
|
||||
|
||||
#define IS_MODE_11A(mode) (((mode) == MODE_11A) || \
|
||||
((mode) == MODE_11NA_HT20) || \
|
||||
((mode) == MODE_11NA_HT40) || \
|
||||
(IS_MODE_VHT(mode)))
|
||||
|
||||
#define IS_MODE_11B(mode) ((mode) == MODE_11B)
|
||||
#define IS_MODE_11G(mode) (((mode) == MODE_11G) || \
|
||||
((mode) == MODE_11GONLY) || \
|
||||
((mode) == MODE_11NG_HT20) || \
|
||||
((mode) == MODE_11NG_HT40) || \
|
||||
(IS_MODE_VHT_2G(mode)))
|
||||
#define IS_MODE_11GN(mode) (((mode) == MODE_11NG_HT20) || \
|
||||
((mode) == MODE_11NG_HT40))
|
||||
#define IS_MODE_11GONLY(mode) ((mode) == MODE_11GONLY)
|
||||
|
||||
|
||||
enum {
|
||||
REGDMN_MODE_11A = 0x00000001, /* 11a channels */
|
||||
REGDMN_MODE_TURBO = 0x00000002, /* 11a turbo-only channels */
|
||||
REGDMN_MODE_11B = 0x00000004, /* 11b channels */
|
||||
REGDMN_MODE_PUREG = 0x00000008, /* 11g channels (OFDM only) */
|
||||
REGDMN_MODE_11G = 0x00000008, /* XXX historical */
|
||||
REGDMN_MODE_108G = 0x00000020, /* 11g+Turbo channels */
|
||||
REGDMN_MODE_108A = 0x00000040, /* 11a+Turbo channels */
|
||||
REGDMN_MODE_XR = 0x00000100, /* XR channels */
|
||||
REGDMN_MODE_11A_HALF_RATE = 0x00000200, /* 11A half rate channels */
|
||||
REGDMN_MODE_11A_QUARTER_RATE = 0x00000400, /* 11A quarter rate channels */
|
||||
REGDMN_MODE_11NG_HT20 = 0x00000800, /* 11N-G HT20 channels */
|
||||
REGDMN_MODE_11NA_HT20 = 0x00001000, /* 11N-A HT20 channels */
|
||||
REGDMN_MODE_11NG_HT40PLUS = 0x00002000, /* 11N-G HT40 + channels */
|
||||
REGDMN_MODE_11NG_HT40MINUS = 0x00004000, /* 11N-G HT40 - channels */
|
||||
REGDMN_MODE_11NA_HT40PLUS = 0x00008000, /* 11N-A HT40 + channels */
|
||||
REGDMN_MODE_11NA_HT40MINUS = 0x00010000, /* 11N-A HT40 - channels */
|
||||
REGDMN_MODE_11AC_VHT20 = 0x00020000, /* 5Ghz, VHT20 */
|
||||
REGDMN_MODE_11AC_VHT40PLUS = 0x00040000, /* 5Ghz, VHT40 + channels */
|
||||
REGDMN_MODE_11AC_VHT40MINUS = 0x00080000, /* 5Ghz VHT40 - channels */
|
||||
REGDMN_MODE_11AC_VHT80 = 0x000100000, /* 5Ghz, VHT80 channels */
|
||||
REGDMN_MODE_11AC_VHT20_2G = 0x000200000, /* 2Ghz, VHT20 */
|
||||
REGDMN_MODE_11AC_VHT40_2G = 0x000400000, /* 2Ghz, VHT40 */
|
||||
REGDMN_MODE_11AC_VHT80_2G = 0x000800000, /* 2Ghz, VHT80 */
|
||||
REGDMN_MODE_11AC_VHT160 = 0x001000000, /* 5Ghz, VHT160 */
|
||||
REGDMN_MODE_11AC_VHT40_2GPLUS = 0x002000000, /* 2Ghz, VHT40+ */
|
||||
REGDMN_MODE_11AC_VHT40_2GMINUS = 0x004000000, /* 2Ghz, VHT40- */
|
||||
REGDMN_MODE_11AC_VHT80_80 = 0x008000000, /* 5GHz, VHT80+80 */
|
||||
};
|
||||
|
||||
#define REGDMN_MODE_ALL (0xFFFFFFFF) /* REGDMN_MODE_ALL is defined out of the enum
|
||||
* to prevent the ARM compile "warning #66:
|
||||
* enumeration value is out of int range"
|
||||
* Anyway, this is a BIT-OR of all possible values.
|
||||
*/
|
||||
|
||||
#define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
|
||||
#define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
|
||||
#define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
|
||||
|
||||
|
||||
/* regulatory capabilities */
|
||||
#define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
|
||||
#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
|
||||
#define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
|
||||
#define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
|
||||
#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
|
||||
#define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMI_TLVTAG_STRUC_HAL_REG_CAPABILITIES */
|
||||
A_UINT32 eeprom_rd; /* regdomain value specified in EEPROM */
|
||||
A_UINT32 eeprom_rd_ext; /* regdomain */
|
||||
A_UINT32 regcap1; /* CAP1 capabilities bit map. */
|
||||
A_UINT32 regcap2; /* REGDMN EEPROM CAP. */
|
||||
A_UINT32 wireless_modes; /* REGDMN MODE */
|
||||
A_UINT32 low_2ghz_chan;
|
||||
A_UINT32 high_2ghz_chan;
|
||||
A_UINT32 low_5ghz_chan;
|
||||
A_UINT32 high_5ghz_chan;
|
||||
} HAL_REG_CAPABILITIES;
|
||||
|
||||
/*
|
||||
* Used to update rate-control logic with the status of the tx-completion.
|
||||
* In host-based implementation of the rate-control feature, this struture is used to
|
||||
* create the payload for HTT message/s from target to host.
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
A_RATECODE rateCode;
|
||||
A_UINT8 flags;
|
||||
} RATE_CODE;
|
||||
|
||||
typedef struct {
|
||||
RATE_CODE ptx_rc; /* rate code, bw, chain mask sgi */
|
||||
A_UINT8 reserved[2];
|
||||
A_UINT32 flags; /* Encodes information such as excessive
|
||||
retransmission, aggregate, some info
|
||||
from .11 frame control,
|
||||
STBC, LDPC, (SGI and Tx Chain Mask
|
||||
are encoded in ptx_rc->flags field),
|
||||
AMPDU truncation (BT/time based etc.),
|
||||
RTS/CTS attempt */
|
||||
A_UINT32 num_enqued; /* # of MPDUs (for non-AMPDU 1) for this rate */
|
||||
A_UINT32 num_retries; /* Total # of transmission attempt for this rate */
|
||||
A_UINT32 num_failed; /* # of failed MPDUs in A-MPDU, 0 otherwise */
|
||||
A_UINT32 ack_rssi; /* ACK RSSI: b'7..b'0 avg RSSI across all chain */
|
||||
A_UINT32 time_stamp ; /* ACK timestamp (helps determine age) */
|
||||
A_UINT32 is_probe; /* Valid if probing. Else, 0 */
|
||||
A_UINT32 ba_win_size; /* b'7..b0, block Ack Window size, b'31..b8 Resvd */
|
||||
A_UINT32 failed_ba_bmap_0_31; /* failed BA bitmap 0..31 */
|
||||
A_UINT32 failed_ba_bmap_32_63; /* failed BA bitmap 32..63 */
|
||||
A_UINT32 bmap_tried_0_31; /* enqued bitmap 0..31 */
|
||||
A_UINT32 bmap_tried_32_63; /* enqued bitmap 32..63 */
|
||||
} RC_TX_DONE_PARAMS;
|
||||
|
||||
|
||||
#define RC_SET_TX_DONE_INFO(_dst, _rc, _f, _nq, _nr, _nf, _rssi, _ts) \
|
||||
do { \
|
||||
(_dst).ptx_rc.rateCode = (_rc).rateCode; \
|
||||
(_dst).ptx_rc.flags = (_rc).flags; \
|
||||
(_dst).flags = (_f); \
|
||||
(_dst).num_enqued = (_nq); \
|
||||
(_dst).num_retries = (_nr); \
|
||||
(_dst).num_failed = (_nf); \
|
||||
(_dst).ack_rssi = (_rssi); \
|
||||
(_dst).time_stamp = (_ts); \
|
||||
} while (0)
|
||||
|
||||
#define RC_SET_TXBF_DONE_INFO(_dst, _f) \
|
||||
do { \
|
||||
(_dst).flags |= (_f); \
|
||||
} while (0)
|
||||
|
||||
/* NOTE: NUM_DYN_BW and NUM_SCHED_ENTRIES cannot be changed without breaking WMI Compatibility */
|
||||
#define NUM_SCHED_ENTRIES 2
|
||||
#define NUM_DYN_BW_MAX 4
|
||||
|
||||
/* Some products only use 20/40/80; some use 20/40/80/160 */
|
||||
#ifndef NUM_DYN_BW
|
||||
#define NUM_DYN_BW 3 /* default: support up through 80 MHz */
|
||||
#endif
|
||||
|
||||
#define NUM_DYN_BW_MASK 0x3
|
||||
|
||||
#define PROD_SCHED_BW_ENTRIES (NUM_SCHED_ENTRIES * NUM_DYN_BW)
|
||||
|
||||
#if NUM_DYN_BW > 4
|
||||
/* Extend rate table module first */
|
||||
#error "Extend rate table module first"
|
||||
#endif
|
||||
|
||||
#define MAX_IBSS_PEERS 32
|
||||
|
||||
/*
|
||||
* RC_TX_RATE_SCHEDULE and RC_TX_RATE_INFO defs are used only in the target.
|
||||
* (Host-based rate control is no longer applicable.)
|
||||
* Maintain the defs in wlanfw_cmn for the sake of existing Rome / Helium
|
||||
* targets, but for Lithium targets remove them from wlanfw_cmn and define
|
||||
* them in a target-only location instead.
|
||||
* SUPPORT_11AX is essentially used as a condition to identify Lithium targets.
|
||||
* Some host drivers would also have SUPPORT_11AX defined, and thus would lose
|
||||
* the definition of RC_TX_RATE_SCHEDULE and RC_TX_RATE_INFO, but that's okay
|
||||
* because the host should have no references to these target-only data
|
||||
* structures.
|
||||
*/
|
||||
#if !((NUM_SPATIAL_STREAM > 4) || SUPPORT_11AX)
|
||||
#if defined(CONFIG_AR900B_SUPPORT) || defined(AR900B)
|
||||
typedef struct{
|
||||
A_UINT32 psdu_len[NUM_DYN_BW * NUM_SCHED_ENTRIES];
|
||||
A_UINT16 flags[NUM_SCHED_ENTRIES][NUM_DYN_BW];
|
||||
A_RATE rix[NUM_SCHED_ENTRIES][NUM_DYN_BW];
|
||||
A_UINT8 tpc[NUM_SCHED_ENTRIES][NUM_DYN_BW];
|
||||
A_UINT32 antmask[NUM_SCHED_ENTRIES];
|
||||
A_UINT8 num_mpdus[NUM_DYN_BW * NUM_SCHED_ENTRIES];
|
||||
A_UINT16 txbf_cv_len;
|
||||
A_UINT32 txbf_cv_ptr;
|
||||
A_UINT16 txbf_flags;
|
||||
A_UINT16 txbf_cv_size;
|
||||
A_UINT8 txbf_nc_idx;
|
||||
A_UINT8 tries[NUM_SCHED_ENTRIES];
|
||||
A_UINT8 bw_mask[NUM_SCHED_ENTRIES];
|
||||
A_UINT8 max_bw[NUM_SCHED_ENTRIES];
|
||||
A_UINT8 num_sched_entries;
|
||||
A_UINT8 paprd_mask;
|
||||
A_UINT8 rts_rix;
|
||||
A_UINT8 sh_pream;
|
||||
A_UINT8 min_spacing_1_4_us;
|
||||
A_UINT8 fixed_delims;
|
||||
A_UINT8 bw_in_service;
|
||||
A_RATE probe_rix;
|
||||
A_UINT8 num_valid_rates;
|
||||
A_UINT8 rtscts_tpc;
|
||||
A_UINT8 dd_profile;
|
||||
} RC_TX_RATE_SCHEDULE;
|
||||
#else
|
||||
typedef struct{
|
||||
A_UINT32 psdu_len[NUM_DYN_BW * NUM_SCHED_ENTRIES];
|
||||
A_UINT16 flags[NUM_DYN_BW * NUM_SCHED_ENTRIES];
|
||||
A_RATE rix[NUM_DYN_BW * NUM_SCHED_ENTRIES];
|
||||
A_UINT8 tpc[NUM_DYN_BW * NUM_SCHED_ENTRIES];
|
||||
A_UINT8 num_mpdus[NUM_DYN_BW * NUM_SCHED_ENTRIES];
|
||||
A_UINT32 antmask[NUM_SCHED_ENTRIES];
|
||||
A_UINT32 txbf_cv_ptr;
|
||||
A_UINT16 txbf_cv_len;
|
||||
A_UINT8 tries[NUM_SCHED_ENTRIES];
|
||||
A_UINT8 num_valid_rates;
|
||||
A_UINT8 paprd_mask;
|
||||
A_UINT8 rts_rix;
|
||||
A_UINT8 sh_pream;
|
||||
A_UINT8 min_spacing_1_4_us;
|
||||
A_UINT8 fixed_delims;
|
||||
A_UINT8 bw_in_service;
|
||||
A_RATE probe_rix;
|
||||
} RC_TX_RATE_SCHEDULE;
|
||||
#endif
|
||||
|
||||
typedef struct{
|
||||
A_UINT16 flags[NUM_DYN_BW * NUM_SCHED_ENTRIES];
|
||||
A_RATE rix[NUM_DYN_BW * NUM_SCHED_ENTRIES];
|
||||
#ifdef DYN_TPC_ENABLE
|
||||
A_UINT8 tpc[NUM_DYN_BW * NUM_SCHED_ENTRIES];
|
||||
#endif
|
||||
#ifdef SECTORED_ANTENNA
|
||||
A_UINT32 antmask[NUM_SCHED_ENTRIES];
|
||||
#endif
|
||||
A_UINT8 tries[NUM_SCHED_ENTRIES];
|
||||
A_UINT8 num_valid_rates;
|
||||
A_UINT8 rts_rix;
|
||||
A_UINT8 sh_pream;
|
||||
A_UINT8 bw_in_service;
|
||||
A_RATE probe_rix;
|
||||
A_UINT8 dd_profile;
|
||||
} RC_TX_RATE_INFO;
|
||||
#endif /* !((NUM_SPATIAL_STREAM > 4) || SUPPORT_11AX) */
|
||||
|
||||
/*
|
||||
* Temporarily continue to provide the WHAL_RC_INIT_RC_MASKS def in wlan_defs.h
|
||||
* for older targets.
|
||||
* The WHAL_RX_INIT_RC_MASKS macro def needs to be moved into ratectrl_11ac.h
|
||||
* for all targets, but until this is complete, the WHAL_RC_INIT_RC_MASKS def
|
||||
* will be maintained here in its old location.
|
||||
*/
|
||||
#if CONFIG_160MHZ_SUPPORT == 0
|
||||
#define WHAL_RC_INIT_RC_MASKS(_rm) do { \
|
||||
_rm[WHAL_RC_MASK_IDX_NON_HT] = A_RATEMASK_OFDM_CCK; \
|
||||
_rm[WHAL_RC_MASK_IDX_HT_20] = A_RATEMASK_HT_20; \
|
||||
_rm[WHAL_RC_MASK_IDX_HT_40] = A_RATEMASK_HT_40; \
|
||||
_rm[WHAL_RC_MASK_IDX_VHT_20] = A_RATEMASK_VHT_20; \
|
||||
_rm[WHAL_RC_MASK_IDX_VHT_40] = A_RATEMASK_VHT_40; \
|
||||
_rm[WHAL_RC_MASK_IDX_VHT_80] = A_RATEMASK_VHT_80; \
|
||||
} while (0)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* strucutre describing host memory chunk.
|
||||
*/
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wlan_host_memory_chunk */
|
||||
/** id of the request that is passed up in service ready */
|
||||
A_UINT32 req_id;
|
||||
/** the physical address the memory chunk */
|
||||
A_UINT32 ptr;
|
||||
/** size of the chunk */
|
||||
A_UINT32 size;
|
||||
} wlan_host_memory_chunk;
|
||||
|
||||
#define NUM_UNITS_IS_NUM_VDEVS 0x1
|
||||
#define NUM_UNITS_IS_NUM_PEERS 0x2
|
||||
#define NUM_UNITS_IS_NUM_ACTIVE_PEERS 0x4
|
||||
/* request host to allocate memory contiguously */
|
||||
#define REQ_TO_HOST_FOR_CONT_MEMORY 0x8
|
||||
|
||||
/**
|
||||
* structure used by FW for requesting host memory
|
||||
*/
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMI_TLVTAG_STRUC_wlan_host_mem_req */
|
||||
|
||||
/** ID of the request */
|
||||
A_UINT32 req_id;
|
||||
/** size of the of each unit */
|
||||
A_UINT32 unit_size;
|
||||
/**
|
||||
* flags to indicate that
|
||||
* the number units is dependent
|
||||
* on number of resources(num vdevs num peers .. etc)
|
||||
*/
|
||||
A_UINT32 num_unit_info;
|
||||
/*
|
||||
* actual number of units to allocate . if flags in the num_unit_info
|
||||
* indicate that number of units is tied to number of a particular
|
||||
* resource to allocate then num_units filed is set to 0 and host
|
||||
* will derive the number units from number of the resources it is
|
||||
* requesting.
|
||||
*/
|
||||
A_UINT32 num_units;
|
||||
} wlan_host_mem_req;
|
||||
|
||||
typedef enum {
|
||||
IGNORE_DTIM = 0x01,
|
||||
NORMAL_DTIM = 0x02,
|
||||
STICK_DTIM = 0x03,
|
||||
AUTO_DTIM = 0x04,
|
||||
} BEACON_DTIM_POLICY;
|
||||
|
||||
/* During test it is observed that 6 * 400 = 2400 can
|
||||
* be alloced in addition to CFG_TGT_NUM_MSDU_DESC.
|
||||
* If there is any change memory requirement, this number
|
||||
* needs to be revisited. */
|
||||
#define TOTAL_VOW_ALLOCABLE 2400
|
||||
#define VOW_DESC_GRAB_MAX 800
|
||||
|
||||
#define VOW_GET_NUM_VI_STA(vow_config) (((vow_config) & 0xffff0000) >> 16)
|
||||
#define VOW_GET_DESC_PER_VI_STA(vow_config) ((vow_config) & 0x0000ffff)
|
||||
|
||||
/***TODO!!! Get these values dynamically in WMI_READY event and use it to calculate the mem req*/
|
||||
/* size in bytes required for msdu descriptor. If it changes, this should be updated. LARGE_AP
|
||||
* case is not considered. LARGE_AP is disabled when VoW is enabled.*/
|
||||
#define MSDU_DESC_SIZE 20
|
||||
|
||||
/* size in bytes required to support a peer in target.
|
||||
* This obtained by considering Two tids per peer.
|
||||
* peer structure = 168 bytes
|
||||
* tid = 96 bytes (per sta 2 means we need 192 bytes)
|
||||
* peer_cb = 16 * 2
|
||||
* key = 52 * 2
|
||||
* AST = 12 * 2
|
||||
* rate, reorder.. = 384
|
||||
* smart antenna = 50
|
||||
*/
|
||||
#define MEMORY_REQ_FOR_PEER 800
|
||||
/*
|
||||
* NB: it is important to keep all the fields in the structure dword long
|
||||
* so that it is easy to handle the statistics in BE host.
|
||||
*/
|
||||
|
||||
struct wlan_dbg_tx_stats {
|
||||
/* Num HTT cookies queued to dispatch list */
|
||||
A_INT32 comp_queued;
|
||||
/* Num HTT cookies dispatched */
|
||||
A_INT32 comp_delivered;
|
||||
/* Num MSDU queued to WAL */
|
||||
A_INT32 msdu_enqued;
|
||||
/* Num MPDU queue to WAL */
|
||||
A_INT32 mpdu_enqued;
|
||||
/* Num MSDUs dropped by WMM limit */
|
||||
A_INT32 wmm_drop;
|
||||
/* Num Local frames queued */
|
||||
A_INT32 local_enqued;
|
||||
/* Num Local frames done */
|
||||
A_INT32 local_freed;
|
||||
/* Num queued to HW */
|
||||
A_INT32 hw_queued;
|
||||
/* Num PPDU reaped from HW */
|
||||
A_INT32 hw_reaped;
|
||||
/* Num underruns */
|
||||
A_INT32 underrun;
|
||||
#if defined(AR900B)
|
||||
/* HW Paused. */
|
||||
A_UINT32 hw_paused;
|
||||
#endif
|
||||
/* Num PPDUs cleaned up in TX abort */
|
||||
A_INT32 tx_abort;
|
||||
/* Num MPDUs requed by SW */
|
||||
A_INT32 mpdus_requed;
|
||||
/* excessive retries */
|
||||
A_UINT32 tx_ko;
|
||||
#if defined(AR900B)
|
||||
A_UINT32 tx_xretry;
|
||||
#endif
|
||||
/* data hw rate code */
|
||||
A_UINT32 data_rc;
|
||||
/* Scheduler self triggers */
|
||||
A_UINT32 self_triggers;
|
||||
/* frames dropped due to excessive sw retries */
|
||||
A_UINT32 sw_retry_failure;
|
||||
/* illegal rate phy errors */
|
||||
A_UINT32 illgl_rate_phy_err;
|
||||
/* wal pdev continous xretry */
|
||||
A_UINT32 pdev_cont_xretry;
|
||||
/* wal pdev continous xretry */
|
||||
A_UINT32 pdev_tx_timeout;
|
||||
/* wal pdev resets */
|
||||
A_UINT32 pdev_resets;
|
||||
/* frames dropped due to non-availability of stateless TIDs */
|
||||
A_UINT32 stateless_tid_alloc_failure;
|
||||
/* PhY/BB underrun */
|
||||
A_UINT32 phy_underrun;
|
||||
/* MPDU is more than txop limit */
|
||||
A_UINT32 txop_ovf;
|
||||
#if defined(AR900B)
|
||||
/* Number of Sequences posted */
|
||||
A_UINT32 seq_posted;
|
||||
/* Number of Sequences failed queueing */
|
||||
A_UINT32 seq_failed_queueing;
|
||||
/* Number of Sequences completed */
|
||||
A_UINT32 seq_completed;
|
||||
/* Number of Sequences restarted */
|
||||
A_UINT32 seq_restarted;
|
||||
/* Number of MU Sequences posted */
|
||||
A_UINT32 mu_seq_posted;
|
||||
/* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT (Reset,channel change) */
|
||||
A_INT32 mpdus_sw_flush;
|
||||
/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
|
||||
A_INT32 mpdus_hw_filter;
|
||||
/* Num MPDUs truncated by PDG (TXOP, TBTT, PPDU_duration based on rate, dyn_bw) */
|
||||
A_INT32 mpdus_truncated;
|
||||
/* Num MPDUs that was tried but didn't receive ACK or BA */
|
||||
A_INT32 mpdus_ack_failed;
|
||||
/* Num MPDUs that was dropped du to expiry. */
|
||||
A_INT32 mpdus_expired;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct wlan_dbg_rx_stats {
|
||||
/* Cnts any change in ring routing mid-ppdu */
|
||||
A_INT32 mid_ppdu_route_change;
|
||||
/* Total number of statuses processed */
|
||||
A_INT32 status_rcvd;
|
||||
/* Extra frags on rings 0-3 */
|
||||
A_INT32 r0_frags;
|
||||
A_INT32 r1_frags;
|
||||
A_INT32 r2_frags;
|
||||
A_INT32 r3_frags;
|
||||
/* MSDUs / MPDUs delivered to HTT */
|
||||
A_INT32 htt_msdus;
|
||||
A_INT32 htt_mpdus;
|
||||
/* MSDUs / MPDUs delivered to local stack */
|
||||
A_INT32 loc_msdus;
|
||||
A_INT32 loc_mpdus;
|
||||
/* AMSDUs that have more MSDUs than the status ring size */
|
||||
A_INT32 oversize_amsdu;
|
||||
/* Number of PHY errors */
|
||||
A_INT32 phy_errs;
|
||||
/* Number of PHY errors drops */
|
||||
A_INT32 phy_err_drop;
|
||||
/* Number of mpdu errors - FCS, MIC, ENC etc. */
|
||||
A_INT32 mpdu_errs;
|
||||
#if defined(AR900B)
|
||||
/* Number of rx overflow errors. */
|
||||
A_INT32 rx_ovfl_errs;
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
struct wlan_dbg_mem_stats {
|
||||
A_UINT32 iram_free_size;
|
||||
A_UINT32 dram_free_size;
|
||||
};
|
||||
|
||||
struct wlan_dbg_peer_stats {
|
||||
|
||||
A_INT32 dummy; /* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */
|
||||
};
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 mcs[10];
|
||||
A_UINT32 sgi[10];
|
||||
A_UINT32 nss[4];
|
||||
A_UINT32 nsts;
|
||||
A_UINT32 stbc[10];
|
||||
A_UINT32 bw[3];
|
||||
A_UINT32 pream[6];
|
||||
A_UINT32 ldpc;
|
||||
A_UINT32 txbf;
|
||||
A_UINT32 mgmt_rssi;
|
||||
A_UINT32 data_rssi;
|
||||
A_UINT32 rssi_chain0;
|
||||
A_UINT32 rssi_chain1;
|
||||
A_UINT32 rssi_chain2;
|
||||
/*
|
||||
* TEMPORARY: leave rssi_chain3 in place for AR900B builds until code using
|
||||
* rssi_chain3 has been converted to use wlan_dbg_rx_rate_info_v2_t.
|
||||
* At that time, this rssi_chain3 field will be deleted.
|
||||
*/
|
||||
#if defined(AR900B)
|
||||
A_UINT32 rssi_chain3;
|
||||
#endif
|
||||
} wlan_dbg_rx_rate_info_t ;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 mcs[10];
|
||||
A_UINT32 sgi[10];
|
||||
/*
|
||||
* TEMPORARY: leave nss conditionally defined, until all code that
|
||||
* requires nss[4] is converted to use wlan_dbg_tx_rate_info_v2_t.
|
||||
* At that time, this nss array will be made length = 3 unconditionally.
|
||||
*/
|
||||
#if defined(CONFIG_AR900B_SUPPORT) || defined(AR900B)
|
||||
A_UINT32 nss[4];
|
||||
#else
|
||||
A_UINT32 nss[3];
|
||||
#endif
|
||||
A_UINT32 stbc[10];
|
||||
A_UINT32 bw[3];
|
||||
A_UINT32 pream[4];
|
||||
A_UINT32 ldpc;
|
||||
A_UINT32 rts_cnt;
|
||||
A_UINT32 ack_rssi;
|
||||
} wlan_dbg_tx_rate_info_t ;
|
||||
|
||||
#define WLAN_MAX_MCS 10
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 mcs[WLAN_MAX_MCS];
|
||||
A_UINT32 sgi[WLAN_MAX_MCS];
|
||||
A_UINT32 nss[MAX_SPATIAL_STREAM_ANY_V2];
|
||||
A_UINT32 nsts;
|
||||
A_UINT32 stbc[WLAN_MAX_MCS];
|
||||
A_UINT32 bw[NUM_DYN_BW_MAX];
|
||||
A_UINT32 pream[6];
|
||||
A_UINT32 ldpc;
|
||||
A_UINT32 txbf;
|
||||
A_UINT32 mgmt_rssi;
|
||||
A_UINT32 data_rssi;
|
||||
A_UINT32 rssi_chain0;
|
||||
A_UINT32 rssi_chain1;
|
||||
A_UINT32 rssi_chain2;
|
||||
A_UINT32 rssi_chain3;
|
||||
A_UINT32 reserved[8];
|
||||
} wlan_dbg_rx_rate_info_v2_t;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 mcs[WLAN_MAX_MCS];
|
||||
A_UINT32 sgi[WLAN_MAX_MCS];
|
||||
A_UINT32 nss[MAX_SPATIAL_STREAM_ANY_V2];
|
||||
A_UINT32 stbc[WLAN_MAX_MCS];
|
||||
A_UINT32 bw[NUM_DYN_BW_MAX];
|
||||
A_UINT32 pream[4];
|
||||
A_UINT32 ldpc;
|
||||
A_UINT32 rts_cnt;
|
||||
A_UINT32 ack_rssi;
|
||||
A_UINT32 reserved[8];
|
||||
} wlan_dbg_tx_rate_info_v2_t;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 mcs[WLAN_MAX_MCS];
|
||||
A_UINT32 sgi[WLAN_MAX_MCS];
|
||||
A_UINT32 nss[MAX_SPATIAL_STREAM_ANY_V3];
|
||||
A_UINT32 nsts;
|
||||
A_UINT32 stbc[WLAN_MAX_MCS];
|
||||
A_UINT32 bw[NUM_DYN_BW_MAX];
|
||||
A_UINT32 pream[6];
|
||||
A_UINT32 ldpc;
|
||||
A_UINT32 txbf;
|
||||
A_UINT32 mgmt_rssi;
|
||||
A_UINT32 data_rssi;
|
||||
A_UINT32 rssi_chain0;
|
||||
A_UINT32 rssi_chain1;
|
||||
A_UINT32 rssi_chain2;
|
||||
A_UINT32 rssi_chain3;
|
||||
A_UINT32 reserved[8];
|
||||
} wlan_dbg_rx_rate_info_v3_t;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 mcs[WLAN_MAX_MCS];
|
||||
A_UINT32 sgi[WLAN_MAX_MCS];
|
||||
A_UINT32 nss[MAX_SPATIAL_STREAM_ANY_V3];
|
||||
A_UINT32 stbc[WLAN_MAX_MCS];
|
||||
A_UINT32 bw[NUM_DYN_BW_MAX];
|
||||
A_UINT32 pream[4];
|
||||
A_UINT32 ldpc;
|
||||
A_UINT32 rts_cnt;
|
||||
A_UINT32 ack_rssi;
|
||||
A_UINT32 reserved[8];
|
||||
} wlan_dbg_tx_rate_info_v3_t;
|
||||
|
||||
#define WHAL_DBG_PHY_ERR_MAXCNT 18
|
||||
#define WHAL_DBG_SIFS_STATUS_MAXCNT 8
|
||||
#define WHAL_DBG_SIFS_ERR_MAXCNT 8
|
||||
#define WHAL_DBG_CMD_RESULT_MAXCNT 11
|
||||
#define WHAL_DBG_CMD_STALL_ERR_MAXCNT 4
|
||||
#define WHAL_DBG_FLUSH_REASON_MAXCNT 40
|
||||
|
||||
typedef enum {
|
||||
WIFI_URRN_STATS_FIRST_PKT,
|
||||
WIFI_URRN_STATS_BETWEEN_MPDU,
|
||||
WIFI_URRN_STATS_WITHIN_MPDU,
|
||||
WHAL_MAX_URRN_STATS
|
||||
} wifi_urrn_type_t;
|
||||
|
||||
typedef struct wlan_dbg_txbf_snd_stats {
|
||||
A_UINT32 cbf_20[4];
|
||||
A_UINT32 cbf_40[4];
|
||||
A_UINT32 cbf_80[4];
|
||||
A_UINT32 sounding[9];
|
||||
A_UINT32 cbf_160[4];
|
||||
} wlan_dbg_txbf_snd_stats_t;
|
||||
|
||||
typedef struct wlan_dbg_wifi2_error_stats {
|
||||
A_UINT32 urrn_stats[WHAL_MAX_URRN_STATS];
|
||||
A_UINT32 flush_errs[WHAL_DBG_FLUSH_REASON_MAXCNT];
|
||||
A_UINT32 schd_stall_errs[WHAL_DBG_CMD_STALL_ERR_MAXCNT];
|
||||
A_UINT32 schd_cmd_result[WHAL_DBG_CMD_RESULT_MAXCNT];
|
||||
A_UINT32 sifs_status[WHAL_DBG_SIFS_STATUS_MAXCNT];
|
||||
A_UINT8 phy_errs[WHAL_DBG_PHY_ERR_MAXCNT];
|
||||
A_UINT32 rx_rate_inval;
|
||||
} wlan_dbg_wifi2_error_stats_t;
|
||||
|
||||
typedef struct wlan_dbg_wifi2_error2_stats {
|
||||
A_UINT32 schd_errs[WHAL_DBG_CMD_STALL_ERR_MAXCNT];
|
||||
A_UINT32 sifs_errs[WHAL_DBG_SIFS_ERR_MAXCNT];
|
||||
} wlan_dbg_wifi2_error2_stats_t;
|
||||
|
||||
#define WLAN_DBG_STATS_SIZE_TXBF_VHT 10
|
||||
#define WLAN_DBG_STATS_SIZE_TXBF_HT 8
|
||||
#define WLAN_DBG_STATS_SIZE_TXBF_OFDM 8
|
||||
#define WLAN_DBG_STATS_SIZE_TXBF_CCK 7
|
||||
|
||||
typedef struct wlan_dbg_txbf_data_stats {
|
||||
A_UINT32 tx_txbf_vht[WLAN_DBG_STATS_SIZE_TXBF_VHT];
|
||||
A_UINT32 rx_txbf_vht[WLAN_DBG_STATS_SIZE_TXBF_VHT];
|
||||
A_UINT32 tx_txbf_ht[WLAN_DBG_STATS_SIZE_TXBF_HT];
|
||||
A_UINT32 tx_txbf_ofdm[WLAN_DBG_STATS_SIZE_TXBF_OFDM];
|
||||
A_UINT32 tx_txbf_cck[WLAN_DBG_STATS_SIZE_TXBF_CCK];
|
||||
} wlan_dbg_txbf_data_stats_t;
|
||||
|
||||
struct wlan_dbg_tx_mu_stats {
|
||||
A_UINT32 mu_sch_nusers_2;
|
||||
A_UINT32 mu_sch_nusers_3;
|
||||
A_UINT32 mu_mpdus_queued_usr[4];
|
||||
A_UINT32 mu_mpdus_tried_usr[4];
|
||||
A_UINT32 mu_mpdus_failed_usr[4];
|
||||
A_UINT32 mu_mpdus_requeued_usr[4];
|
||||
A_UINT32 mu_err_no_ba_usr[4];
|
||||
A_UINT32 mu_mpdu_underrun_usr[4];
|
||||
A_UINT32 mu_ampdu_underrun_usr[4];
|
||||
};
|
||||
|
||||
struct wlan_dbg_tx_selfgen_stats {
|
||||
A_UINT32 su_ndpa;
|
||||
A_UINT32 su_ndp;
|
||||
A_UINT32 mu_ndpa;
|
||||
A_UINT32 mu_ndp;
|
||||
A_UINT32 mu_brpoll_1;
|
||||
A_UINT32 mu_brpoll_2;
|
||||
A_UINT32 mu_bar_1;
|
||||
A_UINT32 mu_bar_2;
|
||||
A_UINT32 cts_burst;
|
||||
A_UINT32 su_ndp_err;
|
||||
A_UINT32 su_ndpa_err;
|
||||
A_UINT32 mu_ndp_err;
|
||||
A_UINT32 mu_brp1_err;
|
||||
A_UINT32 mu_brp2_err;
|
||||
};
|
||||
|
||||
typedef struct wlan_dbg_sifs_resp_stats {
|
||||
A_UINT32 ps_poll_trigger; /* num ps-poll trigger frames */
|
||||
A_UINT32 uapsd_trigger; /* num uapsd trigger frames */
|
||||
A_UINT32 qb_data_trigger[2]; /* num data trigger frames; idx 0: explicit and idx 1: implicit */
|
||||
A_UINT32 qb_bar_trigger[2]; /* num bar trigger frames; idx 0: explicit and idx 1: implicit */
|
||||
A_UINT32 sifs_resp_data; /* num ppdus transmitted at SIFS interval */
|
||||
A_UINT32 sifs_resp_err; /* num ppdus failed to meet SIFS resp timing */
|
||||
} wlan_dgb_sifs_resp_stats_t;
|
||||
|
||||
|
||||
|
||||
/** wlan_dbg_wifi2_error_stats_t is not grouped with the
|
||||
* following structure as it is allocated differently and only
|
||||
* belongs to whal
|
||||
*/
|
||||
typedef struct wlan_dbg_stats_wifi2 {
|
||||
wlan_dbg_txbf_snd_stats_t txbf_snd_info;
|
||||
wlan_dbg_txbf_data_stats_t txbf_data_info;
|
||||
struct wlan_dbg_tx_selfgen_stats tx_selfgen;
|
||||
struct wlan_dbg_tx_mu_stats tx_mu;
|
||||
wlan_dgb_sifs_resp_stats_t sifs_resp_info;
|
||||
} wlan_dbg_wifi2_stats_t;
|
||||
|
||||
typedef struct {
|
||||
wlan_dbg_rx_rate_info_t rx_phy_info;
|
||||
wlan_dbg_tx_rate_info_t tx_rate_info;
|
||||
} wlan_dbg_rate_info_t;
|
||||
|
||||
typedef struct {
|
||||
wlan_dbg_rx_rate_info_v2_t rx_phy_info;
|
||||
wlan_dbg_tx_rate_info_v2_t tx_rate_info;
|
||||
} wlan_dbg_rate_info_v2_t;
|
||||
|
||||
struct wlan_dbg_stats {
|
||||
struct wlan_dbg_tx_stats tx;
|
||||
struct wlan_dbg_rx_stats rx;
|
||||
#if defined(AR900B)
|
||||
struct wlan_dbg_mem_stats mem;
|
||||
#endif
|
||||
struct wlan_dbg_peer_stats peer;
|
||||
};
|
||||
|
||||
#define DBG_STATS_MAX_HWQ_NUM 10
|
||||
#define DBG_STATS_MAX_TID_NUM 20
|
||||
#define DBG_STATS_MAX_CONG_NUM 16
|
||||
struct wlan_dbg_txq_stats {
|
||||
A_UINT16 num_pkts_queued[DBG_STATS_MAX_HWQ_NUM];
|
||||
A_UINT16 tid_hw_qdepth[DBG_STATS_MAX_TID_NUM]; /* WAL_MAX_TID is 20 */
|
||||
A_UINT16 tid_sw_qdepth[DBG_STATS_MAX_TID_NUM]; /* WAL_MAX_TID is 20 */
|
||||
};
|
||||
|
||||
struct wlan_dbg_tidq_stats{
|
||||
A_UINT32 wlan_dbg_tid_txq_status;
|
||||
struct wlan_dbg_txq_stats txq_st;
|
||||
};
|
||||
|
||||
#endif /* __WLANDEFS_H__ */
|
||||
89
fw/wlan_module_ids.h
Executable file
89
fw/wlan_module_ids.h
Executable file
|
|
@ -0,0 +1,89 @@
|
|||
|
||||
/*
|
||||
* This file was originally distributed by Qualcomm Atheros, Inc.
|
||||
* under proprietary terms before Copyright ownership was assigned
|
||||
* to the Linux Foundation.
|
||||
*/
|
||||
|
||||
#ifndef _WLAN_MODULE_IDS_H_
|
||||
#define _WLAN_MODULE_IDS_H_
|
||||
|
||||
/* Wlan module ids , global across all the modules */
|
||||
typedef enum {
|
||||
WLAN_MODULE_ID_MIN = 0,
|
||||
WLAN_MODULE_INF = WLAN_MODULE_ID_MIN, /* 0x0 */
|
||||
WLAN_MODULE_WMI, /* 0x1 */
|
||||
WLAN_MODULE_STA_PWRSAVE, /* 0x2 */
|
||||
WLAN_MODULE_WHAL, /* 0x3 */
|
||||
WLAN_MODULE_COEX, /* 0x4 */
|
||||
WLAN_MODULE_ROAM, /* 0x5 */
|
||||
WLAN_MODULE_RESMGR_CHAN_MANAGER, /* 0x6 */
|
||||
WLAN_MODULE_RESMGR, /* 0x7 */
|
||||
WLAN_MODULE_VDEV_MGR, /* 0x8 */
|
||||
WLAN_MODULE_SCAN, /* 0x9 */
|
||||
WLAN_MODULE_RATECTRL, /* 0xa */
|
||||
WLAN_MODULE_AP_PWRSAVE, /* 0xb */
|
||||
WLAN_MODULE_BLOCKACK, /* 0xc */
|
||||
WLAN_MODULE_MGMT_TXRX, /* 0xd */
|
||||
WLAN_MODULE_DATA_TXRX, /* 0xe */
|
||||
WLAN_MODULE_HTT, /* 0xf */
|
||||
WLAN_MODULE_HOST, /* 0x10 */
|
||||
WLAN_MODULE_BEACON, /* 0x11 */
|
||||
WLAN_MODULE_OFFLOAD, /* 0x12 */
|
||||
WLAN_MODULE_WAL, /* 0x13 */
|
||||
WAL_MODULE_DE, /* 0x14 */
|
||||
WLAN_MODULE_PCIELP, /* 0x15 */
|
||||
WLAN_MODULE_RTT, /* 0x16 */
|
||||
WLAN_MODULE_RESOURCE, /* 0x17 */
|
||||
WLAN_MODULE_DCS, /* 0x18 */
|
||||
WLAN_MODULE_CACHEMGR, /* 0x19 */
|
||||
WLAN_MODULE_ANI, /* 0x1a */
|
||||
WLAN_MODULE_P2P, /* 0x1b */
|
||||
WLAN_MODULE_CSA, /* 0x1c */
|
||||
WLAN_MODULE_NLO, /* 0x1d */
|
||||
WLAN_MODULE_CHATTER, /* 0x1e */
|
||||
WLAN_MODULE_WOW, /* 0x1f */
|
||||
WLAN_MODULE_WAL_VDEV, /* 0x20 */
|
||||
WLAN_MODULE_WAL_PDEV, /* 0x21 */
|
||||
WLAN_MODULE_TEST, /* 0x22 */
|
||||
WLAN_MODULE_STA_SMPS, /* 0x23 */
|
||||
WLAN_MODULE_SWBMISS, /* 0x24 */
|
||||
WLAN_MODULE_WMMAC, /* 0x25 */
|
||||
WLAN_MODULE_TDLS, /* 0x26 */
|
||||
WLAN_MODULE_HB, /* 0x27 */
|
||||
WLAN_MODULE_TXBF, /* 0x28 */
|
||||
WLAN_MODULE_BATCH_SCAN, /* 0x29 */
|
||||
WLAN_MODULE_THERMAL_MGR, /* 0x2a */
|
||||
WLAN_MODULE_PHYERR_DFS, /* 0x2b */
|
||||
WLAN_MODULE_RMC, /* 0x2c */
|
||||
WLAN_MODULE_STATS, /* 0x2d */
|
||||
WLAN_MODULE_NAN, /* 0x2e */
|
||||
WLAN_MODULE_IBSS_PWRSAVE, /* 0x2f */
|
||||
WLAN_MODULE_HIF_UART, /* 0x30 */
|
||||
WLAN_MODULE_LPI, /* 0x31 */
|
||||
WLAN_MODULE_EXTSCAN, /* 0x32 */
|
||||
WLAN_MODULE_UNIT_TEST, /* 0x33 */
|
||||
WLAN_MODULE_MLME, /* 0x34 */
|
||||
WLAN_MODULE_SUPPL, /* 0x35 */
|
||||
WLAN_MODULE_ERE, /* 0x36 */
|
||||
WLAN_MODULE_OCB, /* 0x37 */
|
||||
WLAN_MODULE_RSSI_MONITOR, /* 0x38 */
|
||||
WLAN_MODULE_WPM, /* 0x39 */
|
||||
WLAN_MODULE_CSS, /* 0x3a */
|
||||
WLAN_MODULE_PPS, /* 0x3b */
|
||||
WLAN_MODULE_SCAN_CH_PREDICT, /* 0x3c */
|
||||
WLAN_MODULE_MAWC, /* 0x3d */
|
||||
WLAN_MODULE_CMC_QMIC, /* 0x3e */
|
||||
WLAN_MODULE_EGAP, /* 0x3f */
|
||||
WLAN_MODULE_NAN20, /* 0x40 */
|
||||
WLAN_MODULE_QBOOST, /* 0x41 */
|
||||
WLAN_MODULE_P2P_LISTEN_OFFLOAD, /* 0x42 */
|
||||
WLAN_MODULE_HALPHY, /* 0x43 */
|
||||
WAL_MODULE_ENQ, /* 0x44 */
|
||||
|
||||
WLAN_MODULE_ID_MAX,
|
||||
WLAN_MODULE_ID_INVALID = WLAN_MODULE_ID_MAX,
|
||||
} WLAN_MODULE_ID;
|
||||
|
||||
|
||||
#endif /* _WLAN_MODULE_IDS_H_ */
|
||||
198
fw/wmi.h
Executable file
198
fw/wmi.h
Executable file
|
|
@ -0,0 +1,198 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2010, 2013-2014, 2016 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
|
||||
*
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file was originally distributed by Qualcomm Atheros, Inc.
|
||||
* under proprietary terms before Copyright ownership was assigned
|
||||
* to the Linux Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file contains the definitions of the WMI protocol specified in the
|
||||
* Wireless Module Interface (WMI). It includes definitions of all the
|
||||
* commands and events. Commands are messages from the host to the WM.
|
||||
* Events and Replies are messages from the WM to the host.
|
||||
*
|
||||
* Ownership of correctness in regards to commands
|
||||
* belongs to the host driver and the WMI is not required to validate
|
||||
* parameters for value, proper range, or any other checking.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _WMI_H_
|
||||
#define _WMI_H_
|
||||
|
||||
#include "wlan_defs.h"
|
||||
#include "wmix.h"
|
||||
#include "wmi_unified.h"
|
||||
#include "wmi_tlv_helper.h"
|
||||
#include "wmi_tlv_defs.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
#define HTC_PROTOCOL_VERSION 0x0002
|
||||
|
||||
#define WMI_PROTOCOL_VERSION 0x0002
|
||||
|
||||
#define WMI_MODE_MAX 8
|
||||
#define WMI_MAX_RATE_MASK 6
|
||||
|
||||
|
||||
PREPACK struct host_app_area_s {
|
||||
A_UINT32 wmi_protocol_ver;
|
||||
} POSTPACK;
|
||||
|
||||
|
||||
#undef MS
|
||||
#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
|
||||
#undef SM
|
||||
#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
|
||||
#undef WO
|
||||
#define WO(_f) ((_f##_OFFSET) >> 2)
|
||||
|
||||
#undef GET_FIELD
|
||||
#define GET_FIELD(_addr, _f) MS(*((A_UINT32 *)(_addr) + WO(_f)), _f)
|
||||
#undef SET_FIELD
|
||||
#define SET_FIELD(_addr, _f, _val) \
|
||||
(*((A_UINT32 *)(_addr) + WO(_f)) = \
|
||||
(*((A_UINT32 *)(_addr) + WO(_f)) & ~_f##_MASK) | SM(_val, _f))
|
||||
|
||||
#define WMI_GET_FIELD(_msg_buf, _msg_type, _f) \
|
||||
GET_FIELD(_msg_buf, _msg_type ## _ ## _f)
|
||||
|
||||
#define WMI_SET_FIELD(_msg_buf, _msg_type, _f, _val) \
|
||||
SET_FIELD(_msg_buf, _msg_type ## _ ## _f, _val)
|
||||
|
||||
#define WMI_EP_APASS WMI_EP_APSS /* TYPO: leave incorrect name as an alias for the correct name */
|
||||
#define WMI_EP_APSS 0x0 /* WLAN driver running on apps processor sub-system */
|
||||
#define WMI_EP_LPASS 0x1
|
||||
#define WMI_EP_SENSOR 0x2
|
||||
#define WMI_EP_NANOHUB 0x3 /* WLAN driver running on NANO Hub */
|
||||
#define WMI_EP_MODEM 0x4
|
||||
#define WMI_EP_LOCATION 0x5
|
||||
|
||||
/*
|
||||
* Control Path
|
||||
*/
|
||||
typedef PREPACK struct {
|
||||
A_UINT32 commandId : 24,
|
||||
reserved : 2, /* used for WMI endpoint ID */
|
||||
plt_priv : 6; /* platform private */
|
||||
} POSTPACK WMI_CMD_HDR; /* used for commands and events */
|
||||
|
||||
#define WMI_CMD_HDR_COMMANDID_LSB 0
|
||||
#define WMI_CMD_HDR_COMMANDID_MASK 0x00ffffff
|
||||
#define WMI_CMD_HDR_COMMANDID_OFFSET 0x00000000
|
||||
#define WMI_CMD_HDR_WMI_ENDPOINTID_MASK 0x03000000
|
||||
#define WMI_CMD_HDR_WMI_ENDPOINTID_OFFSET 24
|
||||
#define WMI_CMD_HDR_PLT_PRIV_LSB 24
|
||||
#define WMI_CMD_HDR_PLT_PRIV_MASK 0xff000000
|
||||
#define WMI_CMD_HDR_PLT_PRIV_OFFSET 0x00000000
|
||||
|
||||
/*
|
||||
* List of Commnands
|
||||
*/
|
||||
typedef enum {
|
||||
WMI_EXTENSION_CMDID, //used in wmi_svc.c /* Non-wireless extensions */
|
||||
WMI_IGNORE_CMDID, //used in wlan_wmi.c
|
||||
} WMI_COMMAND_ID;
|
||||
|
||||
|
||||
typedef enum {
|
||||
NONE_CRYPT = 0x01,
|
||||
WEP_CRYPT = 0x02,
|
||||
TKIP_CRYPT = 0x04,
|
||||
AES_CRYPT = 0x08,
|
||||
#ifdef WAPI_ENABLE
|
||||
WAPI_CRYPT = 0x10,
|
||||
#endif /*WAPI_ENABLE*/
|
||||
} CRYPTO_TYPE;
|
||||
|
||||
#define WMI_MAX_SSID_LEN 32
|
||||
|
||||
/*
|
||||
* WMI_SET_PMK_CMDID
|
||||
*/
|
||||
#define WMI_PMK_LEN 32
|
||||
|
||||
|
||||
/*
|
||||
* WMI_ADD_CIPHER_KEY_CMDID
|
||||
*/
|
||||
typedef enum {
|
||||
PAIRWISE_USAGE = 0x00,
|
||||
GROUP_USAGE = 0x01,
|
||||
TX_USAGE = 0x02, /* default Tx Key - Static WEP only */
|
||||
} KEY_USAGE;
|
||||
/*
|
||||
* List of Events (target to host)
|
||||
*/
|
||||
typedef enum {
|
||||
WMI_EXTENSION_EVENTID //wmi_profhook.c and umac_wmi_events.c
|
||||
} WMI_EVENT_ID;
|
||||
|
||||
typedef enum {
|
||||
WMI_11A_CAPABILITY = 1,
|
||||
WMI_11G_CAPABILITY = 2,
|
||||
WMI_11AG_CAPABILITY = 3,
|
||||
WMI_11NA_CAPABILITY = 4,
|
||||
WMI_11NG_CAPABILITY = 5,
|
||||
WMI_11NAG_CAPABILITY = 6,
|
||||
WMI_11AC_CAPABILITY = 7,
|
||||
WMI_11AX_CAPABILITY = 8,
|
||||
// END CAPABILITY
|
||||
WMI_11N_CAPABILITY_OFFSET = (WMI_11NA_CAPABILITY - WMI_11A_CAPABILITY),
|
||||
} WMI_PHY_CAPABILITY;
|
||||
|
||||
|
||||
/* Deprectated, need clean up */
|
||||
#define WMI_MAX_RX_META_SZ (12)
|
||||
|
||||
typedef PREPACK struct {
|
||||
A_INT8 rssi;
|
||||
A_UINT8 info; /* usage of 'info' field(8-bit):
|
||||
* b1:b0 - WMI_MSG_TYPE
|
||||
* b4:b3:b2 - UP(tid)
|
||||
* b5 - Used in AP mode. More-data in tx dir, PS in rx.
|
||||
* b7:b6 - Dot3 header(0),
|
||||
* Dot11 Header(1),
|
||||
* ACL data(2)
|
||||
*/
|
||||
|
||||
A_UINT16 info2; /* usage of 'info2' field(16-bit):
|
||||
* b11:b0 - seq_no
|
||||
* b12 - A-MSDU?
|
||||
* b15:b13 - META_DATA_VERSION 0 - 7
|
||||
*/
|
||||
A_UINT16 info3; /* b3:b2:b1:b0 - device id
|
||||
* b4 - Used in AP mode. uAPSD trigger in rx, EOSP in tx
|
||||
* b7:b5 - unused?
|
||||
* b15:b8 - pad before data start(irrespective of meta version)
|
||||
*/
|
||||
} POSTPACK WMI_DATA_HDR;
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _WMI_H_ */
|
||||
265
fw/wmi_services.h
Executable file
265
fw/wmi_services.h
Executable file
|
|
@ -0,0 +1,265 @@
|
|||
/*
|
||||
* Copyright (c) 2011-2016 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
|
||||
*
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file was originally distributed by Qualcomm Atheros, Inc.
|
||||
* under proprietary terms before Copyright ownership was assigned
|
||||
* to the Linux Foundation.
|
||||
*/
|
||||
|
||||
/**
|
||||
* This file defines WMI services bitmap and the set of WMI services .
|
||||
* defines macrso to set/clear/get different service bits from the bitmap.
|
||||
* the service bitmap is sent up to the host via WMI_READY command.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _WMI_SERVICES_H_
|
||||
#define _WMI_SERVICES_H_
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
typedef enum {
|
||||
WMI_SERVICE_BEACON_OFFLOAD=0, /* beacon offload */
|
||||
WMI_SERVICE_SCAN_OFFLOAD=1, /* scan offload */
|
||||
WMI_SERVICE_ROAM_SCAN_OFFLOAD=2, /* roam scan offload */
|
||||
WMI_SERVICE_BCN_MISS_OFFLOAD=3, /* beacon miss offload */
|
||||
WMI_SERVICE_STA_PWRSAVE=4, /* fake sleep + basic power save */
|
||||
WMI_SERVICE_STA_ADVANCED_PWRSAVE=5, /* uapsd, pspoll, force sleep */
|
||||
WMI_SERVICE_AP_UAPSD=6, /* uapsd on AP */
|
||||
WMI_SERVICE_AP_DFS=7, /* DFS on AP */
|
||||
WMI_SERVICE_11AC=8, /* supports 11ac */
|
||||
WMI_SERVICE_BLOCKACK=9, /* Supports triggering ADDBA/DELBA from host*/
|
||||
WMI_SERVICE_PHYERR=10, /* PHY error */
|
||||
WMI_SERVICE_BCN_FILTER=11, /* Beacon filter support */
|
||||
WMI_SERVICE_RTT=12, /* RTT (round trip time) support */
|
||||
WMI_SERVICE_WOW=13, /* WOW Support */
|
||||
WMI_SERVICE_RATECTRL_CACHE=14, /* Rate-control caching */
|
||||
WMI_SERVICE_IRAM_TIDS=15, /* TIDs in IRAM */
|
||||
WMI_SERVICE_ARPNS_OFFLOAD=16, /* ARP NS Offload support for STA vdev */
|
||||
WMI_SERVICE_NLO=17, /* Network list offload service */
|
||||
WMI_SERVICE_GTK_OFFLOAD=18, /* GTK offload */
|
||||
WMI_SERVICE_SCAN_SCH=19, /* Scan Scheduler Service */
|
||||
WMI_SERVICE_CSA_OFFLOAD=20, /* CSA offload service */
|
||||
WMI_SERVICE_CHATTER=21, /* Chatter service */
|
||||
WMI_SERVICE_COEX_FREQAVOID=22, /* FW report freq range to avoid */
|
||||
WMI_SERVICE_PACKET_POWER_SAVE=23, /* packet power save service */
|
||||
WMI_SERVICE_FORCE_FW_HANG=24, /* Service to test the firmware recovery mechanism */
|
||||
WMI_SERVICE_GPIO=25, /* GPIO service */
|
||||
WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM=26, /* Modulated DTIM support */
|
||||
WMI_STA_UAPSD_BASIC_AUTO_TRIG=27, /* Basic version of station UAPSD AC Trigger Generation Method with
|
||||
* variable tigger periods (service, delay, and suspend intervals) */
|
||||
WMI_STA_UAPSD_VAR_AUTO_TRIG=28, /* Station UAPSD AC Trigger Generation Method with variable
|
||||
* trigger periods (service, delay, and suspend intervals) */
|
||||
WMI_SERVICE_STA_KEEP_ALIVE=29, /* Serivce to support the STA KEEP ALIVE mechanism */
|
||||
WMI_SERVICE_TX_ENCAP=30, /* Packet type for TX encapsulation */
|
||||
WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC=31, /* detect out-of-sync sleeping stations */
|
||||
WMI_SERVICE_EARLY_RX=32, /* adaptive early-rx feature */
|
||||
WMI_SERVICE_STA_SMPS=33, /* STA MIMO-PS */
|
||||
WMI_SERVICE_FWTEST=34, /* Firmware test service */
|
||||
WMI_SERVICE_STA_WMMAC=35, /* STA WMMAC */
|
||||
WMI_SERVICE_TDLS=36, /* TDLS support */
|
||||
WMI_SERVICE_BURST=37, /* SIFS spaced burst support */
|
||||
WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE=38, /* Dynamic beaocn interval change for SAP/P2p GO in MCC scenario */
|
||||
WMI_SERVICE_ADAPTIVE_OCS=39, /* Service to support adaptive off-channel scheduler */
|
||||
WMI_SERVICE_BA_SSN_SUPPORT=40, /* target will provide Sequence number for the peer/tid combo */
|
||||
WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE=41,
|
||||
WMI_SERVICE_WLAN_HB=42, /* wlan HB service */
|
||||
WMI_SERVICE_LTE_ANT_SHARE_SUPPORT=43, /* support LTE/WLAN antenna sharing */
|
||||
WMI_SERVICE_BATCH_SCAN=44, /* Service to support batch scan */
|
||||
WMI_SERVICE_QPOWER=45, /* QPower service */
|
||||
WMI_SERVICE_PLMREQ=46,
|
||||
WMI_SERVICE_THERMAL_MGMT=47, /* thermal throttling support */
|
||||
WMI_SERVICE_RMC=48, /* RMC support */
|
||||
WMI_SERVICE_MHF_OFFLOAD=49, /* multi-hop forwarding offload */
|
||||
WMI_SERVICE_COEX_SAR=50, /* target support SAR tx limit from WMI_PDEV_PARAM_TXPOWER_LIMITxG */
|
||||
WMI_SERVICE_BCN_TXRATE_OVERRIDE=51, /* Will support the bcn/prb rsp rate override */
|
||||
WMI_SERVICE_NAN=52, /* Neighbor Awareness Network */
|
||||
WMI_SERVICE_L1SS_STAT=53, /* L1SS statistics counter report */
|
||||
WMI_SERVICE_ESTIMATE_LINKSPEED=54, /* Linkspeed Estimation per peer */
|
||||
WMI_SERVICE_OBSS_SCAN=55, /* Service to support OBSS scan */
|
||||
WMI_SERVICE_TDLS_OFFCHAN=56, /* TDLS off channel support */
|
||||
WMI_SERVICE_TDLS_UAPSD_BUFFER_STA=57, /* TDLS UAPSD Buffer STA support */
|
||||
WMI_SERVICE_TDLS_UAPSD_SLEEP_STA=58, /* TDLS UAPSD Sleep STA support */
|
||||
WMI_SERVICE_IBSS_PWRSAVE=59, /* IBSS power save support */
|
||||
WMI_SERVICE_LPASS=60, /* Service to support LPASS */
|
||||
WMI_SERVICE_EXTSCAN=61, /* Extended Scans */
|
||||
WMI_SERVICE_D0WOW=62, /* D0-WOW Support */
|
||||
WMI_SERVICE_HSOFFLOAD=63, /* Hotspot offload feature Support */
|
||||
WMI_SERVICE_ROAM_HO_OFFLOAD=64, /* roam handover offload */
|
||||
WMI_SERVICE_RX_FULL_REORDER=65, /* target-based Rx full reorder */
|
||||
WMI_SERVICE_DHCP_OFFLOAD=66, /* DHCP offload support */
|
||||
WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT=67, /* STA RX DATA offload to IPA support */
|
||||
WMI_SERVICE_MDNS_OFFLOAD=68, /* mDNS responder offload support */
|
||||
WMI_SERVICE_SAP_AUTH_OFFLOAD=69, /* softap auth offload */
|
||||
WMI_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT=70, /* Dual Band Simultaneous support */
|
||||
WMI_SERVICE_OCB=71, /* OCB mode support */
|
||||
WMI_SERVICE_AP_ARPNS_OFFLOAD=72, /* arp offload support for ap mode vdev */
|
||||
WMI_SERVICE_PER_BAND_CHAINMASK_SUPPORT=73, /* Per band chainmask support */
|
||||
WMI_SERVICE_PACKET_FILTER_OFFLOAD=74, /* Per vdev packet filters */
|
||||
WMI_SERVICE_MGMT_TX_HTT=75, /* Mgmt Tx via HTT interface */
|
||||
WMI_SERVICE_MGMT_TX_WMI=76, /* Mgmt Tx via WMI interface */
|
||||
WMI_SERVICE_EXT_MSG=77, /* WMI_SERVICE_READY_EXT msg follows */
|
||||
WMI_SERVICE_MAWC=78, /* Motion Aided WiFi Connectivity (MAWC)*/
|
||||
WMI_SERVICE_PEER_ASSOC_CONF=79, /* target will send ASSOC_CONF after ASSOC_CMD is processed */
|
||||
WMI_SERVICE_EGAP=80, /* enhanced green ap support */
|
||||
WMI_SERVICE_STA_PMF_OFFLOAD=81, /* FW supports 11W PMF Offload for STA */
|
||||
WMI_SERVICE_UNIFIED_WOW_CAPABILITY=82, /* FW supports unified D0 and D3 wow */
|
||||
WMI_SERVICE_ENHANCED_PROXY_STA=83, /* Enhanced ProxySTA mode support */
|
||||
WMI_SERVICE_ATF=84, /* Air Time Fairness support */
|
||||
WMI_SERVICE_COEX_GPIO=85, /* BTCOEX GPIO support */
|
||||
WMI_SERVICE_AUX_SPECTRAL_INTF=86, /* Aux Radio enhancement support for ignoring spectral scan intf from main radios */
|
||||
WMI_SERVICE_AUX_CHAN_LOAD_INTF=87, /* Aux Radio enhancement support for ignoring chan load intf from main radios*/
|
||||
WMI_SERVICE_BSS_CHANNEL_INFO_64=88, /* BSS channel info (freq, noise floor, 64-bit counters) event support */
|
||||
WMI_SERVICE_ENTERPRISE_MESH=89, /* Enterprise MESH Service Support */
|
||||
WMI_SERVICE_RESTRT_CHNL_SUPPORT=90, /* Restricted Channel Support */
|
||||
WMI_SERVICE_BPF_OFFLOAD=91, /* FW supports bpf offload */
|
||||
WMI_SERVICE_SYNC_DELETE_CMDS=92, /* FW sends response event for Peer, Vdev delete commands */
|
||||
WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT=93,
|
||||
WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT=94,
|
||||
WMI_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES=95, /* allow per-peer tx MCS min/max limits by host */
|
||||
WMI_SERVICE_NAN_DATA=96, /* FW supports NAN data */
|
||||
WMI_SERVICE_NAN_RTT=97, /* FW supports NAN RTT */
|
||||
WMI_SERVICE_11AX=98, /* FW supports 802.11ax */
|
||||
/* WMI_SERVICE_DEPRECATED_REPLACE
|
||||
* FW supports these new WMI commands, to be used rather than
|
||||
* deprecated matching commands:
|
||||
* - WMI_PDEV_SET_PCL_CMDID (vs. WMI_SOC_SET_PCL_CMDID)
|
||||
* - WMI_PDEV_SET_HW_MODE_CMDID (vs. WMI_SOC_SET_HW_MODE_CMDID)
|
||||
* - WMI_PDEV_SET_MAC_CONFIG_CMDID (vs. WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID)
|
||||
* - WMI_PDEV_SET_ANTENNA_MODE_CMDID (vs. WMI_SOC_SET_ANTENNA_MODE_CMDID)
|
||||
* - WMI_VDEV_SET_DSCP_TID_MAP_CMDID (vs. WMI_VDEV_SET_WMM_PARAMS_CMDID)
|
||||
*/
|
||||
WMI_SERVICE_DEPRECATED_REPLACE=99,
|
||||
WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE=100, /* FW supports a new mode that allows to run connection tracker in host */
|
||||
WMI_SERVICE_ENHANCED_MCAST_FILTER=101, /* FW supports enhanced multicast filtering (of mcast IP inside ucast WLAN) */
|
||||
WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT=102, /* periodic channel stats service */
|
||||
WMI_SERVICE_MESH_11S=103, /* 11s mesh service support */
|
||||
WMI_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT=104, /* FW+HW supports 10 MHz (half rate) and 5 MHz (quarter rate) channel bandwidth */
|
||||
WMI_SERVICE_VDEV_RX_FILTER=105, /* Support per-vdev specs of which rx frames to filter out */
|
||||
WMI_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT=106,
|
||||
WMI_SERVICE_MARK_FIRST_WAKEUP_PACKET=107, /* FW supports marking the first data packet which wakes the host from suspend */
|
||||
WMI_SERVICE_MULTIPLE_MCAST_FILTER_SET=108, /* FW supports command that can add/delete multiple mcast filters */
|
||||
/* WMI_SERVICE_HOST_MANAGED_RX_REORDER -
|
||||
* FW supports host-managed RX reorder.
|
||||
* Host managed RX reorder involves RX BA state machine handling
|
||||
* on peer/TID basis, REO configuration for HW based reordering/PN
|
||||
* check and processing reorder exceptions generated by HW.
|
||||
*/
|
||||
WMI_SERVICE_HOST_MANAGED_RX_REORDER=109,
|
||||
/* Specify whether the target supports the following WMI messages for
|
||||
* reading / writing its flash memory:
|
||||
* WMI_READ_DATA_FROM_FLASH_CMDID,
|
||||
* WMI_READ_DATA_FROM_FLASH_EVENTID,
|
||||
* WMI_TRANSFER_DATA_TO_FLASH_CMDID,
|
||||
* WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
|
||||
*/
|
||||
WMI_SERVICE_FLASH_RDWR_SUPPORT=110,
|
||||
WMI_SERVICE_WLAN_STATS_REPORT=111, /* support WLAN stats report */
|
||||
|
||||
|
||||
/******* ADD NEW SERVICES HERE UNTIL ALL VALUES UP TO 128 ARE USED *******/
|
||||
|
||||
WMI_MAX_SERVICE=128, /* max service */
|
||||
|
||||
/* NOTE:
|
||||
* The above service flags are delivered in the wmi_service_bitmap field
|
||||
* of the WMI_SERVICE_READY_EVENT message.
|
||||
* The below service flags are delivered in a WMI_SERVICE_AVAILABLE_EVENT
|
||||
* message rather than in the WMI_SERVICE_READY_EVENT message's
|
||||
* wmi_service_bitmap field.
|
||||
* The WMI_SERVICE_AVAILABLE_EVENT message immediately precedes the
|
||||
* WMI_SERVICE_READY_EVENT message.
|
||||
*/
|
||||
|
||||
/*PUT 1ST EXT SERVICE HERE:*//*WMI_SERVICE_xxxxxxxx=128,*/
|
||||
/*PUT 2ND EXT SERVICE HERE:*//*WMI_SERVICE_yyyyyyyy=129,*/
|
||||
|
||||
WMI_MAX_EXT_SERVICE
|
||||
|
||||
} WMI_SERVICE;
|
||||
|
||||
#define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(A_UINT32)- 1)/sizeof(A_UINT32))
|
||||
|
||||
#define WMI_NUM_EXT_SERVICES (WMI_MAX_EXT_SERVICE - WMI_MAX_SERVICE)
|
||||
#define WMI_SERVICE_EXT_BM_SIZE32 ((WMI_NUM_EXT_SERVICES + 31) / 32)
|
||||
|
||||
#define WMI_SERVICE_ROAM_OFFLOAD WMI_SERVICE_ROAM_SCAN_OFFLOAD /* depreciated the name WMI_SERVICE_ROAM_OFFLOAD, but here to help compiling with old host driver */
|
||||
|
||||
/*
|
||||
* turn on the WMI service bit corresponding to the WMI service.
|
||||
*/
|
||||
#define WMI_SERVICE_ENABLE(pwmi_svc_bmap,svc_id) \
|
||||
( (pwmi_svc_bmap)[(svc_id)/(sizeof(A_UINT32))] |= \
|
||||
(1 << ((svc_id)%(sizeof(A_UINT32)))) )
|
||||
|
||||
#define WMI_SERVICE_DISABLE(pwmi_svc_bmap,svc_id) \
|
||||
( (pwmi_svc_bmap)[(svc_id)/(sizeof(A_UINT32))] &= \
|
||||
( ~(1 << ((svc_id)%(sizeof(A_UINT32)))) ) )
|
||||
|
||||
#define WMI_SERVICE_IS_ENABLED(pwmi_svc_bmap,svc_id) \
|
||||
( ((pwmi_svc_bmap)[(svc_id)/(sizeof(A_UINT32))] & \
|
||||
(1 << ((svc_id)%(sizeof(A_UINT32)))) ) != 0)
|
||||
|
||||
|
||||
#define WMI_SERVICE_EXT_ENABLE(pwmi_svc_bmap, pwmi_svc_ext_bmap, svc_id) \
|
||||
do { \
|
||||
if (svc_id < WMI_MAX_SERVICE) { \
|
||||
WMI_SERVICE_ENABLE(pwmi_svc_bmap, svc_id); \
|
||||
} else { \
|
||||
int word = ((svc_id) - WMI_MAX_SERVICE) / 32; \
|
||||
int bit = (svc_id) & 0x1f; /* svc_id mod 32 */ \
|
||||
(pwmi_svc_ext_bmap)[word] |= (1 << bit); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define WMI_SERVICE_EXT_DISABLE(pwmi_svc_bmap, pwmi_svc_ext_bmap, svc_id) \
|
||||
do { \
|
||||
if (svc_id < WMI_MAX_SERVICE) { \
|
||||
WMI_SERVICE_DISABLE(pwmi_svc_bmap, svc_id); \
|
||||
} else { \
|
||||
int word = ((svc_id) - WMI_MAX_SERVICE) / 32; \
|
||||
int bit = (svc_id) & 0x1f; /* svc_id mod 32 */ \
|
||||
(pwmi_svc_ext_bmap)[word] &= ~(1 << bit); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define WMI_SERVICE_EXT_IS_ENABLED(pwmi_svc_bmap, pwmi_svc_ext_bmap, svc_id) \
|
||||
/* If the service ID is beyond the known limit, treat it as disabled */ \
|
||||
((svc_id) >= WMI_MAX_EXT_SERVICE ? 0 : \
|
||||
/* If service ID is in the non-extension range, use the old check */ \
|
||||
(svc_id) < WMI_MAX_SERVICE ? \
|
||||
WMI_SERVICE_IS_ENABLED(pwmi_svc_bmap, svc_id) : \
|
||||
/* If service ID is in the extended range, check ext_bmap */ \
|
||||
(pwmi_svc_ext_bmap)[((svc_id) - WMI_MAX_SERVICE) / 32] >> \
|
||||
((svc_id) & 0x1f))
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*_WMI_SERVICES_H_*/
|
||||
4032
fw/wmi_tlv_defs.h
Executable file
4032
fw/wmi_tlv_defs.h
Executable file
File diff suppressed because it is too large
Load diff
156
fw/wmi_tlv_helper.h
Executable file
156
fw/wmi_tlv_helper.h
Executable file
|
|
@ -0,0 +1,156 @@
|
|||
/*
|
||||
* Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
|
||||
*
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file was originally distributed by Qualcomm Atheros, Inc.
|
||||
* under proprietary terms before Copyright ownership was assigned
|
||||
* to the Linux Foundation.
|
||||
*/
|
||||
#ifndef _WMI_TLV_HELPER_H_
|
||||
#define _WMI_TLV_HELPER_H_
|
||||
|
||||
/*
|
||||
* Every command or event parameter structure will need a TLV definition.
|
||||
* The macro WMITLV_TABLE is used to help build this TLV definition. Inside this macro define, the
|
||||
* individual TLV's are specified. The parameters for WMITLV_ELEM are:
|
||||
* (1) the list of parameters that are passed unchanged from the WMITLV_TABLE. Currently, they are id,op,buf,len
|
||||
* (2) The TLV Tag. You should create a new tag for each cmd/event in WMITLV_TAG_ID. The name of the
|
||||
* tag is <WMI_TLVTAG_STRUC_><CMD or Event ID name>. There are special tags,
|
||||
* e.g. WMI_TLVTAG_ARRAY_UINT32 and WMI_TLVTAG_ARRAY_STRUC. WMI_TLVTAG_ARRAY_UINT32 is for a
|
||||
* variable size array of UINT32 elements. WMI_TLVTAG_ARRAY_STRUC is for a varialbe size array
|
||||
* of structures.
|
||||
* (3) type of the TLV. For WMI_TLVTAG_ARRAY_* tag, then it is the type of each element.
|
||||
* (4) Name of this TLV. It must be unique in this TLV TABLE.
|
||||
* (5) Either WMITLV_SIZE_FIX or WMITLV_SIZE_VAR to indicate if this TLV is variable size.
|
||||
*
|
||||
* Note: It is important that the last TLV_ELEM does not have the "\" character.
|
||||
*/
|
||||
|
||||
/* Size of the TLV Header which is the Tag and Length fields */
|
||||
#define WMI_TLV_HDR_SIZE (1 * sizeof(A_UINT32))
|
||||
|
||||
/** TLV Helper macro to get the TLV Header given the pointer
|
||||
* to the TLV buffer. */
|
||||
#define WMITLV_GET_HDR(tlv_buf) (((A_UINT32 *)(tlv_buf))[0])
|
||||
|
||||
/** TLV Helper macro to set the TLV Header given the pointer
|
||||
* to the TLV buffer. */
|
||||
#define WMITLV_SET_HDR(tlv_buf, tag, len) (((A_UINT32 *)(tlv_buf))[0]) = ((tag << 16) | (len & 0x0000FFFF))
|
||||
|
||||
/** TLV Helper macro to get the TLV Tag given the TLV header. */
|
||||
#define WMITLV_GET_TLVTAG(tlv_header) ((A_UINT32)((tlv_header)>>16))
|
||||
|
||||
/** TLV Helper macro to get the TLV Buffer Length (minus TLV
|
||||
* header size) given the TLV header. */
|
||||
#define WMITLV_GET_TLVLEN(tlv_header) ((A_UINT32)((tlv_header) & 0x0000FFFF))
|
||||
|
||||
/** TLV Helper macro to get the TLV length from TLV structure size by removing TLV header size */
|
||||
#define WMITLV_GET_STRUCT_TLVLEN(tlv_struct) ((A_UINT32)(sizeof(tlv_struct)-WMI_TLV_HDR_SIZE))
|
||||
|
||||
/* Indicates whether the TLV is fixed size or variable length */
|
||||
#define WMITLV_SIZE_FIX 0
|
||||
#define WMITLV_SIZE_VAR 1
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tag_order;
|
||||
A_UINT32 tag_id;
|
||||
A_UINT32 tag_struct_size;
|
||||
A_UINT32 tag_varied_size;
|
||||
A_UINT32 tag_array_size;
|
||||
A_UINT32 cmd_num_tlv;
|
||||
} wmitlv_attributes_struc;
|
||||
|
||||
|
||||
/* Template structure definition for a variable size array of UINT32 */
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMI_TLVTAG_ARRAY_UINT32 */
|
||||
A_UINT32 uint32_array[1]; /* variable length Array of UINT32 */
|
||||
} wmitlv_array_uint32;
|
||||
|
||||
/* Template structure definition for a variable size array of unknown structure */
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMI_TLVTAG_ARRAY_STRUC */
|
||||
A_UINT32 struc_array[1]; /* variable length Array of structures */
|
||||
} wmitlv_array_struc;
|
||||
|
||||
/*
|
||||
* Used to fill in the "arr_size" parameter when it is not specified and hence, invalid. Can be used to
|
||||
* indicate if the original TLV definition specify this fixed array size.
|
||||
*/
|
||||
#define WMITLV_ARR_SIZE_INVALID 0x1FE
|
||||
|
||||
#define WMITLV_GET_TAG_NUM_TLV_ATTRIB(wmi_cmd_event_id) \
|
||||
WMI_TLV_HLPR_NUM_TLVS_FOR_##wmi_cmd_event_id
|
||||
|
||||
|
||||
void
|
||||
wmitlv_set_static_param_tlv_buf(void *param_tlv_buf, A_UINT32 max_tlvs_accomodated);
|
||||
|
||||
void
|
||||
wmitlv_free_allocated_command_tlvs(
|
||||
A_UINT32 cmd_id,
|
||||
void **wmi_cmd_struct_ptr);
|
||||
|
||||
void
|
||||
wmitlv_free_allocated_event_tlvs(
|
||||
A_UINT32 event_id,
|
||||
void **wmi_cmd_struct_ptr);
|
||||
|
||||
int
|
||||
wmitlv_check_command_tlv_params(
|
||||
void *os_ctx, void *param_struc_ptr, A_UINT32 param_buf_len, A_UINT32 wmi_cmd_event_id);
|
||||
|
||||
int
|
||||
wmitlv_check_event_tlv_params(
|
||||
void *os_ctx, void *param_struc_ptr, A_UINT32 param_buf_len, A_UINT32 wmi_cmd_event_id);
|
||||
|
||||
int
|
||||
wmitlv_check_and_pad_command_tlvs(
|
||||
void *os_ctx, void *param_struc_ptr, A_UINT32 param_buf_len, A_UINT32 wmi_cmd_event_id, void **wmi_cmd_struct_ptr);
|
||||
|
||||
int
|
||||
wmitlv_check_and_pad_event_tlvs(
|
||||
void *os_ctx, void *param_struc_ptr, A_UINT32 param_buf_len, A_UINT32 wmi_cmd_event_id, void **wmi_cmd_struct_ptr);
|
||||
|
||||
/** This structure is the element for the Version WhiteList
|
||||
* table. */
|
||||
typedef struct {
|
||||
A_UINT32 major;
|
||||
A_UINT32 minor;
|
||||
A_UINT32 namespace_0;
|
||||
A_UINT32 namespace_1;
|
||||
A_UINT32 namespace_2;
|
||||
A_UINT32 namespace_3;
|
||||
} wmi_whitelist_version_info;
|
||||
|
||||
struct _wmi_abi_version; /* Forward declaration to make the ARM compiler happy */
|
||||
|
||||
int
|
||||
wmi_cmp_and_set_abi_version(int num_whitelist, wmi_whitelist_version_info *version_whitelist_table,
|
||||
struct _wmi_abi_version *my_vers,
|
||||
struct _wmi_abi_version *opp_vers,
|
||||
struct _wmi_abi_version *out_vers);
|
||||
|
||||
int
|
||||
wmi_versions_are_compatible(struct _wmi_abi_version *vers1, struct _wmi_abi_version *vers2);
|
||||
|
||||
#endif /*_WMI_TLV_HELPER_H_*/
|
||||
|
||||
16053
fw/wmi_unified.h
Executable file
16053
fw/wmi_unified.h
Executable file
File diff suppressed because it is too large
Load diff
81
fw/wmi_version.h
Executable file
81
fw/wmi_version.h
Executable file
|
|
@ -0,0 +1,81 @@
|
|||
/*
|
||||
* Copyright (c) 2012-2016 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
|
||||
*
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file was originally distributed by Qualcomm Atheros, Inc.
|
||||
* under proprietary terms before Copyright ownership was assigned
|
||||
* to the Linux Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* IMPORTANT NOTE: For all change to WMI Interface, the ABI version number _must_ be updated.
|
||||
*/
|
||||
/** Major version number is incremented when there are significant changes to WMI Interface that break compatibility. */
|
||||
#define __WMI_VER_MAJOR_ 1
|
||||
/** Minor version number is incremented when there are changes
|
||||
* (however minor) to WMI Interface that break
|
||||
* compatibility. */
|
||||
#define __WMI_VER_MINOR_ 0
|
||||
/** WMI revision number has to be incremented when there is a
|
||||
* change that may or may not break compatibility. */
|
||||
#define __WMI_REVISION_ 290
|
||||
|
||||
/** The Version Namespace should not be normally changed. Only
|
||||
* host and firmware of the same WMI namespace will work
|
||||
* together.
|
||||
* For example, "QCA_ML" converts to 0x4C, 0x4D5F414351.
|
||||
* where 'Q'=0x51, 'C'=0x43, 'A'=0x41, '_'=0x5F. 'M'=4D, 'L'=4C
|
||||
*/
|
||||
#define __NAMESPACE_0_ 0x5F414351
|
||||
#define __NAMESPACE_1_ 0x00004C4D
|
||||
#define __NAMESPACE_2_ 0x00000000
|
||||
#define __NAMESPACE_3_ 0x00000000
|
||||
|
||||
/* Format of the version number. */
|
||||
#define WMI_VER_MAJOR_BIT_OFFSET 24
|
||||
#define WMI_VER_MINOR_BIT_OFFSET 0
|
||||
|
||||
#define WMI_VER_MAJOR_BIT_MASK 0xFF000000
|
||||
#define WMI_VER_MINOR_BIT_MASK 0x00FFFFFF
|
||||
|
||||
/* Macros to extract the sw_version components.
|
||||
*/
|
||||
#define WMI_VER_GET_MAJOR(x) (((x) & WMI_VER_MAJOR_BIT_MASK)>>WMI_VER_MAJOR_BIT_OFFSET)
|
||||
#define WMI_VER_GET_MINOR(x) (((x) & WMI_VER_MINOR_BIT_MASK)>>WMI_VER_MINOR_BIT_OFFSET)
|
||||
|
||||
#define WMI_VER_GET_VERSION_0(major, minor) ( (( major << WMI_VER_MAJOR_BIT_OFFSET ) & WMI_VER_MAJOR_BIT_MASK) + (( minor << WMI_VER_MINOR_BIT_OFFSET ) & WMI_VER_MINOR_BIT_MASK) )
|
||||
/*
|
||||
* The version has the following format:
|
||||
* Bits 24-31: Major version
|
||||
* Bits 0-23: Minor version
|
||||
* Bits 0-31: Build number
|
||||
* E.g. Build 1.1.7 would be represented as 0x01000001 for Major/Minor & 0x00000007 for buildnum.
|
||||
*
|
||||
* DO NOT split the following macro into multiple lines as this may confuse the build scripts.
|
||||
*/
|
||||
/* ABI Version. Reflects the version of binary interface exposed by Target firmware. */
|
||||
#define WMI_ABI_VERSION_0 WMI_VER_GET_VERSION_0(__WMI_VER_MAJOR_, __WMI_VER_MINOR_)
|
||||
#define WMI_ABI_VERSION_1 __WMI_REVISION_
|
||||
#define WMI_ABI_VERSION_NS_0 __NAMESPACE_0_
|
||||
#define WMI_ABI_VERSION_NS_1 __NAMESPACE_1_
|
||||
#define WMI_ABI_VERSION_NS_2 __NAMESPACE_2_
|
||||
#define WMI_ABI_VERSION_NS_3 __NAMESPACE_3_
|
||||
|
||||
185
fw/wmix.h
Executable file
185
fw/wmix.h
Executable file
|
|
@ -0,0 +1,185 @@
|
|||
/*
|
||||
* Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
|
||||
*
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
* above copyright notice and this permission notice appear in all
|
||||
* copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
|
||||
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
|
||||
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
|
||||
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file was originally distributed by Qualcomm Atheros, Inc.
|
||||
* under proprietary terms before Copyright ownership was assigned
|
||||
* to the Linux Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file contains extensions of the WMI protocol specified in the
|
||||
* Wireless Module Interface (WMI). It includes definitions of all
|
||||
* extended commands and events. Extensions include useful commands
|
||||
* that are not directly related to wireless activities. They may
|
||||
* be hardware-specific, and they might not be supported on all
|
||||
* implementations.
|
||||
*
|
||||
* Extended WMIX commands are encapsulated in a WMI message with
|
||||
* cmd=WMI_EXTENSION_CMD.
|
||||
*/
|
||||
|
||||
#ifndef _WMIX_H_
|
||||
#define _WMIX_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Extended WMI commands are those that are needed during wireless
|
||||
* operation, but which are not really wireless commands. This allows,
|
||||
* for instance, platform-specific commands. Extended WMI commands are
|
||||
* embedded in a WMI command message with WMI_COMMAND_ID=WMI_EXTENSION_CMDID.
|
||||
* Extended WMI events are similarly embedded in a WMI event message with
|
||||
* WMI_EVENT_ID=WMI_EXTENSION_EVENTID.
|
||||
*/
|
||||
typedef struct {
|
||||
A_UINT32 commandId;
|
||||
} POSTPACK WMIX_CMD_HDR;
|
||||
|
||||
typedef enum {
|
||||
WMIX_DSETOPEN_REPLY_CMDID = 0x2001,
|
||||
WMIX_DSETDATA_REPLY_CMDID,
|
||||
WMIX_HB_CHALLENGE_RESP_CMDID,
|
||||
WMIX_DBGLOG_CFG_MODULE_CMDID,
|
||||
WMIX_PROF_CFG_CMDID, /* 0x200a */
|
||||
WMIX_PROF_ADDR_SET_CMDID,
|
||||
WMIX_PROF_START_CMDID,
|
||||
WMIX_PROF_STOP_CMDID,
|
||||
WMIX_PROF_COUNT_GET_CMDID,
|
||||
} WMIX_COMMAND_ID;
|
||||
|
||||
typedef enum {
|
||||
WMIX_DSETOPENREQ_EVENTID = 0x3001,
|
||||
WMIX_DSETCLOSE_EVENTID,
|
||||
WMIX_DSETDATAREQ_EVENTID,
|
||||
WMIX_HB_CHALLENGE_RESP_EVENTID,
|
||||
WMIX_DBGLOG_EVENTID,
|
||||
WMIX_PROF_COUNT_EVENTID,
|
||||
WMIX_PKTLOG_EVENTID,
|
||||
} WMIX_EVENT_ID;
|
||||
|
||||
/*
|
||||
* =============DataSet support=================
|
||||
*/
|
||||
|
||||
/*
|
||||
* WMIX_DSETOPENREQ_EVENTID
|
||||
* DataSet Open Request Event
|
||||
*/
|
||||
typedef struct {
|
||||
A_UINT32 dset_id;
|
||||
A_UINT32 targ_dset_handle; /* echo'ed, not used by Host, */
|
||||
A_UINT32 targ_reply_fn; /* echo'ed, not used by Host, */
|
||||
A_UINT32 targ_reply_arg; /* echo'ed, not used by Host, */
|
||||
} POSTPACK WMIX_DSETOPENREQ_EVENT;
|
||||
|
||||
/*
|
||||
* WMIX_DSETCLOSE_EVENTID
|
||||
* DataSet Close Event
|
||||
*/
|
||||
typedef struct {
|
||||
A_UINT32 access_cookie;
|
||||
} POSTPACK WMIX_DSETCLOSE_EVENT;
|
||||
|
||||
/*
|
||||
* WMIX_DSETDATAREQ_EVENTID
|
||||
* DataSet Data Request Event
|
||||
*/
|
||||
typedef struct {
|
||||
A_UINT32 access_cookie;
|
||||
A_UINT32 offset;
|
||||
A_UINT32 length;
|
||||
A_UINT32 targ_buf; /* echo'ed, not used by Host, */
|
||||
A_UINT32 targ_reply_fn; /* echo'ed, not used by Host, */
|
||||
A_UINT32 targ_reply_arg; /* echo'ed, not used by Host, */
|
||||
} WMIX_DSETDATAREQ_EVENT;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 status;
|
||||
A_UINT32 targ_dset_handle;
|
||||
A_UINT32 targ_reply_fn;
|
||||
A_UINT32 targ_reply_arg;
|
||||
A_UINT32 access_cookie;
|
||||
A_UINT32 size;
|
||||
A_UINT32 version;
|
||||
} WMIX_DSETOPEN_REPLY_CMD;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 status;
|
||||
A_UINT32 targ_buf;
|
||||
A_UINT32 targ_reply_fn;
|
||||
A_UINT32 targ_reply_arg;
|
||||
A_UINT32 length;
|
||||
A_UINT8 buf[1];
|
||||
} WMIX_DSETDATA_REPLY_CMD;
|
||||
|
||||
|
||||
/*
|
||||
* =============Error Detection support=================
|
||||
*/
|
||||
|
||||
/*
|
||||
* WMIX_HB_CHALLENGE_RESP_CMDID
|
||||
* Heartbeat Challenge Response command
|
||||
*/
|
||||
typedef struct {
|
||||
A_UINT32 cookie;
|
||||
A_UINT32 source;
|
||||
} WMIX_HB_CHALLENGE_RESP_CMD;
|
||||
|
||||
/*
|
||||
* WMIX_HB_CHALLENGE_RESP_EVENTID
|
||||
* Heartbeat Challenge Response Event
|
||||
*/
|
||||
#define WMIX_HB_CHALLENGE_RESP_EVENT WMIX_HB_CHALLENGE_RESP_CMD
|
||||
|
||||
/*
|
||||
* =============Target Profiling support=================
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 period; /* Time (in 30.5us ticks) between samples */
|
||||
A_UINT32 nbins;
|
||||
} WMIX_PROF_CFG_CMD;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 addr;
|
||||
} WMIX_PROF_ADDR_SET_CMD;
|
||||
|
||||
/*
|
||||
* Target responds to Hosts's earlier WMIX_PROF_COUNT_GET_CMDID request
|
||||
* using a WMIX_PROF_COUNT_EVENT with
|
||||
* addr set to the next address
|
||||
* count set to the corresponding count
|
||||
*/
|
||||
typedef struct {
|
||||
A_UINT32 addr;
|
||||
A_UINT32 count;
|
||||
} WMIX_PROF_COUNT_EVENT;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _WMIX_H_ */
|
||||
Loading…
Reference in a new issue