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Merge "dt-bindings: devfreq: add support for L3 BW voting in devfreq_icc"
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commit
decdf82bfe
1 changed files with 9 additions and 3 deletions
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@ -8,6 +8,7 @@ CPU, GPU) master port(s) to the slave (Eg: DDR) port(s).
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Required properties:
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- compatible: Must be "qcom,devfreq-icc" or "qcom,devfreq-icc-ddr"
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or "qcom,devfreq-icc-llcc" or "qcom,devfreq-icc-l3"
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or "qcom,devfreq-icc-l3bw"
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- interconnects: Pairs of phandles and interconnect provider specificers
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to denote the edge source and destination ports of the
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desired interconnect path.
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@ -16,12 +17,17 @@ Required properties:
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requested from the device master port to the slave port.
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The list of values depend on the supported bus/slave
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frequencies and the bus width. Required for all devices
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except those compatible with "qcom,devfreq-icc-l3".
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except those compatible with "qcom,devfreq-icc-l3" or
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"qcom,devfreq-icc-l3bw".
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- reg: Physical base address and region size of the memory
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mapped registers containing the device's frequency
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table. Required for "qcom,devfreq-icc-l3" devices.
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table. Required for "qcom,devfreq-icc-l3" and
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"qcom,devfreq-icc-l3bw" devices.
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- reg-names: Name used for the above registers. Expected name is
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"ftbl-base". Required for "qcom,devfreq-icc-l3" devices.
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"ftbl-base". Required for "qcom,devfreq-icc-l3"
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and "qcom,devfreq-icc-l3bw" devices.
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- qcom,bus-width: Bus width of the interconnect path. Only required for
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"qcom,devfreq-icc-l3bw" devices.
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Optional properties:
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- qcom,active-only: Indicates that the bandwidth votes need to be
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enforced only when the CPU subsystem is active.
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