From df023b88cfe24628a0652e29c5828469a9215d3c Mon Sep 17 00:00:00 2001 From: Mayank Rana Date: Mon, 10 Feb 2020 15:14:25 -0800 Subject: [PATCH] ARM: dts: msm: Enable IO coherency with USB device on Lahaina USB device related memory allocation is always non-cacheable memory and IO coherency is not enable with it. This change makes USB device based memory allocation as cacheable and enable IO coherency with it. Change-Id: Icb75d5165f9e46bb7d396c54f46b92b0c793dfdd --- qcom/lahaina-usb.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qcom/lahaina-usb.dtsi b/qcom/lahaina-usb.dtsi index c942e76629d8..9b8a4930af5b 100644 --- a/qcom/lahaina-usb.dtsi +++ b/qcom/lahaina-usb.dtsi @@ -10,6 +10,7 @@ iommus = <&apps_smmu 0x0 0x0>; qcom,iommu-dma = "atomic"; qcom,iommu-dma-addr-pool = <0x90000000 0x60000000>; + dma-coherent; #address-cells = <1>; #size-cells = <1>; ranges; @@ -333,6 +334,7 @@ iommus = <&apps_smmu 0x20 0x0>; qcom,iommu-dma = "atomic"; qcom,iommu-dma-addr-pool = <0x90000000 0x60000000>; + dma-coherent; #address-cells = <1>; #size-cells = <1>; ranges;