From dfa5fa410664417e34208564dd6d7d5a70b27750 Mon Sep 17 00:00:00 2001 From: Nandha Kishore Easwaran Date: Sat, 6 Oct 2018 01:11:56 +0530 Subject: [PATCH] qcacmn: Add 8074V2 type for interrupt handling Add 8074V2 type check in enable and disable irq routine. Change-Id: I0e22d3f6a134c9de2148730efbafed4e1b5eace2 --- hif/src/snoc/if_ahb.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/hif/src/snoc/if_ahb.c b/hif/src/snoc/if_ahb.c index c556a2e1e93a..0a3d99a083f0 100644 --- a/hif/src/snoc/if_ahb.c +++ b/hif/src/snoc/if_ahb.c @@ -667,15 +667,18 @@ void hif_ahb_irq_enable(struct hif_softc *scn, int ce_id) regval = hif_read32_mb(scn, scn->mem + reg_offset); regval |= HOST_IE_REG2_CE_BIT(ce_id); hif_write32_mb(scn, scn->mem + reg_offset, regval); - if (tgt_info->target_type == TARGET_TYPE_QCA8074) { - /* Enable destination ring interrupts for 8074 - * TODO: To be removed in 2.0 HW */ + if (tgt_info->target_type == TARGET_TYPE_QCA8074 || + tgt_info->target_type == TARGET_TYPE_QCA8074V2) { + /* Enable destination ring interrupts for + * 8074 and 8074V2 + */ regval = hif_read32_mb(scn, scn->mem + HOST_IE_ADDRESS_3); regval |= HOST_IE_REG3_CE_BIT(ce_id); + + hif_write32_mb(scn, scn->mem + + HOST_IE_ADDRESS_3, regval); } - hif_write32_mb(scn, scn->mem + HOST_IE_ADDRESS_3, - regval); qdf_spin_unlock_irqrestore(&hif_state->irq_reg_lock); } } else { @@ -713,15 +716,18 @@ void hif_ahb_irq_disable(struct hif_softc *scn, int ce_id) regval = hif_read32_mb(scn, scn->mem + reg_offset); regval &= ~HOST_IE_REG2_CE_BIT(ce_id); hif_write32_mb(scn, scn->mem + reg_offset, regval); - if (tgt_info->target_type == TARGET_TYPE_QCA8074) { - /* Disable destination ring interrupts for 8074 - * TODO: To be removed in 2.0 HW */ + if (tgt_info->target_type == TARGET_TYPE_QCA8074 || + tgt_info->target_type == TARGET_TYPE_QCA8074V2) { + /* Disable destination ring interrupts for + * 8074 and 8074V2 + */ regval = hif_read32_mb(scn, scn->mem + HOST_IE_ADDRESS_3); regval &= ~HOST_IE_REG3_CE_BIT(ce_id); + + hif_write32_mb(scn, scn->mem + + HOST_IE_ADDRESS_3, regval); } - hif_write32_mb(scn, scn->mem + HOST_IE_ADDRESS_3, - regval); qdf_spin_unlock_irqrestore(&hif_state->irq_reg_lock); } }