From e04590b1a580cd1f9cd89e4180e2f0bc9cdb0c63 Mon Sep 17 00:00:00 2001 From: wuwl10 Date: Tue, 14 Sep 2021 14:49:03 +0800 Subject: [PATCH] arm64/dt: cypfr: config fps device node Cyprus IP68 use ET528 and Fpc1540 as fps sensor. Add device node for it. Change-Id: I8100f22dabc0cd64527256a0ceb7924fb4f8daed Signed-off-by: wuwl10 Reviewed-on: https://gerrit.mot.com/2066001 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Huosheng Liao Submit-Approved: Jira Key --- qcom/blair-cypfr-common-overlay.dtsi | 1 + qcom/cypfr-fps-overlay.dtsi | 163 +++++++++++++++++++++++++++ 2 files changed, 164 insertions(+) create mode 100644 qcom/cypfr-fps-overlay.dtsi diff --git a/qcom/blair-cypfr-common-overlay.dtsi b/qcom/blair-cypfr-common-overlay.dtsi index 5d61c567356e..3e5883be8ea8 100644 --- a/qcom/blair-cypfr-common-overlay.dtsi +++ b/qcom/blair-cypfr-common-overlay.dtsi @@ -18,6 +18,7 @@ #include "holi-thermal-overlay-pm6125.dtsi" #include "display/holi-sde-display-mtp-pm6125.dtsi" #include "display/blair-sde-display-mtp.dtsi" +#include "cypfr-fps-overlay.dtsi" #include "cypfr-display.dtsi" #include "cypfr-touchscreen.dtsi" diff --git a/qcom/cypfr-fps-overlay.dtsi b/qcom/cypfr-fps-overlay.dtsi new file mode 100644 index 000000000000..40fa18745865 --- /dev/null +++ b/qcom/cypfr-fps-overlay.dtsi @@ -0,0 +1,163 @@ +&tlmm { + ets_irq_active: egis_irq_active { + /* INTERRUPT */ + mux { + pins = "gpio17"; + function = "gpio"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 MA */ + input-enable; + }; + }; + + ets_rst_high: ets_rst_high { + /* INTERRUPT */ + mux { + pins = "gpio18"; + function = "gpio"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 MA */ + output-high; + }; + }; + + ets_rst_low: ets_rst_low { + /* INTERRUPT */ + mux { + pins = "gpio18"; + function = "gpio"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + ets_vcc_high: ets_vcc_high { + /* INTERRUPT */ + mux { + pins = "gpio87"; + function = "gpio"; + }; + + config { + pins = "gpio87"; + drive-strength = <2>; /* 2 MA */ + output-high; + }; + }; + + ets_vcc_low: ets_vcc_low { + /* INTERRUPT */ + mux { + pins = "gpio87"; + function = "gpio"; + }; + + config { + pins = "gpio87"; + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + fps_rst_active: fps_rst_active { + /* active state */ + mux { + pins = "gpio18"; + function = "gpio"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + fps_rst_suspend: fps_rst_suspend { + /* sleep state */ + mux { + pins = "gpio18"; + function = "gpio"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 MA */ + }; + }; + + fps_int_active: fps_int_active { + /* active state */ + mux { + pins = "gpio17"; + function = "gpio"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + input-enable; + }; + }; + + fps_int_suspend: fps_int_suspend { + /* sleep state */ + mux { + pins = "gpio17"; + function = "gpio"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + input-enable; + }; + }; +}; + + +&soc { + et528: et528 { + compatible = "fp-egistec"; + status = "ok"; + reg = <0>; + interrupt-parent = <&tlmm>; + interrupts = <17 0x0>; + fp-ctrl-power; + fp-gpio-vcc-enable; + egistec,gpio_irq = <&tlmm 17 0x0>; + egistec,gpio_reset = <&tlmm 18 0x0>; + egistec,gpio_vcc_en = <&tlmm 87 0x0>; + pinctrl-names = "egis_rst_high", "egis_rst_low", "egis_irq_active", + "egis_vcc_high", "egis_vcc_low"; + pinctrl-0 = <&ets_rst_high>; + pinctrl-1 = <&ets_rst_low>; + pinctrl-2 = <&ets_irq_active>; + pinctrl-3 = <&ets_vcc_high>; + pinctrl-4 = <&ets_vcc_low>; + }; + + fpc: fpc_fpc1020 { + compatible = "fpc,fpc1020"; + status = "ok"; + irq = <&tlmm 17 0>; + rst = <&tlmm 18 0>; + interrupt-parent = <&tlmm>; + interrupts = <17 0>; + pinctrl-names = "default", "suspend"; + pinctrl-0 = <&fps_rst_active &fps_int_active>; + pinctrl-1 = <&fps_rst_suspend &fps_int_suspend>; + }; +};