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drm/amdgpu: fix bug set incorrect value to vce register

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Set the proper bits for clockgating setup.

Signed-off-by: Rex Zhu <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
This commit is contained in:
Rex Zhu 2017-01-10 20:00:40 +08:00 • committed by Alex Deucher
commit e05208ded1
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
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@ -175,7 +175,7 @@ static void vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev,
WREG32(mmVCE_UENC_CLOCK_GATING_2, data);
data = RREG32(mmVCE_UENC_REG_CLOCK_GATING);
data &= ~0xffc00000;
data &= ~0x3ff;
WREG32(mmVCE_UENC_REG_CLOCK_GATING, data);
data = RREG32(mmVCE_UENC_DMA_DCLK_CTRL);