From 8756a2413e302e6f54cc4b85125e7bf77c973203 Mon Sep 17 00:00:00 2001
From: Vivek Kumar <vivekuma@qti.qualcomm.com>
Date: Wed, 22 Apr 2020 10:15:31 +0530
Subject: [PATCH 1/2] ARM: dts: msm: Add initial ION heaps for SM8150

Add varoius ION heaps for SM8150 SoC, these heaps
are populated by using kernel msm-4.14 commit
"5a05d8733e8c" as a reference.

Change-Id: I647a8c5fd1802ba2b80c9055a3ce5a033a7ddec2
---
 qcom/sm8150-ion.dtsi | 64 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)
 create mode 100644 qcom/sm8150-ion.dtsi

diff --git a/qcom/sm8150-ion.dtsi b/qcom/sm8150-ion.dtsi
new file mode 100644
index 000000000000..053ae34a50bb
--- /dev/null
+++ b/qcom/sm8150-ion.dtsi
@@ -0,0 +1,64 @@
+#include <dt-bindings/arm/msm/msm_ion_ids.h>
+
+&soc {
+	qcom,ion {
+		compatible = "qcom,msm-ion";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		system_heap: qcom,ion-heap@25 {
+			reg = <ION_SYSTEM_HEAP_ID>;
+			qcom,ion-heap-type = "SYSTEM";
+		};
+
+		qcom,ion-heap@22 { /* ADSP HEAP */
+			reg = <ION_ADSP_HEAP_ID>;
+			memory-region = <&adsp_mem>;
+			qcom,ion-heap-type = "DMA";
+		};
+
+		qcom,ion-heap@26 { /* USER CONTIG HEAP */
+			reg = <ION_USER_CONTIG_HEAP_ID>;
+			memory-region = <&user_contig_mem>;
+			qcom,ion-heap-type = "DMA";
+		};
+
+		qcom,ion-heap@27 { /* QSEECOM HEAP */
+			reg = <ION_QSECOM_HEAP_ID>;
+			memory-region = <&qseecom_mem>;
+			qcom,ion-heap-type = "DMA";
+		};
+
+		qcom,ion-heap@19 { /* QSEECOM TA HEAP */
+			reg = <ION_QSECOM_TA_HEAP_ID>;
+			memory-region = <&qseecom_ta_mem>;
+			qcom,ion-heap-type = "DMA";
+		};
+
+		qcom,ion-heap@13 { /* SPSS HEAP */
+			reg = <ION_SPSS_HEAP_ID>;
+			memory-region = <&sp_mem>;
+			qcom,ion-heap-type = "HYP_CMA";
+		};
+
+		qcom,ion-heap@10 { /* SECURE DISPLAY HEAP */
+			reg = <ION_SECURE_DISPLAY_HEAP_ID>;
+			memory-region = <&secure_display_memory>;
+			qcom,ion-heap-type = "HYP_CMA";
+		};
+
+		qcom,ion-heap@14 { /* SECURE CARVEOUT HEAP */
+			reg = <ION_SECURE_CARVEOUT_HEAP_ID>;
+			qcom,ion-heap-type = "SECURE_CARVEOUT";
+			cdsp {
+				memory-region = <&cdsp_sec_mem>;
+				token = <0x20000000>;
+			};
+		};
+
+		qcom,ion-heap@9 {
+			reg = <ION_SECURE_HEAP_ID>;
+			qcom,ion-heap-type = "SYSTEM_SECURE";
+		};
+	};
+};

From 7dfa51e6b266d5ba23a4b9420d0a8de5725abf56 Mon Sep 17 00:00:00 2001
From: Vivek Kumar <vivekuma@qti.qualcomm.com>
Date: Tue, 21 Apr 2020 14:10:38 +0530
Subject: [PATCH 2/2] ARM: dts: msm: Add secure_buffer and qcom,scm device on
 SM8150

Add device nodes for secure buffer and scm for SM8150 SoC.
This is needed to secure memory buffers, and protect them
against unauthorized access.

Change-Id: I3d0962087dd373f40d4676f4bd764a95f2bdb61a
---
 qcom/sm8150.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/qcom/sm8150.dtsi b/qcom/sm8150.dtsi
index 395f34d5616a..777b3319fa27 100644
--- a/qcom/sm8150.dtsi
+++ b/qcom/sm8150.dtsi
@@ -552,6 +552,10 @@
 		compatible = "simple-bus";
 	};
 
+	qcom-secure-buffer {
+		compatible = "qcom,secure-buffer";
+	};
+
 	clocks {
 		xo_board: xo-board {
 			compatible = "fixed-clock";
@@ -749,6 +753,13 @@
 	};
 };
 
+&firmware {
+	scm {
+		compatible = "qcom,scm";
+	};
+};
+
+#include "sm8150-ion.dtsi"
 #include "sm8150-pinctrl.dtsi"
 #include "sm8150-regulator.dtsi"
 #include "sm8150-pm.dtsi"