From e07673a51a06d2f53930e7a18eb9a54aa9e2edc2 Mon Sep 17 00:00:00 2001 From: Zhengchun Li Date: Tue, 18 Feb 2025 16:24:56 +0800 Subject: [PATCH] asoc: Modification for 8ch capture Patch for 8ch audio record. This modification applies to QCM6490 platform. Change-Id: I2bcdeff53ede9ba3616bb732f54bca7e82792eab Signed-off-by: Zhengchun Li --- asoc/lahaina-port-config.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/asoc/lahaina-port-config.h b/asoc/lahaina-port-config.h index 62cdd512be20..12f89b0620b5 100644 --- a/asoc/lahaina-port-config.h +++ b/asoc/lahaina-port-config.h @@ -75,8 +75,8 @@ static struct port_params tx_frame_params_default[SWR_MSTR_PORT_LEN] = { /* TX UC1: TX1: 1ch, TX2: 2chs, TX3: 1ch(MBHC) */ static struct port_params tx_frame_params_shima[SWR_MSTR_PORT_LEN] = { {3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX1 */ - {7, 5, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */ - {7, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */ + {7, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */ + {7, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX3 */ }; /* 4.8 MHz clock */