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PCI updates for v3.10:
MSI
PCI: Set ->mask_pos correctly
Hotplug
PCI: Delay final fixups until resources are assigned
Moorestown
x86/pci/mrst: Use configuration mechanism 1 for 00:00.0, 00:02.0, 00:03.0
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Merge tag 'pci-v3.10-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"MSI:
PCI: Set ->mask_pos correctly
Hotplug:
PCI: Delay final fixups until resources are assigned
Moorestown:
x86/pci/mrst: Use configuration mechanism 1 for 00:00.0, 00:02.0, 00:03.0"
* tag 'pci-v3.10-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
PCI: Delay final fixups until resources are assigned
x86/pci/mrst: Use configuration mechanism 1 for 00:00.0, 00:02.0, 00:03.0
PCI: Set ->mask_pos correctly
This commit is contained in:
commit
e15e611906
4 changed files with 11 additions and 7 deletions
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@ -141,6 +141,11 @@ static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn,
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*/
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static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)
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{
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if (bus == 0 && (devfn == PCI_DEVFN(2, 0)
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|| devfn == PCI_DEVFN(0, 0)
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|| devfn == PCI_DEVFN(3, 0)))
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return 1;
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/* This is a workaround for A0 LNC bug where PCI status register does
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* not have new CAP bit set. can not be written by SW either.
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*
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@ -150,10 +155,7 @@ static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)
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*/
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if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE)
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return 0;
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if (bus == 0 && (devfn == PCI_DEVFN(2, 0)
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|| devfn == PCI_DEVFN(0, 0)
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|| devfn == PCI_DEVFN(3, 0)))
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return 1;
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return 0; /* langwell on others */
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}
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@ -174,6 +174,7 @@ int pci_bus_add_device(struct pci_dev *dev)
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* Can not put in pci_device_add yet because resources
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* are not assigned yet for some devices.
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*/
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pci_fixup_device(pci_fixup_final, dev);
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pci_create_sysfs_dev_files(dev);
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dev->match_driver = true;
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@ -563,8 +563,10 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
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entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
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entry->msi_attrib.pos = dev->msi_cap;
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entry->mask_pos = dev->msi_cap + (control & PCI_MSI_FLAGS_64BIT) ?
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PCI_MSI_MASK_64 : PCI_MSI_MASK_32;
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if (control & PCI_MSI_FLAGS_64BIT)
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entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
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else
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entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
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/* All MSIs are unmasked by default, Mask them all */
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if (entry->msi_attrib.maskbit)
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pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
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@ -1341,7 +1341,6 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
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list_add_tail(&dev->bus_list, &bus->devices);
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up_write(&pci_bus_sem);
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pci_fixup_device(pci_fixup_final, dev);
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ret = pcibios_add_device(dev);
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WARN_ON(ret < 0);
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