From e2030525a30f9ff7721c0d4a0813330f38ca7dea Mon Sep 17 00:00:00 2001 From: Sivan Reinstein Date: Mon, 3 May 2021 08:03:46 +0300 Subject: [PATCH] msm: gsi: add gsi profiling stats registers Add GSI profiling stats register addresses Change-Id: I38f5a27e97430e7597ab1bdc2141303add59dbb0 Acked-by: Nadav Levintov Signed-off-by: Sivan Reinstein --- drivers/platform/msm/gsi/gsi_reg_v1.h | 41 +++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/platform/msm/gsi/gsi_reg_v1.h b/drivers/platform/msm/gsi/gsi_reg_v1.h index dc4403f0f9c4..ee3de12fa3f8 100644 --- a/drivers/platform/msm/gsi/gsi_reg_v1.h +++ b/drivers/platform/msm/gsi/gsi_reg_v1.h @@ -1251,4 +1251,45 @@ #define GSI_EE_n_GSI_CH_k_SCRATCH_4_OFFS(k, n) \ (GSI_GSI_REG_BASE_OFFS + 0x0000f040 + 0x4000 * (n) + 0x80 * (k)) + +#define GSI_GSI_MCS_PROFILING_BP_CNT_LSB_OFFS \ + (GSI_GSI_REG_BASE_OFFS + 0x0000185c) +#define GSI_GSI_MCS_PROFILING_BP_CNT_LSB_RMSK 0xffffffff +#define GSI_GSI_MCS_PROFILING_BP_CNT_LSB_SHFT 0x0 + +#define GSI_GSI_MCS_PROFILING_BP_CNT_MSB_OFFS \ + (GSI_GSI_REG_BASE_OFFS + 0x00001860) +#define GSI_GSI_MCS_PROFILING_BP_CNT_MSB_RMSK 0xffffffff +#define GSI_GSI_MCS_PROFILING_BP_CNT_MSB_SHFT 0x0 + +#define GSI_GSI_MCS_PROFILING_BP_AND_PENDING_CNT_LSB_OFFS \ + (GSI_GSI_REG_BASE_OFFS + 0x00001864) +#define GSI_GSI_MCS_PROFILING_BP_AND_PENDING_CNT_LSB_RMSK 0xffffffff +#define GSI_GSI_MCS_PROFILING_BP_AND_PENDING_CNT_LSB_SHFT 0x0 + +#define GSI_GSI_MCS_PROFILING_BP_AND_PENDING_CNT_MSB_OFFS \ + (GSI_GSI_REG_BASE_OFFS + 0x00001868) +#define GSI_GSI_MCS_PROFILING_BP_AND_PENDING_CNT_MSB_RMSK 0xffffffff +#define GSI_GSI_MCS_PROFILING_BP_AND_PENDING_CNT_MSB_SHFT 0x0 + +#define GSI_GSI_MCS_PROFILING_MCS_BUSY_CNT_LSB_OFFS \ + (GSI_GSI_REG_BASE_OFFS + 0x0000186c) +#define GSI_GSI_MCS_PROFILING_MCS_BUSY_CNT_LSB_RMSK 0xffffffff +#define GSI_GSI_MCS_PROFILING_MCS_BUSY_CNT_LSB_SHFT 0x0 + +#define GSI_GSI_MCS_PROFILING_MCS_BUSY_CNT_MSB_OFFS \ + (GSI_GSI_REG_BASE_OFFS + 0x00001870) +#define GSI_GSI_MCS_PROFILING_MCS_BUSY_CNT_MSB_RMSK 0xffffffff +#define GSI_GSI_MCS_PROFILING_MCS_BUSY_CNT_MSB_SHFT 0x0 + +#define GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_LSB_OFFS \ + (GSI_GSI_REG_BASE_OFFS + 0x00001874) +#define GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_LSB_RMSK 0xffffffff +#define GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_LSB_SHFT 0x0 + +#define GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_MSB_OFFS \ + (GSI_GSI_REG_BASE_OFFS + 0x00001878) +#define GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_MSB_RMSK 0xffffffff +#define GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_MSB_SHFT 0x0 + #endif /* __GSI_REG_V1_H__ */