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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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ARM fixes. There are a couple pending x86 patches but they'll have to
wait for next week. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQExBAABCAAbBQJYJvAXFBxwYm9uemluaUByZWRoYXQuY29tAAoJEL/70l94x66D ztUH/3DZVYkVYUea+Sk1mBnLaK5cbEJMGtxV/NsAqwz8rYB981cB5Iqw0+f2HX2G LWLc0cf/kyUH+6TrFxQFyXLsBvV7xku2YwJdoiRutpR50767qPFPaPUBHcxCYPYR MI4VSXb1hW0c4rd8409HesKv5qc5BiYjdWKPMu+f1LUF2CED+Xq4SWHVg+CwSE8i UInvFUlj/ejQlSdxN2piv87SRcMuO+4nzP+JbtyN7onvtLIah6JfvHhlOO6em+0c KX1G3qQ6fth6jewTdOPUB1Tx8CoEAZ+YLieRQA19vGHVI4eIhofDgtSaPZJmu9G7 0kjbrlqAuViTEsRl7Dx8zT8OpBM= =N6w9 -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM fixes from Paolo Bonzini: "ARM fixes. There are a couple pending x86 patches but they'll have to wait for next week" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: arm/arm64: vgic: Kick VCPUs when queueing already pending IRQs KVM: arm/arm64: vgic: Prevent access to invalid SPIs arm/arm64: KVM: Perform local TLB invalidation when multiplexing vcpus on a single CPU
This commit is contained in:
commit
e234832afb
12 changed files with 112 additions and 23 deletions
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@ -54,6 +54,7 @@ extern char __kvm_hyp_vector[];
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extern void __kvm_flush_vm_context(void);
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extern void __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa);
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extern void __kvm_tlb_flush_vmid(struct kvm *kvm);
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extern void __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu);
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extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu);
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@ -62,6 +62,9 @@ struct kvm_arch {
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/* VTTBR value associated with above pgd and vmid */
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u64 vttbr;
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/* The last vcpu id that ran on each physical CPU */
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int __percpu *last_vcpu_ran;
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/* The maximum number of vCPUs depends on the used GIC model */
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int max_vcpus;
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@ -128,7 +128,7 @@ static inline unsigned long __kern_hyp_va(unsigned long v)
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return v;
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}
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#define kern_hyp_va(v) (typeof(v))(__kern_hyp_va((unsigned long)(v)))
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#define kern_hyp_va(v) ((typeof(v))(__kern_hyp_va((unsigned long)(v))))
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/*
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* We currently only support a 40bit IPA.
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@ -64,6 +64,21 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
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write_sysreg(0, vttbr_el2);
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}
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void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = kern_hyp_va(kern_hyp_va(vcpu)->kvm);
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/* Switch to requested VMID */
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write_sysreg(kvm->arch.vttbr, vttbr_el2);
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isb();
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asm volatile("tlbi vmalle1" : : );
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dsb(nsh);
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isb();
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write_sysreg(0, vttbr_el2);
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}
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void __hyp_text __kvm_flush_vm_context(void)
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{
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dsb(ishst);
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