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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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USB patches for 3.20-rc1
Here's the big pull request for the USB driver tree for 3.20-rc1. Nothing major happening here, just lots of gadget driver updates, new device ids, and a bunch of cleanups. All of these have been in linux-next for a while with no reported issues. Signed-off-by: Greg Kroah-Hartman <[email protected]> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEABECAAYFAlTgtrcACgkQMUfUDdst+yn0tACgygJPNvu1l3ukNJCCpWuOErIj 3KsAnjiEXv90DLYJiVLJ4EbLPw0V9wAv =DrJx -----END PGP SIGNATURE----- Merge tag 'usb-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB patches from Greg KH: "Here's the big pull request for the USB driver tree for 3.20-rc1. Nothing major happening here, just lots of gadget driver updates, new device ids, and a bunch of cleanups. All of these have been in linux-next for a while with no reported issues" * tag 'usb-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (299 commits) usb: musb: fix device hotplug behind hub usb: dwc2: Fix a bug in reading the endpoint directions from reg. staging: emxx_udc: fix the build error usb: Retry port status check on resume to work around RH bugs Revert "usb: Reset USB-3 devices on USB-3 link bounce" uhci-hub: use HUB_CHAR_* usb: kconfig: replace PPC_OF with PPC ehci-pci: disable for Intel MID platforms (update) usb: gadget: Kconfig: use bool instead of boolean usb: musb: blackfin: remove incorrect __exit_p() USB: fix use-after-free bug in usb_hcd_unlink_urb() ehci-pci: disable for Intel MID platforms usb: host: pci_quirks: joing string literals USB: add flag for HCDs that can't receive wakeup requests (isp1760-hcd) USB: usbfs: allow URBs to be reaped after disconnection cdc-acm: kill unnecessary messages cdc-acm: add sanity checks usb: phy: phy-generic: Fix USB PHY gpio reset usb: dwc2: fix USB core dependencies usb: renesas_usbhs: fix NULL pointer dereference in dma_release_channel() ...
This commit is contained in:
commit
e29876723f
184 changed files with 9309 additions and 3050 deletions
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@ -26,6 +26,7 @@ Required properties (port (child) node):
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filled in "reg". It can also contain the offset of the system configuration
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registers used as glue-logic to setup the device for SATA/PCIe or USB3
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devices.
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- st,syscfg : Offset of the parent configuration register.
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- resets : phandle to the parent reset controller.
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- reset-names : Associated name must be "miphy-sw-rst".
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@ -54,18 +55,12 @@ example:
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phy_port0: port@9b22000 {
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reg = <0x9b22000 0xff>,
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<0x9b09000 0xff>,
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<0x9b04000 0xff>,
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<0x114 0x4>, /* sysctrl MiPHY cntrl */
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<0x818 0x4>, /* sysctrl MiPHY status*/
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<0xe0 0x4>, /* sysctrl PCIe */
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<0xec 0x4>; /* sysctrl SATA */
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<0x9b04000 0xff>;
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reg-names = "sata-up",
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"pcie-up",
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"pipew",
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"miphy-ctrl-glue",
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"miphy-status-glue",
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"pcie-glue",
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"sata-glue";
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"pipew";
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st,syscfg = <0x114 0x818 0xe0 0xec>;
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#phy-cells = <1>;
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st,osc-rdy;
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reset-names = "miphy-sw-rst";
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@ -75,18 +70,13 @@ example:
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phy_port1: port@9b2a000 {
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reg = <0x9b2a000 0xff>,
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<0x9b19000 0xff>,
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<0x9b14000 0xff>,
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<0x118 0x4>,
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<0x81c 0x4>,
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<0xe4 0x4>,
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<0xf0 0x4>;
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<0x9b14000 0xff>;
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reg-names = "sata-up",
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"pcie-up",
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"pipew",
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"miphy-ctrl-glue",
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"miphy-status-glue",
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"pcie-glue",
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"sata-glue";
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"pipew";
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st,syscfg = <0x118 0x81c 0xe4 0xf0>;
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#phy-cells = <1>;
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st,osc-force-ext;
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reset-names = "miphy-sw-rst";
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@ -95,13 +85,12 @@ example:
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phy_port2: port@8f95000 {
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reg = <0x8f95000 0xff>,
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<0x8f90000 0xff>,
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<0x11c 0x4>,
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<0x820 0x4>;
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<0x8f90000 0xff>;
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reg-names = "pipew",
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"usb3-up",
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"miphy-ctrl-glue",
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"miphy-status-glue";
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"usb3-up";
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st,syscfg = <0x11c 0x820>;
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#phy-cells = <1>;
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reset-names = "miphy-sw-rst";
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resets = <&softreset STIH407_MIPHY2_SOFTRESET>;
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@ -125,4 +114,4 @@ example:
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Macro definitions for the supported miphy configuration can be found in:
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include/dt-bindings/phy/phy-miphy28lp.h
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include/dt-bindings/phy/phy.h
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37
Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
Normal file
37
Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
Normal file
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@ -0,0 +1,37 @@
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ROCKCHIP USB2 PHY
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Required properties:
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- compatible: rockchip,rk3288-usb-phy
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- rockchip,grf : phandle to the syscon managing the "general
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register files"
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- #address-cells: should be 1
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- #size-cells: should be 0
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Sub-nodes:
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Each PHY should be represented as a sub-node.
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Sub-nodes
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required properties:
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- #phy-cells: should be 0
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- reg: PHY configure reg address offset in GRF
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"0x320" - for PHY attach to OTG controller
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"0x334" - for PHY attach to HOST0 controller
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"0x348" - for PHY attach to HOST1 controller
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Optional Properties:
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- clocks : phandle + clock specifier for the phy clocks
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- clock-names: string, clock name, must be "phyclk"
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Example:
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usbphy: phy {
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compatible = "rockchip,rk3288-usb-phy";
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rockchip,grf = <&grf>;
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#address-cells = <1>;
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#size-cells = <0>;
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usbphy0: usb-phy0 {
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#phy-cells = <0>;
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reg = <0x320>;
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};
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};
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@ -3,8 +3,8 @@ Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY
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Required properties:
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- compatible : should be "samsung,s5pv210-mipi-video-phy";
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- reg : offset and length of the MIPI DPHY register set;
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- #phy-cells : from the generic phy bindings, must be 1;
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- syscon - phandle to the PMU system controller;
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For "samsung,s5pv210-mipi-video-phy" compatible PHYs the second cell in
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the PHY specifier identifies the PHY and its meaning is as follows:
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@ -51,7 +51,10 @@ usb1: gadget@fffa4000 {
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Atmel High-Speed USB device controller
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Required properties:
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- compatible: Should be "atmel,at91sam9rl-udc"
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- compatible: Should be one of the following
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"at91sam9rl-udc"
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"at91sam9g45-udc"
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"sama5d3-udc"
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- reg: Address and length of the register set for the device
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- interrupts: Should contain usba interrupt
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- ep childnode: To specify the number of endpoints and their properties.
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@ -20,6 +20,10 @@ Optional properties:
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Refer to phy/phy-bindings.txt for generic phy consumer properties
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- dr_mode: shall be one of "host", "peripheral" and "otg"
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Refer to usb/generic.txt
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- g-use-dma: enable dma usage in gadget driver.
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- g-rx-fifo-size: size of rx fifo size in gadget mode.
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- g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode.
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- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
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Example:
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@ -14,6 +14,8 @@ Optional properties:
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function should be enabled
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- phys: phandle + phy specifier pair
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- phy-names: must be "usb"
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- dmas: Must contain a list of references to DMA specifiers.
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- dma-names : Must contain a list of DMA names, "tx" or "rx".
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Example:
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usbhs: usb@e6590000 {
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@ -12,6 +12,7 @@ Optional properties:
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- big-endian-regs : boolean, set this for hcds with big-endian registers
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- big-endian-desc : boolean, set this for hcds with big-endian descriptors
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- big-endian : boolean, for hcds with big-endian-regs + big-endian-desc
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- needs-reset-on-resume : boolean, set this to force EHCI reset after resume
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- clocks : a list of phandle + clock specifier pairs
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- phys : phandle + phy specifier pair
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- phy-names : "usb"
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@ -13,10 +13,15 @@ Optional properties:
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- clock-frequency: the clock frequency (in Hz) that the PHY clock must
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be configured to.
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- vcc-supply: phandle to the regulator that provides RESET to the PHY.
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- vcc-supply: phandle to the regulator that provides power to the PHY.
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- reset-gpios: Should specify the GPIO for reset.
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- vbus-detect-gpio: should specify the GPIO detecting a VBus insertion
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(see Documentation/devicetree/bindings/gpio/gpio.txt)
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- vbus-regulator : should specifiy the regulator supplying current drawn from
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the VBus line (see Documentation/devicetree/bindings/regulator/regulator.txt).
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Example:
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hsusb1_phy {
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@ -26,8 +31,11 @@ Example:
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clock-names = "main_clk";
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vcc-supply = <&hsusb1_vcc_regulator>;
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reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
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vbus-detect-gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
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vbus-regulator = <&vbus_regulator>;
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};
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hsusb1_phy is a NOP USB PHY device that gets its clock from an oscillator
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and expects that clock to be configured to 19.2MHz by the NOP PHY driver.
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hsusb1_vcc_regulator provides power to the PHY and GPIO 7 controls RESET.
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GPIO 13 detects VBus insertion, and accordingly notifies the vbus-regulator.
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