From e2abf6fc7aba305023bf753ba6a958e96559fae4 Mon Sep 17 00:00:00 2001 From: Sudheer Papothi Date: Wed, 12 Aug 2020 12:34:22 +0530 Subject: [PATCH] ASoC: wcd938x: Update the soundwire clock rate based on the tx paths Update the soundwire clock rate based on the number of TX paths enable to avoid noise issue. Change-Id: I8c73bfd73751d4b79de30f3347081929501a877e Signed-off-by: Sudheer Papothi --- asoc/codecs/wcd938x/wcd938x.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/asoc/codecs/wcd938x/wcd938x.c b/asoc/codecs/wcd938x/wcd938x.c index a3d5e5ad42ce..5880ecff29fb 100644 --- a/asoc/codecs/wcd938x/wcd938x.c +++ b/asoc/codecs/wcd938x/wcd938x.c @@ -1606,6 +1606,11 @@ static int wcd938x_tx_swr_ctrl(struct snd_soc_dapm_widget *w, } } rate = wcd938x_get_clk_rate(i); + if (wcd938x->adc_count) { + rate = (wcd938x->adc_count * rate); + if (rate > SWR_CLK_RATE_9P6MHZ) + rate = SWR_CLK_RATE_9P6MHZ; + } wcd938x_set_swr_clk_rate(component, rate, bank); } ret = swr_slvdev_datapath_control(wcd938x->tx_swr_dev, @@ -1732,6 +1737,11 @@ static int wcd938x_codec_enable_adc(struct snd_soc_dapm_widget *w, } } clk_rate = wcd938x_get_clk_rate(i); + + /* clk_rate depends on number of paths getting enabled */ + clk_rate = (wcd938x->adc_count * clk_rate); + if (clk_rate > SWR_CLK_RATE_9P6MHZ) + clk_rate = SWR_CLK_RATE_9P6MHZ; wcd938x_set_swr_clk_rate(component, clk_rate, bank); ret = swr_slvdev_datapath_control(wcd938x->tx_swr_dev, wcd938x->tx_swr_dev->dev_num,