From e3545f19bb74795d78de13c5de9e5b8f0242da03 Mon Sep 17 00:00:00 2001
From: Hemant Kumar <hemantk@quicinc.com>
Date: Tue, 6 Apr 2021 17:58:50 -0700
Subject: [PATCH] ARM: dts: msm: Add SPI to support PCIe SNPS IRQ 1-7 for
 sdxlemur

In order to support more than one Synopsys MSI group, add the
SPIs for Synopsys IRQ 1-7 to PCIe interrupt table.

Change-Id: I366b87d27a743b537b1b4cb1a44a05ed3785aa05
---
 qcom/sdxlemur-pcie.dtsi | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/qcom/sdxlemur-pcie.dtsi b/qcom/sdxlemur-pcie.dtsi
index 9834159a1112..62b45985834f 100644
--- a/qcom/sdxlemur-pcie.dtsi
+++ b/qcom/sdxlemur-pcie.dtsi
@@ -279,7 +279,14 @@
 		msi-controller;
 		reg = <0xa0000000 0x0>;
 		interrupt-parent = <&intc>;
-		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 		qcom,snps;
 	};
 };