arm: Xilinx Zynq cleanup patches for v3.18

- PM support
 - Fix L2 useless setting
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Merge tag 'zynq-cleanup-for-3.18' of git://git.xilinx.com/linux-xlnx into next/soc

Pull "arm: Xilinx Zynq cleanup patches for v3.18" from Michal Simek:

- PM support
- Fix L2 useless setting

Signed-off-by: Arnd Bergmann <[email protected]>

* tag 'zynq-cleanup-for-3.18' of git://git.xilinx.com/linux-xlnx:
  ARM: zynq: Remove useless L2C AUX setting
  ARM: zynq: Rename 'zynq_platform_cpu_die'
  ARM: zynq: Remove hotplug.c
  ARM: zynq: Synchronise zynq_cpu_die/kill
  ARM: zynq: cpuidle: Remove pointless code
  ARM: zynq: Remove invalidate cache for cpu die
  ARM: zynq: PM: Enable DDR clock stop
  ARM: zynq: DT: Add DDRC node
  Documentation: devicetree: Add binding for Synopsys DDR controller
  ARM: zynq: PM: Enable A9 internal clock gating feature
This commit is contained in:
Arnd Bergmann 2014-09-25 17:42:57 +02:00
commit e36087998a
10 changed files with 207 additions and 63 deletions

View file

@ -26,7 +26,6 @@
*/
#include <linux/init.h>
#include <linux/cpu_pm.h>
#include <linux/cpuidle.h>
#include <linux/platform_device.h>
#include <asm/proc-fns.h>
@ -38,15 +37,9 @@
static int zynq_enter_idle(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index)
{
/* Devices must be stopped here */
cpu_pm_enter();
/* Add code for DDR self refresh start */
cpu_do_idle();
/* Add code for DDR self refresh stop */
cpu_pm_exit();
return index;
}
@ -59,8 +52,7 @@ static struct cpuidle_driver zynq_idle_driver = {
.enter = zynq_enter_idle,
.exit_latency = 10,
.target_residency = 10000,
.flags = CPUIDLE_FLAG_TIME_VALID |
CPUIDLE_FLAG_TIMER_STOP,
.flags = CPUIDLE_FLAG_TIME_VALID,
.name = "RAM_SR",
.desc = "WFI and RAM Self Refresh",
},