From 9989d9741d0a434c82634e9601d8f1c46bd6a5a1 Mon Sep 17 00:00:00 2001
From: Deepak Kumar <dkumar@qti.qualcomm.com>
Date: Mon, 2 Nov 2020 19:55:31 +0530
Subject: [PATCH] ARM: dts: msm: Add RDPM register map for Shima GPU

Add the RDPM register ranges so the graphics driver can share
the current GPU frequency across drivers.

Change-Id: Ib7bac0d639fe0e1aecffd82e2d370854fd9f1238
---
 qcom/shima-gpu.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/qcom/shima-gpu.dtsi b/qcom/shima-gpu.dtsi
index f7808d3470d0..9766e11225f9 100644
--- a/qcom/shima-gpu.dtsi
+++ b/qcom/shima-gpu.dtsi
@@ -16,10 +16,10 @@
 
 		reg = <0x3d00000 0x40000>, <0x3d61000 0x800>,
 			<0x3de0000 0x10000>, <0x3d8b000 0x2000>,
-			<0x06900000 0x80000>;
+			<0x06900000 0x80000>, <0x0636000 0x1000>;
 
 		reg-names = "kgsl_3d0_reg_memory", "cx_dbgc", "rscc",
-			"isense_cntl", "qdss_gfx";
+			"isense_cntl", "qdss_gfx", "rdpm_mx";
 
 		interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "kgsl_3d0_irq";