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soc/tegra: pmc: Fix imbalanced clock disabling in error code path

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commit 19221e3083020bd9537624caa0ee0145ed92ba36 upstream.

The tegra_powergate_power_up() has a typo in the error code path where it
will try to disable clocks twice, fix it. In practice that error never
happens, so this is a minor correction.

Tested-by: Peter Geis <[email protected]> # Ouya T30
Tested-by: Nicolas Chauvet <[email protected]> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <[email protected]> # Ouya T30
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Cc: Guenter Roeck <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
This commit is contained in:
Dmitry Osipenko 2021-03-02 15:24:58 +03:00 • committed by Greg Kroah-Hartman
commit e3c97ba4a6
1 changed files with 1 additions and 1 deletions
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2
drivers/soc/tegra/pmc.c
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@ -579,7 +579,7 @@ static int tegra_powergate_power_up(struct tegra_powergate *pg,
err = tegra_powergate_enable_clocks(pg);
if (err)
goto disable_clks;
goto powergate_off;
usleep_range(10, 20);