From f32405fce8e401eb5ba0da1c1894863219a19be1 Mon Sep 17 00:00:00 2001 From: Sushmita Susheelendra Date: Tue, 4 Aug 2020 16:49:31 -0600 Subject: [PATCH] msm: kgsl: Disable stall on fault for GMU context bank Stall on fault must be disabled for the GMU context bank as an SMMU stall will cause the GMU memory transaction to hang when there is a pagefault. As a result, the GMU becomes unresponsive and we do not get any CM3 state which can help debug the pagefault. With stall on fault disabled, when there is a GMU pagefault, a bus fault is triggered and the GMU enters the bus fault handler as expected. Change-Id: Id3452ad0df606eafefda4dcd8b1801c22fbf0815 Signed-off-by: Sushmita Susheelendra --- drivers/gpu/msm/adreno_a6xx_gmu.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/msm/adreno_a6xx_gmu.c b/drivers/gpu/msm/adreno_a6xx_gmu.c index a68a0d7a9e56..2dbb1346be53 100644 --- a/drivers/gpu/msm/adreno_a6xx_gmu.c +++ b/drivers/gpu/msm/adreno_a6xx_gmu.c @@ -2571,6 +2571,7 @@ static int a6xx_gmu_iommu_cb_probe(struct a6xx_gmu_device *gmu, struct device_node *node = of_get_child_by_name(parent, ctx->name); struct platform_device *pdev; int ret; + int no_stall = 1; if (!node) return -ENODEV; @@ -2593,6 +2594,14 @@ static int a6xx_gmu_iommu_cb_probe(struct a6xx_gmu_device *gmu, return -ENODEV; } + /* + * Disable stall on fault for the GMU context bank. + * This sets SCTLR.CFCFG = 0. + * Also note that, the smmu driver sets SCTLR.HUPCF = 0 by default. + */ + iommu_domain_set_attr(ctx->domain, + DOMAIN_ATTR_FAULT_MODEL_NO_STALL, &no_stall); + ret = iommu_attach_device(ctx->domain, &pdev->dev); if (!ret) { iommu_set_fault_handler(ctx->domain, handler, ctx);