From e452acf2fb1584c0bc3e6622545da0208eddbde0 Mon Sep 17 00:00:00 2001 From: Jeykumar Sankaran Date: Fri, 1 May 2020 21:55:27 -0700 Subject: [PATCH] disp: msm: dsi: skip pll clock registration for trusted vm Trusted VM will be granted access to MDSS HW dynamically on usecase boundary. As a result, all the attempts to access HW before the assignment, including the probe time access will result in Stage 2 faults. This change skips the PLL clock registration during probe as the clocks will not be controlled by the VM. Change-Id: I326f4a775796cd95dcf398449b08f2682e4aca43 Signed-off-by: Jeykumar Sankaran --- msm/dsi/dsi_pll.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/msm/dsi/dsi_pll.c b/msm/dsi/dsi_pll.c index 4bfe02ea6d87..6a4b1bbcc325 100644 --- a/msm/dsi/dsi_pll.c +++ b/msm/dsi/dsi_pll.c @@ -118,6 +118,7 @@ int dsi_pll_init(struct platform_device *pdev, struct dsi_pll_resource **pll) int rc = 0; const char *label; struct dsi_pll_resource *pll_res = NULL; + bool in_trusted_vm = false; if (!pdev->dev.of_node) { pr_err("Invalid DSI PHY node\n"); @@ -201,6 +202,14 @@ int dsi_pll_init(struct platform_device *pdev, struct dsi_pll_resource **pll) return -ENOMEM; } + in_trusted_vm = of_property_read_bool(pdev->dev.of_node, + "qcom,dsi-pll-in-trusted-vm"); + if (in_trusted_vm) { + DSI_PLL_INFO(pll_res, + "Bypassing PLL clock register for Trusted VM\n"); + return rc; + } + rc = dsi_pll_clock_register(pdev, pll_res); if (rc) { DSI_PLL_ERR(pll_res, "clock register failed rc=%d\n", rc);