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dt-bindings: Add snapshot for 5.4-rc2
Add the device-tree bindings' snapshot from tmp-abe0ec5a8133 for 5.4-rc2. Change-Id: I346809db756dd18a509ce440499d98a7fefecd16
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273 changed files with 5575 additions and 3387 deletions
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@ -2,7 +2,8 @@ Aspeed GPIO controller Device Tree Bindings
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-------------------------------------------
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Required properties:
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- compatible : Either "aspeed,ast2400-gpio" or "aspeed,ast2500-gpio"
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- compatible : Either "aspeed,ast2400-gpio", "aspeed,ast2500-gpio",
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or "aspeed,ast2600-gpio".
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- #gpio-cells : Should be two
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- First cell is the GPIO line number
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@ -17,7 +18,9 @@ Required properties:
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Optional properties:
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- clocks : A phandle to the clock to use for debounce timings
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- clocks : A phandle to the clock to use for debounce timings
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- ngpios : Number of GPIOs controlled by this controller. Should be set
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when there are multiple GPIO controllers on a SoC (ast2600).
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The gpio and interrupt properties are further described in their respective
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bindings documentation:
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18
bindings/gpio/gpio-moxtet.txt
Normal file
18
bindings/gpio/gpio-moxtet.txt
Normal file
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@ -0,0 +1,18 @@
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Turris Mox Moxtet GPIO expander via Moxtet bus
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Required properties:
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- compatible : Should be "cznic,moxtet-gpio".
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- gpio-controller : Marks the device node as a GPIO controller.
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- #gpio-cells : Should be two. For consumer use see gpio.txt.
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Other properties are required for a Moxtet bus device, please refer to
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Documentation/devicetree/bindings/bus/moxtet.txt.
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Example:
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moxtet_sfp: gpio@0 {
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compatible = "cznic,moxtet-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0>;
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}
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@ -4,7 +4,7 @@ Required properties:
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- compatible : Should be "fsl,<soc>-gpio"
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The following <soc>s are known to be supported:
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mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
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ls1021a, ls1043a, ls2080a.
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ls1021a, ls1043a, ls2080a, ls1028a, ls1088a.
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- reg : Address and length of the register set for the device
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- interrupts : Should be the port interrupt shared by all 32 pins.
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- #gpio-cells : Should be two. The first cell is the pin number and
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@ -37,3 +37,17 @@ gpio0: gpio@2300000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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Example of gpio-controller node for a ls1028a/ls1088a SoC:
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gpio1: gpio@2300000 {
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compatible = "fsl,ls1028a-gpio", "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
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reg = <0x0 0x2300000 0x0 0x10000>;
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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little-endian;
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};
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45
bindings/gpio/sgpio-aspeed.txt
Normal file
45
bindings/gpio/sgpio-aspeed.txt
Normal file
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@ -0,0 +1,45 @@
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Aspeed SGPIO controller Device Tree Bindings
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--------------------------------------------
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This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
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featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
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support the following options:
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- Support interrupt option for each input port and various interrupt
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sensitivity option (level-high, level-low, edge-high, edge-low)
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- Support reset tolerance option for each output port
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- Directly connected to APB bus and its shift clock is from APB bus clock
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divided by a programmable value.
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- Co-work with external signal-chained TTL components (74LV165/74LV595)
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Required properties:
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- compatible : Should be one of
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"aspeed,ast2400-sgpio", "aspeed,ast2500-sgpio"
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- #gpio-cells : Should be 2, see gpio.txt
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- reg : Address and length of the register set for the device
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- gpio-controller : Marks the device node as a GPIO controller
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- interrupts : Interrupt specifier, see interrupt-controller/interrupts.txt
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- interrupt-controller : Mark the GPIO controller as an interrupt-controller
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- ngpios : number of GPIO lines, see gpio.txt
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(should be multiple of 8, up to 80 pins)
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- clocks : A phandle to the APB clock for SGPM clock division
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- bus-frequency : SGPM CLK frequency
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The sgpio and interrupt properties are further described in their respective
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bindings documentation:
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- Documentation/devicetree/bindings/gpio/gpio.txt
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- Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
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Example:
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sgpio: sgpio@1e780200 {
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#gpio-cells = <2>;
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compatible = "aspeed,ast2500-sgpio";
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gpio-controller;
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interrupts = <40>;
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reg = <0x1e780200 0x0100>;
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clocks = <&syscon ASPEED_CLK_APB>;
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interrupt-controller;
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ngpios = <8>;
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bus-frequency = <12000000>;
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};
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