mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 10:41:38 -04:00
imx soc changes for 3.11:
* New SoCs i.MX6 Sololite and Vybrid VF610 support * imx5 and imx6 clock fixes and additions * Update clock driver to use of_clk_init() function * Refactor restart routine mxc_restart() to get it work for DT boot as well * Clean up mxc specific ulpi access ops * imx defconfig updates -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJRvsJmAAoJEFBXWFqHsHzOHOIH/jjVCaAFdOskPI4d9qPPAt9C 5o0aJDjerzTm+vH2mbec2507fChaYrLybAypJUj6wDYRf03RhAgPXorY83Y+3WtG SYz2UWza7MY8GeZv6e9tdrYS3JUSicFXPf8MsOcINsuyIub3dD96z36OqrnWZLFy uH5V81e4gOHECd4PWIxmhdjwawqmwb/Pqzl0V3+vXi2JM07xrn7/SqlZ7VfUwM2q DNhu5ugH7FtaFp75YrmTIhp6i+tovguRr0RIt6dnk/9gbJBQnV2Cw2MzdRPT12U5 bC79P7sojkKRtITcq9c1fnUNhkgc0+hS8HoezcQmzKMin6nFmVAh5wQFSlRJMJE= =mZw+ -----END PGP SIGNATURE----- Merge tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc From Shawn Guo: imx soc changes for 3.11: * New SoCs i.MX6 Sololite and Vybrid VF610 support * imx5 and imx6 clock fixes and additions * Update clock driver to use of_clk_init() function * Refactor restart routine mxc_restart() to get it work for DT boot as well * Clean up mxc specific ulpi access ops * imx defconfig updates * tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: (29 commits) ARM: imx_v6_v7_defconfig: Enable Vybrid VF610 ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by default ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd ARM: imx_v6_v7_defconfig: Enable PWM and backlight options ARM: imx: Remove mxc specific ulpi access ops ARM: imx: add initial support for VF610 ARM: imx: add VF610 clock support ARM: imx_v6_v7_defconfig: enable parallel display ARM: imx: clk: No need to initialize phandle struct ARM: imx: irq-common: Include header to avoid sparse warning ARM: imx: Enable mx6 solo-lite support ARM: imx6: use common of_clk_init() call to initialize clocks ARM: imx6q: call of_clk_init() to register fixed rate clocks ARM: imx: imx_v6_v7_defconfig: Select CONFIG_DRM_IMX_TVE ARM: i.MX6: clk: add different DualLite MLB clock config ARM i.MX5: Add S/PDIF clocks ARM i.MX53: Add SATA clock ARM: imx6q: clk: add the eim_slow clock ARM: imx: remove MLB PLL from pllv3 ARM: imx: disable pll8_mlb in mx6q_clks ... Conflicts: arch/arm/Kconfig.debug (simple add/add conflict) Includes an update to 3.10-rc6 Signed-off-by: Arnd Bergmann <[email protected]>
This commit is contained in:
Arnd Bergmann
commit
e5051b8472
280 changed files with 4007 additions and 2087 deletions
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@ -89,7 +89,7 @@ static int hspi_status_check_timeout(struct hspi_priv *hspi, u32 mask, u32 val)
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if ((mask & hspi_read(hspi, SPSR)) == val)
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return 0;
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msleep(20);
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udelay(10);
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}
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dev_err(hspi->dev, "timeout\n");
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@ -1487,7 +1487,7 @@ static int pch_spi_pd_probe(struct platform_device *plat_dev)
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return 0;
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err_spi_register_master:
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free_irq(board_dat->pdev->irq, board_dat);
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free_irq(board_dat->pdev->irq, data);
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err_request_irq:
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pch_spi_free_resources(board_dat, data);
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err_spi_get_resources:
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@ -1667,6 +1667,7 @@ static int pch_spi_probe(struct pci_dev *pdev,
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pd_dev = platform_device_alloc("pch-spi", i);
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if (!pd_dev) {
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dev_err(&pdev->dev, "platform_device_alloc failed\n");
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retval = -ENOMEM;
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goto err_platform_device;
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}
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pd_dev_save->pd_save[i] = pd_dev;
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@ -267,7 +267,6 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
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{
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struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);
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u32 ipif_ier;
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u16 cr;
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/* We get here with transmitter inhibited */
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@ -276,7 +275,6 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
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xspi->remaining_bytes = t->len;
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INIT_COMPLETION(xspi->done);
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xilinx_spi_fill_tx_fifo(xspi);
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/* Enable the transmit empty interrupt, which we use to determine
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* progress on the transmission.
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@ -285,12 +283,41 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
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xspi->write_fn(ipif_ier | XSPI_INTR_TX_EMPTY,
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xspi->regs + XIPIF_V123B_IIER_OFFSET);
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/* Start the transfer by not inhibiting the transmitter any longer */
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cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) &
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~XSPI_CR_TRANS_INHIBIT;
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xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
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for (;;) {
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u16 cr;
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u8 sr;
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wait_for_completion(&xspi->done);
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xilinx_spi_fill_tx_fifo(xspi);
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/* Start the transfer by not inhibiting the transmitter any
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* longer
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*/
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cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) &
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~XSPI_CR_TRANS_INHIBIT;
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xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
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wait_for_completion(&xspi->done);
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/* A transmit has just completed. Process received data and
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* check for more data to transmit. Always inhibit the
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* transmitter while the Isr refills the transmit register/FIFO,
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* or make sure it is stopped if we're done.
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*/
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cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET);
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xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
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xspi->regs + XSPI_CR_OFFSET);
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/* Read out all the data from the Rx FIFO */
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sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
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while ((sr & XSPI_SR_RX_EMPTY_MASK) == 0) {
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xspi->rx_fn(xspi);
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sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
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}
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/* See if there is more data to send */
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if (!xspi->remaining_bytes > 0)
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break;
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}
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/* Disable the transmit empty interrupt */
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xspi->write_fn(ipif_ier, xspi->regs + XIPIF_V123B_IIER_OFFSET);
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@ -314,38 +341,7 @@ static irqreturn_t xilinx_spi_irq(int irq, void *dev_id)
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xspi->write_fn(ipif_isr, xspi->regs + XIPIF_V123B_IISR_OFFSET);
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if (ipif_isr & XSPI_INTR_TX_EMPTY) { /* Transmission completed */
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u16 cr;
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u8 sr;
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/* A transmit has just completed. Process received data and
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* check for more data to transmit. Always inhibit the
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* transmitter while the Isr refills the transmit register/FIFO,
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* or make sure it is stopped if we're done.
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*/
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cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET);
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xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
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xspi->regs + XSPI_CR_OFFSET);
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/* Read out all the data from the Rx FIFO */
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sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
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while ((sr & XSPI_SR_RX_EMPTY_MASK) == 0) {
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xspi->rx_fn(xspi);
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sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
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}
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/* See if there is more data to send */
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if (xspi->remaining_bytes > 0) {
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xilinx_spi_fill_tx_fifo(xspi);
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/* Start the transfer by not inhibiting the
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* transmitter any longer
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*/
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xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
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} else {
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/* No more data to send.
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* Indicate the transfer is completed.
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*/
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complete(&xspi->done);
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}
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complete(&xspi->done);
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}
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return IRQ_HANDLED;
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