From 0b66ae83074a005bfc2361664c8e25ffc01e0e96 Mon Sep 17 00:00:00 2001 From: Aasir Rasheed Date: Thu, 10 Sep 2020 16:07:07 +0530 Subject: [PATCH] ARM: dts: msm: Update cnss dt node for bus bandwidth for shima Configure bandwidth vote data from aggre2_noc to aggre1_noc. Change-Id: If02573cf171022a3b69cf72f868a7345489d1f2a --- qcom/shima.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi index c60a2aa56528..f552b2fa60bf 100644 --- a/qcom/shima.dtsi +++ b/qcom/shima.dtsi @@ -3432,7 +3432,7 @@ qcom,wlan-ant-switch-config = <2800000 2800000 0 0 0>; interconnects = - <&aggre2_noc MASTER_PCIE_0 &aggre2_noc SLAVE_ANOC_PCIE_GEM_NOC>, + <&aggre1_noc MASTER_PCIE_0 &aggre1_noc SLAVE_ANOC_PCIE_GEM_NOC>, <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";