From e5e322cff04b96ce50df575e3e673d2085d45614 Mon Sep 17 00:00:00 2001 From: Mangesh Kunchamwar Date: Wed, 20 Jun 2018 19:00:56 +0530 Subject: [PATCH] asoc: config: support for CSRA66X0 device Add config for CSRA66X0 device to be enabled in QCS405 Change-Id: I3cddb26fa7ebb03da89113d7f051b25d614c9ad0 Signed-off-by: Mangesh Kunchamwar --- config/qcs405auto.conf | 1 + config/qcs405autoconf.h | 1 + 2 files changed, 2 insertions(+) diff --git a/config/qcs405auto.conf b/config/qcs405auto.conf index c211830865a0..b2c80cd7ce4e 100644 --- a/config/qcs405auto.conf +++ b/config/qcs405auto.conf @@ -5,6 +5,7 @@ CONFIG_SND_SOC_WSA881X=m CONFIG_SND_SOC_WCD9335=m CONFIG_WCD9XXX_CODEC_CORE=m CONFIG_MSM_CDC_PINCTRL=m +CONFIG_SND_SOC_CSRA66X0=m CONFIG_MSM_QDSP6V2_CODECS=m CONFIG_MSM_ULTRASOUND=m CONFIG_MSM_QDSP6_APRV2_RPMSG=m diff --git a/config/qcs405autoconf.h b/config/qcs405autoconf.h index e4591e30e27b..039b67baf9e9 100644 --- a/config/qcs405autoconf.h +++ b/config/qcs405autoconf.h @@ -15,6 +15,7 @@ #define CONFIG_SND_SOC_WCD9XXX_V2 1 #define CONFIG_SND_SOC_WSA881X 1 #define CONFIG_SND_SOC_WCD9335 1 +#define CONFIG_SND_SOC_CSRA66X0 1 #define CONFIG_WCD9XXX_CODEC_CORE 1 #define CONFIG_MSM_CDC_PINCTRL 1 #define CONFIG_MSM_QDSP6V2_CODECS 1