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cnss2: Add additional PBL registers to debug dumps

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Add additional PBL registers to debug dumps.

Change-Id: Id45f545840a66519152a3c0b813da6eee435fcc2
Signed-off-by: Manikandan Mohan <manikand@codeaurora.org>
This commit is contained in:
Manikandan Mohan 2020-07-28 12:03:20 -07:00
commit e61e6037bf
2 changed files with 9 additions and 1 deletions
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7
drivers/net/wireless/cnss2/pci.c
View file

@ -1720,6 +1720,7 @@ static void cnss_pci_dump_bl_sram_mem(struct cnss_pci_data *pci_priv)
{
int i;
u32 mem_addr, val, pbl_stage, sbl_log_start, sbl_log_size;
u32 pbl_wlan_boot_cfg, pbl_bootstrap_status;
struct cnss_plat_data *plat_priv = pci_priv->plat_priv;
if (plat_priv->device_id != QCA6490_DEVICE_ID)
@ -1733,8 +1734,14 @@ static void cnss_pci_dump_bl_sram_mem(struct cnss_pci_data *pci_priv)
&sbl_log_start);
cnss_pci_reg_read(pci_priv, QCA6490_PCIE_BHI_ERRDBG3_REG,
&sbl_log_size);
cnss_pci_reg_read(pci_priv, QCA6490_PBL_WLAN_BOOT_CFG,
&pbl_wlan_boot_cfg);
cnss_pci_reg_read(pci_priv, QCA6490_PBL_BOOTSTRAP_STATUS,
&pbl_bootstrap_status);
cnss_pr_dbg("TCSR_PBL_LOGGING: 0x%08x PCIE_BHI_ERRDBG: 0x%08x 0x%08x",
pbl_stage, sbl_log_start, sbl_log_size);
cnss_pr_dbg("PBL_WLAN_BOOT_CFG: 0x%08x PBL_BOOTSTRAP_STATUS: 0x%08x",
pbl_wlan_boot_cfg, pbl_bootstrap_status);
cnss_pr_dbg("Dumping PBL log data");
/* cnss_pci_reg_read provides 32bit register values */

3
drivers/net/wireless/cnss2/reg.h
View file

@ -277,5 +277,6 @@
#define QCA6490_TCSR_PBL_LOGGING_REG 0x01B000F8
#define QCA6490_PCIE_BHI_ERRDBG2_REG 0x01E0E238
#define QCA6490_PCIE_BHI_ERRDBG3_REG 0x01E0E23C
#define QCA6490_PBL_WLAN_BOOT_CFG 0x01E22B34
#define QCA6490_PBL_BOOTSTRAP_STATUS 0x01910008
#endif