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Merge "ARM: dts: msm: Add support for USB on Direwolf GVM"

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qctecmdr 2021-04-06 23:25:22 -07:00 • committed by Gerrit - the friendly Code Review server
commit e6ede5c9dd
5 changed files with 187 additions and 0 deletions
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8
qcom/direwolf-vm-la.dtsi
View file

@ -4,3 +4,11 @@
label = "pmem_shared_mem";
};
};
&usb0 {
status = "okay";
};
&usb2_phy0 {
status = "okay";
};

8
qcom/direwolf-vm-lv.dtsi
View file

@ -10,3 +10,11 @@
};
#include "display/direwolf-vm-lv-display.dtsi"
&usb0 {
status = "okay";
};
&usb2_phy0 {
status = "okay";
};

168
qcom/direwolf-vm-usb.dtsi Normal file
View file

@ -0,0 +1,168 @@
#include <dt-bindings/phy/qcom,usb3-5nm-qmp-combo.h>
&soc {
usb0: ssusb@a600000 {
compatible = "qcom,dwc-usb3-msm";
reg = <0xa600000 0x100000>;
reg-names = "core_base";
iommus = <&apps_smmu 0x0820 0x0>;
qcom,iommu-dma = "bypass";
#address-cells = <1>;
#size-cells = <1>;
ranges;
dma-ranges;
interrupts-extended = <&pdc 14 IRQ_TYPE_EDGE_RISING>,
<&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 138 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 15 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",
"ss_phy_irq", "dm_hs_phy_irq";
qcom,use-pdc-interrupts;
USB3_GDSC-supply = <&gcc_usb30_prim_gdsc>;
clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>,
<&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_PRIM_SLEEP_CLK>;
clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
"utmi_clk", "sleep_clk";
resets = <&gcc GCC_USB30_PRIM_BCR>;
reset-names = "core_reset";
qcom,core-clk-rate = <200000000>;
qcom,core-clk-rate-hs = <66666667>;
qcom,dwc-usb3-msm-tx-fifo-size = <27696>;
status = "disabled";
dwc3@a600000 {
compatible = "snps,dwc3";
reg = <0xa600000 0xd93c>;
interrupts = <GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb2_phy0>, <&usb_nop_phy>;
linux,sysdev_is_parent;
snps,disable-clk-gating;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,ssp-u3-u0-quirk;
snps,is-utmi-l1-suspend;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
tx-fifo-resize;
maximum-speed = "high-speed";
dr_mode = "otg";
};
};
/* Primary USB port related High Speed PHY */
usb2_phy0: hsphy@88e5000 {
compatible = "qcom,usb-hsphy-snps-femto";
reg = <0x088e5000 0x120>;
reg-names = "hsusb_phy_base";
vdd-supply = <&L5A0>;
vdda18-supply = <&L7A0>;
vdda33-supply = <&L13A0>;
qcom,vdd-voltage-level = <0 912000 912000>;
clocks = <&dummycc RPMH_CXO_CLK>;
clock-names = "ref_clk_src";
resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
reset-names = "phy_reset";
status = "disabled";
};
usb_nop_phy: usb_nop_phy {
compatible = "usb-nop-xceiv";
};
usb1: ssusb@a800000 {
compatible = "qcom,dwc-usb3-msm";
reg = <0xa800000 0x100000>;
reg-names = "core_base";
iommus = <&apps_smmu 0x0860 0x0>;
qcom,iommu-dma = "bypass";
#address-cells = <1>;
#size-cells = <1>;
ranges;
dma-ranges;
interrupts-extended = <&pdc 12 IRQ_TYPE_EDGE_RISING>,
<&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 136 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 13 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",
"ss_phy_irq", "dm_hs_phy_irq";
qcom,use-pdc-interrupts;
USB3_GDSC-supply = <&gcc_usb30_sec_gdsc>;
clocks = <&gcc GCC_USB30_SEC_MASTER_CLK>,
<&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
<&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
<&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_SEC_SLEEP_CLK>;
clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
"utmi_clk", "sleep_clk";
resets = <&gcc GCC_USB30_SEC_BCR>;
reset-names = "core_reset";
qcom,core-clk-rate = <200000000>;
qcom,core-clk-rate-hs = <66666667>;
qcom,dwc-usb3-msm-tx-fifo-size = <27696>;
qcom,default-mode-host;
status = "disabled";
dwc3@a800000 {
compatible = "snps,dwc3";
reg = <0xa800000 0xd93c>;
interrupts = <GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb2_phy1>, <&usb_nop_phy>;
linux,sysdev_is_parent;
snps,disable-clk-gating;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,ssp-u3-u0-quirk;
snps,is-utmi-l1-suspend;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
tx-fifo-resize;
maximum-speed = "high-speed";
dr_mode = "otg";
};
};
/* Secondary USB port related High Speed PHY */
usb2_phy1: hsphy@8902000 {
compatible = "qcom,usb-hsphy-snps-femto";
reg = <0x08902000 0x120>;
reg-names = "hsusb_phy_base";
vdd-supply = <&L1C0>;
vdda18-supply = <&L7C0>;
vdda33-supply = <&L2C0>;
qcom,vdd-voltage-level = <0 912000 912000>;
clocks = <&dummycc RPMH_CXO_CLK>;
clock-names = "ref_clk_src";
resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
reset-names = "phy_reset";
status = "disabled";
};
};

2
qcom/direwolf-vm.dtsi
View file

@ -1,4 +1,5 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-direwolf.h>
#include "quin-vm-common.dtsi"
/ {
@ -240,3 +241,4 @@
#include "direwolf-pinctrl.dtsi"
#include "pm8540-vm.dtsi"
#include "direwolf-vm-audio.dtsi"
#include "direwolf-vm-usb.dtsi"

1
qcom/quin-vm-common.dtsi
View file

@ -1,4 +1,5 @@
#include <dt-bindings/arm/msm/msm_ion_ids.h>
#include <dt-bindings/clock/qcom,rpmh.h>
/ {
#address-cells = <2>;