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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge branch 'master' into for-next
Merge with latest Linus' tree, as I have incoming patches that fix code that is newer than current HEAD of for-next. Conflicts: drivers/net/ethernet/realtek/r8169.c
This commit is contained in:
commit
e75d660672
10951 changed files with 517623 additions and 342333 deletions
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@ -55,7 +55,6 @@
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#include <asm/pdc.h>
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#include <asm/page.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/hardware.h>
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@ -553,7 +552,6 @@ dino_fixup_bus(struct pci_bus *bus)
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struct list_head *ln;
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struct pci_dev *dev;
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struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
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int port_base = HBA_PORT_BASE(dino_dev->hba.hba_num);
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DBG(KERN_WARNING "%s(0x%p) bus %d platform_data 0x%p\n",
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__func__, bus, bus->secondary,
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@ -599,8 +597,6 @@ dino_fixup_bus(struct pci_bus *bus)
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list_for_each(ln, &bus->devices) {
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int i;
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dev = pci_dev_b(ln);
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if (is_card_dino(&dino_dev->hba.dev->id))
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dino_card_fixup(dev);
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@ -612,21 +608,6 @@ dino_fixup_bus(struct pci_bus *bus)
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if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
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continue;
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/* Adjust the I/O Port space addresses */
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for (i = 0; i < PCI_NUM_RESOURCES; i++) {
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struct resource *res = &dev->resource[i];
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if (res->flags & IORESOURCE_IO) {
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res->start |= port_base;
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res->end |= port_base;
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}
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#ifdef __LP64__
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/* Sign Extend MMIO addresses */
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else if (res->flags & IORESOURCE_MEM) {
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res->start |= F_EXTEND(0UL);
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res->end |= F_EXTEND(0UL);
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}
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#endif
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}
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/* null out the ROM resource if there is one (we don't
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* care about an expansion rom on parisc, since it
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* usually contains (x86) bios code) */
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@ -991,11 +972,14 @@ static int __init dino_probe(struct parisc_device *dev)
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dev->dev.platform_data = dino_dev;
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pci_add_resource(&resources, &dino_dev->hba.io_space);
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pci_add_resource_offset(&resources, &dino_dev->hba.io_space,
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HBA_PORT_BASE(dino_dev->hba.hba_num));
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if (dino_dev->hba.lmmio_space.flags)
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pci_add_resource(&resources, &dino_dev->hba.lmmio_space);
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pci_add_resource_offset(&resources, &dino_dev->hba.lmmio_space,
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dino_dev->hba.lmmio_space_offset);
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if (dino_dev->hba.elmmio_space.flags)
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pci_add_resource(&resources, &dino_dev->hba.elmmio_space);
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pci_add_resource_offset(&resources, &dino_dev->hba.elmmio_space,
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dino_dev->hba.lmmio_space_offset);
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if (dino_dev->hba.gmmio_space.flags)
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pci_add_resource(&resources, &dino_dev->hba.gmmio_space);
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@ -1,3 +1,5 @@
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#include <linux/prefetch.h>
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/**
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* iommu_fill_pdir - Insert coalesced scatter/gather chunks into the I/O Pdir.
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* @ioc: The I/O Controller.
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@ -140,7 +140,6 @@
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#include <asm/pdc.h>
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#include <asm/pdcpat.h>
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#include <asm/page.h>
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#include <asm/system.h>
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#include <asm/io.h> /* read/write functions */
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#ifdef CONFIG_SUPERIO
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#include <asm/superio.h>
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@ -43,7 +43,6 @@
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#include <asm/pdc.h>
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#include <asm/pdcpat.h>
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#include <asm/page.h>
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#include <asm/system.h>
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#include <asm/ropes.h>
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#include <asm/hardware.h> /* for register_parisc_driver() stuff */
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@ -635,7 +634,6 @@ lba_fixup_bus(struct pci_bus *bus)
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u16 status;
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#endif
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struct lba_device *ldev = LBA_DEV(parisc_walk_tree(bus->bridge));
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int lba_portbase = HBA_PORT_BASE(ldev->hba.hba_num);
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DBG("lba_fixup_bus(0x%p) bus %d platform_data 0x%p\n",
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bus, bus->secondary, bus->bridge->platform_data);
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@ -726,27 +724,6 @@ lba_fixup_bus(struct pci_bus *bus)
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if (!res->start)
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continue;
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if (res->flags & IORESOURCE_IO) {
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DBG("lba_fixup_bus() I/O Ports [%lx/%lx] -> ",
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res->start, res->end);
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res->start |= lba_portbase;
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res->end |= lba_portbase;
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DBG("[%lx/%lx]\n", res->start, res->end);
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} else if (res->flags & IORESOURCE_MEM) {
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/*
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** Convert PCI (IO_VIEW) addresses to
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** processor (PA_VIEW) addresses
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*/
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DBG("lba_fixup_bus() MMIO [%lx/%lx] -> ",
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res->start, res->end);
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res->start = PCI_HOST_ADDR(HBA_DATA(ldev), res->start);
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res->end = PCI_HOST_ADDR(HBA_DATA(ldev), res->end);
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DBG("[%lx/%lx]\n", res->start, res->end);
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} else {
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DBG("lba_fixup_bus() WTF? 0x%lx [%lx/%lx] XXX",
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res->flags, res->start, res->end);
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}
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/*
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** FIXME: this will result in whinging for devices
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** that share expansion ROMs (think quad tulip), but
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@ -1514,11 +1491,14 @@ lba_driver_probe(struct parisc_device *dev)
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lba_dev->hba.lmmio_space.flags = 0;
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}
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pci_add_resource(&resources, &lba_dev->hba.io_space);
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pci_add_resource_offset(&resources, &lba_dev->hba.io_space,
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HBA_PORT_BASE(lba_dev->hba.hba_num));
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if (lba_dev->hba.elmmio_space.start)
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pci_add_resource(&resources, &lba_dev->hba.elmmio_space);
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pci_add_resource_offset(&resources, &lba_dev->hba.elmmio_space,
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lba_dev->hba.lmmio_space_offset);
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if (lba_dev->hba.lmmio_space.flags)
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pci_add_resource(&resources, &lba_dev->hba.lmmio_space);
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pci_add_resource_offset(&resources, &lba_dev->hba.lmmio_space,
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lba_dev->hba.lmmio_space_offset);
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if (lba_dev->hba.gmmio_space.flags)
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pci_add_resource(&resources, &lba_dev->hba.gmmio_space);
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