ARM: dts: msm: add display panel support for qrd holi

Add qrd holi display initial changes.

Change-Id: I4f55787ef5c37937004e749eb96561ebce8c5d96
This commit is contained in:
Yuan Zhao 2020-07-31 15:12:53 +08:00 • committed by Gerrit - the friendly Code Review server
commit e760c954d7
2 changed files with 88 additions and 0 deletions

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@ -0,0 +1,31 @@
#include "holi-sde-display.dtsi"
&dsi_r66451_amoled_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <255>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>;
};
&dsi_r66451_amoled_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <255>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>;
};
&dsi_sim_vid {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>;
};
&sde_dsi {
qcom,dsi-default-panel = <&dsi_r66451_amoled_cmd>;
};

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@ -1,5 +1,7 @@
#include "dsi-panel-sim-video.dtsi"
#include "dsi-panel-rm69299-visionox-fhd-plus-video.dtsi"
#include "dsi-panel-r66451-dsc-fhd-plus-cmd.dtsi"
#include "dsi-panel-r66451-dsc-fhd-plus-video.dtsi"
#include <dt-bindings/clock/mdss-10nm-pll-clk.h>
&pm6150l_gpios {
@ -131,3 +133,58 @@
};
};
&dsi_r66451_amoled_cmd {
qcom,ulps-enabled;
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x1c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-t-clk-post = <0x0A>;
qcom,mdss-dsi-t-clk-pre = <0x1D>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 10 04 04 1E 1E 04
04 03 02 04 00];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
timing@1 {
qcom,mdss-dsi-panel-phy-timings = [00 16 06 05 20 1F 06
06 06 02 04 00];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
timing@2 {
qcom,mdss-dsi-panel-phy-timings = [00 1C 08 07 23 22 07
07 08 02 04 00];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_r66451_amoled_video {
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x1c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-t-clk-post = <0x0B>;
qcom,mdss-dsi-t-clk-pre = <0x27>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 16 06 05 20 1F 06
06 06 02 04 00];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
};
};