From e8931d6dddc7ebd64ac5d5d1d46366232c4d882d Mon Sep 17 00:00:00 2001
From: Mao Jinlong <jinlmao@qti.qualcomm.com>
Date: Fri, 11 Dec 2020 20:06:26 +0800
Subject: [PATCH] ARM: dts: msm: Add dma-coherent for tmc-etr on Lahaina

This reverts commit dcb08f648448d2127c0ca2c021841e128463d51a.
This is to enable dma-coherent for tmc-etr to aovid cache flush
issue.

Change-Id: Ie36cd7612a33f3b09bb3aa0894e459b42291ff6a
---
 qcom/lahaina-coresight.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/qcom/lahaina-coresight.dtsi b/qcom/lahaina-coresight.dtsi
index ff7750e6f034..b773c609af39 100644
--- a/qcom/lahaina-coresight.dtsi
+++ b/qcom/lahaina-coresight.dtsi
@@ -154,6 +154,7 @@
 		arm,buffer-size = <0x400000>;
 		arm,scatter-gather;
 
+		dma-coherent;
 		qcom,sw-usb;
 		coresight-name = "coresight-tmc-etr";
 		coresight-ctis = <&cti0 &cti3_swao>;