From e906608c7499baff1c69f475e21b0950e14899f2 Mon Sep 17 00:00:00 2001 From: Gopala Krishna Nuthaki Date: Mon, 10 Aug 2020 15:10:53 +0530 Subject: [PATCH] ARM: dts: qcom: Add PMIC and GPU config thermal zones for SHIMA Add GPU, alaram and bcl thermal mitigation rules and update NSP thermal mitigation rules for SHIMA. Change-Id: Ic29b8b53b97b49adb2538c914d03d1937d950256 --- qcom/shima-idp.dtsi | 1 + qcom/shima-qrd.dtsi | 1 + qcom/shima-thermal-overlay.dtsi | 254 ++++++++++++++++++++++++++++++ qcom/shima-thermal.dtsi | 265 +++++++++++++++++++++----------- qcom/shima.dtsi | 2 +- 5 files changed, 428 insertions(+), 95 deletions(-) create mode 100644 qcom/shima-thermal-overlay.dtsi diff --git a/qcom/shima-idp.dtsi b/qcom/shima-idp.dtsi index f36c41467a2d..ac20c3c4df73 100644 --- a/qcom/shima-idp.dtsi +++ b/qcom/shima-idp.dtsi @@ -2,6 +2,7 @@ #include #include "shima-pmic-overlay.dtsi" #include "display/shima-sde-display-idp.dtsi" +#include "shima-thermal-overlay.dtsi" &soc { gpio_keys { diff --git a/qcom/shima-qrd.dtsi b/qcom/shima-qrd.dtsi index a185ce337341..33eac235e5dd 100644 --- a/qcom/shima-qrd.dtsi +++ b/qcom/shima-qrd.dtsi @@ -1,6 +1,7 @@ #include #include #include "shima-pmic-overlay.dtsi" +#include "shima-thermal-overlay.dtsi" &soc { gpio_keys { diff --git a/qcom/shima-thermal-overlay.dtsi b/qcom/shima-thermal-overlay.dtsi new file mode 100644 index 000000000000..aa352a783037 --- /dev/null +++ b/qcom/shima-thermal-overlay.dtsi @@ -0,0 +1,254 @@ +#include + +&mdss_mdp { + #cooling-cells = <2>; +}; + +&battery_charger { + #cooling-cells = <2>; +}; + +&thermal_zones { + socd { + cooling-maps { + socd_cpu4 { + trip = <&socd_trip>; + cooling-device = <&cpu4_isolate 1 1>; + }; + + socd_cpu5 { + trip = <&socd_trip>; + cooling-device = <&cpu5_isolate 1 1>; + }; + + socd_cpu6 { + trip = <&socd_trip>; + cooling-device = <&cpu6_isolate 1 1>; + }; + + socd_cpu7 { + trip = <&socd_trip>; + cooling-device = <&cpu7_isolate 1 1>; + }; + }; + }; + + pm8350b-bcl-lvl0 { + cooling-maps { + vbat_cpu4 { + trip = <&b_bcl_lvl0>; + cooling-device = <&cpu4_isolate 1 1>; + }; + + vbat_cpu5 { + trip = <&b_bcl_lvl0>; + cooling-device = <&cpu5_isolate 1 1>; + }; + + vbat_gpu0 { + trip = <&b_bcl_lvl0>; + cooling-device = <&msm_gpu 2 2>; + }; + }; + }; + + pm8350b-bcl-lvl1 { + cooling-maps { + vbat_cpu6 { + trip = <&b_bcl_lvl1>; + cooling-device = <&cpu6_isolate 1 1>; + }; + + vbat_cpu7 { + trip = <&b_bcl_lvl1>; + cooling-device = <&cpu7_isolate 1 1>; + }; + + vbat_gpu1 { + trip = <&b_bcl_lvl1>; + cooling-device = <&msm_gpu 4 4>; + }; + }; + }; + + pm8350b-bcl-lvl2 { + cooling-maps { + vbat_gpu2 { + trip = <&b_bcl_lvl2>; + cooling-device = <&msm_gpu THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; + }; + + pm8350c-bcl-lvl0 { + disable-thermal-zone; + cooling-maps { + vph_cpu4 { + trip = <&c_bcl_lvl0>; + cooling-device = <&cpu4_isolate 1 1>; + }; + + vph_cpu5 { + trip = <&c_bcl_lvl0>; + cooling-device = <&cpu5_isolate 1 1>; + }; + + vph_gpu0 { + trip = <&c_bcl_lvl0>; + cooling-device = <&msm_gpu 2 2>; + }; + }; + }; + + pm8350c-bcl-lvl1 { + disable-thermal-zone; + cooling-maps { + vph_cpu6 { + trip = <&c_bcl_lvl1>; + cooling-device = <&cpu6_isolate 1 1>; + }; + + vph_cpu7 { + trip = <&c_bcl_lvl1>; + cooling-device = <&cpu7_isolate 1 1>; + }; + + vph_gpu1 { + trip = <&c_bcl_lvl1>; + cooling-device = <&msm_gpu 4 4>; + }; + }; + }; + + pm8350c-bcl-lvl2 { + disable-thermal-zone; + cooling-maps { + vph_gpu2 { + trip = <&c_bcl_lvl2>; + cooling-device = <&msm_gpu THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; + }; + + pm8350b_tz { + cooling-maps { + battery_cdev { + trip = <&pm8350b_trip0>; + cooling-device = <&battery_charger + THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; + }; + + pm8350_tz { + cooling-maps { + pm8350_gpu { + trip = <&pm8350_trip0>; + cooling-device = <&msm_gpu THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + pm8350_cpu0_freq { + trip = <&pm8350_trip0>; + cooling-device = <&CPU0 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + pm8350_cpu1 { + trip = <&pm8350_trip0>; + cooling-device = <&cpu1_isolate 1 1>; + }; + + pm8350_cpu2 { + trip = <&pm8350_trip0>; + cooling-device = <&cpu2_isolate 1 1>; + }; + + pm8350_cpu3 { + trip = <&pm8350_trip0>; + cooling-device = <&cpu3_isolate 1 1>; + }; + + pm8350_cpu4 { + trip = <&pm8350_trip0>; + cooling-device = <&cpu4_isolate 1 1>; + }; + + pm8350_cpu5 { + trip = <&pm8350_trip0>; + cooling-device = <&cpu5_isolate 1 1>; + }; + + pm8350_cpu6 { + trip = <&pm8350_trip0>; + cooling-device = <&cpu6_isolate 1 1>; + }; + + pm8350_cpu7 { + trip = <&pm8350_trip0>; + cooling-device = <&cpu7_isolate 1 1>; + }; + }; + }; + + pm8350c_tz { + cooling-maps { + pm8350c_mdm { + trip = <&pm8350c_trip0>; + cooling-device = <&modem_tj THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + pm8350c_nsp { + trip = <&pm8350c_trip0>; + cooling-device = <&cdsp_sw THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; + }; + + pmr735b_tz { + cooling-maps { + pmr735b_pa { + trip = <&pmr735b_trip0>; + cooling-device = <&modem_pa_dsc + THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + pmr735b_pa_fr1 { + trip = <&pmr735b_trip0>; + cooling-device = <&modem_pa_fr1_dsc + THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + pmr735b_mmw0 { + trip = <&pmr735b_trip0>; + cooling-device = <&modem_mmw0 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + pmr735b_mmw1 { + trip = <&pmr735b_trip0>; + cooling-device = <&modem_mmw1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + pmr735b_mmw2 { + trip = <&pmr735b_trip0>; + cooling-device = <&modem_mmw2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + pmr735b_mmw3 { + trip = <&pmr735b_trip0>; + cooling-device = <&modem_mmw3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; + }; +}; diff --git a/qcom/shima-thermal.dtsi b/qcom/shima-thermal.dtsi index bb3fb6bcadbc..400c81e2b65a 100644 --- a/qcom/shima-thermal.dtsi +++ b/qcom/shima-thermal.dtsi @@ -60,6 +60,18 @@ #cooling-cells = <2>; }; }; + + qcom,cpu-voltage-cdev { + compatible = "qcom,cc-cooling-devices"; + apc1_cluster: qcom,apc1-cluster { + qcom,cpus = <&CPU4 &CPU7>; + #cooling-cells = <2>; + }; + }; +}; + +&msm_gpu { + #cooling-cells = <2>; }; &thermal_zones { @@ -643,99 +655,6 @@ }; }; - nspss-0-step { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens1 3>; - thermal-governor = "step_wise"; - trips { - nspss0_trip0: nspss0-trip0 { - temperature = <100000>; - hysteresis = <5000>; - type = "passive"; - }; - }; - - cooling-maps { - cdsp-cdev { - trip = <&nspss0_trip0>; - cooling-device = <&cdsp_sw 3 3>; - }; - - modem-pa-cdev { - trip = <&nspss0_trip0>; - cooling-device = <&modem_pa 3 3>; - }; - - modem-tj-cdev { - trip = <&nspss0_trip0>; - cooling-device = <&modem_tj 3 3>; - }; - }; - }; - - nspss-1-step { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens1 4>; - thermal-governor = "step_wise"; - trips { - nspss1_trip0: nspss1-trip0 { - temperature = <100000>; - hysteresis = <5000>; - type = "passive"; - }; - }; - - cooling-maps { - cdsp-cdev { - trip = <&nspss1_trip0>; - cooling-device = <&cdsp_sw 3 3>; - }; - - modem-pa-cdev { - trip = <&nspss1_trip0>; - cooling-device = <&modem_pa 3 3>; - }; - - modem-tj-cdev { - trip = <&nspss1_trip0>; - cooling-device = <&modem_tj 3 3>; - }; - }; - }; - - nspss-2-step { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens1 5>; - thermal-governor = "step_wise"; - trips { - nspss2_trip0: nspss2-trip0 { - temperature = <100000>; - hysteresis = <5000>; - type = "passive"; - }; - }; - - cooling-maps { - cdsp-cdev { - trip = <&nspss2_trip0>; - cooling-device = <&cdsp_sw 3 3>; - }; - - modem-pa-cdev { - trip = <&nspss2_trip0>; - cooling-device = <&modem_pa 3 3>; - }; - - modem-tj-cdev { - trip = <&nspss2_trip0>; - cooling-device = <&modem_tj 3 3>; - }; - }; - }; - cpu-0-0-step { polling-delay-passive = <0>; polling-delay = <0>; @@ -1033,10 +952,168 @@ trips { gpuss_config: active-config0 { temperature = <95000>; - hysteresis = <20000>; + hysteresis = <0>; type = "passive"; }; }; + + cooling-maps { + gpu_cdev { + trip = <&gpuss_config>; + cooling-device = <&msm_gpu THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + nspss-0-step { + polling-delay-passive = <10>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&tsens1 3>; + trips { + nspss0_trip0: nspss0-trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + nspss0_trip1: nspss0-trip1 { + temperature = <100000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + + cooling-maps { + cdsp-cdev0 { + trip = <&nspss0_trip0>; + cooling-device = <&cdsp_sw THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + + cdsp-cdev1 { + trip = <&nspss0_trip1>; + cooling-device = <&cdsp_sw THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + gpu_cdev { + trip = <&nspss0_trip1>; + cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + modem-pa-cdev { + trip = <&nspss0_trip1>; + cooling-device = <&modem_pa 3 3>; + }; + + modem-tj-cdev { + trip = <&nspss0_trip1>; + cooling-device = <&modem_tj 3 3>; + }; + }; + }; + + nspss-1-step { + polling-delay-passive = <10>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&tsens1 4>; + trips { + nspss1_trip0: nspss1-trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + nspss1_trip1: nspss1-trip1 { + temperature = <100000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + + cooling-maps { + cdsp-cdev0 { + trip = <&nspss1_trip0>; + cooling-device = <&cdsp_sw THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + + cdsp-cdev1 { + trip = <&nspss1_trip1>; + cooling-device = <&cdsp_sw THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + gpu_cdev { + trip = <&nspss1_trip1>; + cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + modem-pa-cdev { + trip = <&nspss1_trip1>; + cooling-device = <&modem_pa 3 3>; + }; + + modem-tj-cdev { + trip = <&nspss1_trip1>; + cooling-device = <&modem_tj 3 3>; + }; + }; + }; + + nspss-2-step { + polling-delay-passive = <10>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&tsens1 5>; + trips { + nspss2_trip0: nspss2-trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + nspss2_trip1: nspss2-trip1 { + temperature = <100000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + + cooling-maps { + cdsp-cdev0 { + trip = <&nspss2_trip0>; + cooling-device = <&cdsp_sw THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + + cdsp-cdev1 { + trip = <&nspss2_trip1>; + cooling-device = <&cdsp_sw THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + gpu_cdev { + trip = <&nspss2_trip1>; + cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + modem-pa-cdev { + trip = <&nspss2_trip1>; + cooling-device = <&modem_pa 3 3>; + }; + + modem-tj-cdev { + trip = <&nspss2_trip1>; + cooling-device = <&modem_tj 3 3>; + }; + }; }; }; diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi index ed3798d034b0..92374ef6de35 100644 --- a/qcom/shima.dtsi +++ b/qcom/shima.dtsi @@ -3464,10 +3464,10 @@ #include "msm-arm-smmu-shima.dtsi" #include "shima-vidc.dtsi" #include "shima-cvp.dtsi" -#include "shima-thermal.dtsi" #include "shima-gpu.dtsi" #include "display/shima-sde.dtsi" #include "shima-audio.dtsi" +#include "shima-thermal.dtsi" &pcie0_rp { #address-cells = <5>;