diff --git a/display/lahaina-sde-display.dtsi b/display/lahaina-sde-display.dtsi
index 2f92a01650bf..05492eeeaf7b 100644
--- a/display/lahaina-sde-display.dtsi
+++ b/display/lahaina-sde-display.dtsi
@@ -134,17 +134,29 @@
 		qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
 
 		clocks = <&mdss_dsi_phy0 BYTECLK_MUX_0_CLK>,
-			 <&mdss_dsi_phy0 PCLK_MUX_0_CLK>,
-			 <&mdss_dsi_phy0 CPHY_BYTECLK_SRC_0_CLK>,
-			 <&mdss_dsi_phy0 CPHY_PCLK_SRC_0_CLK>,
-			 <&mdss_dsi_phy1 BYTECLK_MUX_1_CLK>,
-			 <&mdss_dsi_phy1 PCLK_MUX_1_CLK>,
-			 <&mdss_dsi_phy1 CPHY_BYTECLK_SRC_1_CLK>,
-			 <&mdss_dsi_phy1 CPHY_PCLK_SRC_1_CLK>;
+				 <&mdss_dsi_phy0 PCLK_MUX_0_CLK>,
+				 <&mdss_dsi_phy0 CPHY_BYTECLK_SRC_0_CLK>,
+				 <&mdss_dsi_phy0 CPHY_PCLK_SRC_0_CLK>,
+				 <&mdss_dsi_phy0 BYTECLK_SRC_0_CLK>,
+				 <&mdss_dsi_phy0 PCLK_SRC_0_CLK>,
+				 <&mdss_dsi_phy0 SHADOW_BYTECLK_SRC_0_CLK>,
+				 <&mdss_dsi_phy0 SHADOW_PCLK_SRC_0_CLK>,
+				 <&mdss_dsi_phy1 BYTECLK_MUX_1_CLK>,
+				 <&mdss_dsi_phy1 PCLK_MUX_1_CLK>,
+				 <&mdss_dsi_phy1 CPHY_BYTECLK_SRC_1_CLK>,
+				 <&mdss_dsi_phy1 CPHY_PCLK_SRC_1_CLK>;
+				 <&mdss_dsi_phy1 BYTECLK_SRC_1_CLK>,
+				 <&mdss_dsi_phy1 PCLK_SRC_1_CLK>,
+				 <&mdss_dsi_phy1 SHADOW_BYTECLK_SRC_1_CLK>,
+				 <&mdss_dsi_phy1 SHADOW_PCLK_SRC_1_CLK>;
 		clock-names = "mux_byte_clk0", "mux_pixel_clk0",
 				"cphy_byte_clk0", "cphy_pixel_clk0",
+				"src_byte_clk0", "src_pixel_clk0",
+				"shadow_byte_clk0", "shadow_pixel_clk0",
 				"mux_byte_clk1", "mux_pixel_clk1",
 				"cphy_byte_clk1", "cphy_pixel_clk1";
+				"src_byte_clk1", "src_pixel_clk1",
+				"shadow_byte_clk1", "shadow_pixel_clk1";
 
 		pinctrl-names = "panel_active", "panel_suspend";
 		pinctrl-0 = <&sde_dsi_active &sde_te_active>;
@@ -219,6 +231,8 @@
 	qcom,mdss-dsi-panel-status-value = <0x9c>;
 	qcom,mdss-dsi-panel-status-read-length = <1>;
 	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
+	qcom,dsi-dyn-clk-enable;
+	qcom,dsi-dyn-clk-list = <606979440 604450359 601921278>;
 
 	qcom,mdss-dsi-display-timings {
 		timing@0 {
@@ -240,7 +254,11 @@
 	qcom,mdss-dsi-panel-status-value = <0x9c>;
 	qcom,mdss-dsi-panel-status-read-length = <1>;
 	qcom,mdss-dsi-qsync-min-refresh-rate = <55>;
-	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
+	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
+			"src_byte_clk0", "src_pixel_clk0",
+			"shadow_byte_clk0", "shadow_pixel_clk0";
+	qcom,dsi-dyn-clk-enable;
+	qcom,dsi-dyn-clk-list = <534712320 532484352 530256384>;
 
 	qcom,mdss-dsi-display-timings {
 		timing@0 {