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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "pinctrl: qcom: Expose ufs_reset as gpio on sm6150"
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qctecmdr
Gerrit - the friendly Code Review server
commit
e9b58393fb
1 changed files with 44 additions and 92 deletions
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@ -242,14 +242,14 @@ static const struct pinctrl_pin_desc sm6150_pins[] = {
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PINCTRL_PIN(120, "GPIO_120"),
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PINCTRL_PIN(121, "GPIO_121"),
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PINCTRL_PIN(122, "GPIO_122"),
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PINCTRL_PIN(123, "SDC1_RCLK"),
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PINCTRL_PIN(124, "SDC1_CLK"),
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PINCTRL_PIN(125, "SDC1_CMD"),
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PINCTRL_PIN(126, "SDC1_DATA"),
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PINCTRL_PIN(127, "SDC2_CLK"),
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PINCTRL_PIN(128, "SDC2_CMD"),
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PINCTRL_PIN(129, "SDC2_DATA"),
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PINCTRL_PIN(130, "UFS_RESET"),
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PINCTRL_PIN(123, "UFS_RESET"),
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PINCTRL_PIN(124, "SDC1_RCLK"),
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PINCTRL_PIN(125, "SDC1_CLK"),
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PINCTRL_PIN(126, "SDC1_CMD"),
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PINCTRL_PIN(127, "SDC1_DATA"),
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PINCTRL_PIN(128, "SDC2_CLK"),
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PINCTRL_PIN(129, "SDC2_CMD"),
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PINCTRL_PIN(130, "SDC2_DATA"),
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};
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#define DECLARE_MSM_GPIO_PINS(pin) \
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@ -378,14 +378,14 @@ DECLARE_MSM_GPIO_PINS(120);
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DECLARE_MSM_GPIO_PINS(121);
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DECLARE_MSM_GPIO_PINS(122);
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static const unsigned int sdc1_rclk_pins[] = { 123 };
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static const unsigned int sdc1_clk_pins[] = { 124 };
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static const unsigned int sdc1_cmd_pins[] = { 125 };
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static const unsigned int sdc1_data_pins[] = { 126 };
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static const unsigned int sdc2_clk_pins[] = { 127 };
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static const unsigned int sdc2_cmd_pins[] = { 128 };
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static const unsigned int sdc2_data_pins[] = { 129 };
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static const unsigned int ufs_reset_pins[] = { 130 };
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static const unsigned int sdc1_rclk_pins[] = { 124 };
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static const unsigned int sdc1_clk_pins[] = { 125 };
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static const unsigned int sdc1_cmd_pins[] = { 126 };
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static const unsigned int sdc1_data_pins[] = { 127 };
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static const unsigned int sdc2_clk_pins[] = { 128 };
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static const unsigned int sdc2_cmd_pins[] = { 129 };
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static const unsigned int sdc2_data_pins[] = { 130 };
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static const unsigned int ufs_reset_pins[] = { 123 };
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enum sm6150_functions {
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msm_mux_qup02,
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@ -1559,84 +1559,34 @@ static const struct msm_pingroup sm6150_groups[] = {
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NA, NA, NA, NA),
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[121] = PINGROUP(121, SOUTH, mclk1, NA, NA, NA, NA, NA, NA, NA, NA),
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[122] = PINGROUP(122, SOUTH, mclk2, NA, NA, NA, NA, NA, NA, NA, NA),
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[123] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x59a000, 15, 0),
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[124] = SDC_QDSD_PINGROUP(sdc1_clk, 0x59a000, 13, 6),
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[125] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x59a000, 11, 3),
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[126] = SDC_QDSD_PINGROUP(sdc1_data, 0x59a000, 9, 0),
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[127] = SDC_QDSD_PINGROUP(sdc2_clk, 0xd98000, 14, 6),
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[128] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xd98000, 11, 3),
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[129] = SDC_QDSD_PINGROUP(sdc2_data, 0xd98000, 9, 0),
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[130] = UFS_RESET(ufs_reset, 0x59f000),
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[123] = UFS_RESET(ufs_reset, 0x59f000),
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[124] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x59a000, 15, 0),
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[125] = SDC_QDSD_PINGROUP(sdc1_clk, 0x59a000, 13, 6),
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[126] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x59a000, 11, 3),
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[127] = SDC_QDSD_PINGROUP(sdc1_data, 0x59a000, 9, 0),
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[128] = SDC_QDSD_PINGROUP(sdc2_clk, 0xd98000, 14, 6),
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[129] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xd98000, 11, 3),
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[130] = SDC_QDSD_PINGROUP(sdc2_data, 0xd98000, 9, 0),
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};
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static const struct msm_gpio_wakeirq_map sm6150_pdc_map[] = {
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{ 1, 45 }, { 3, 31 }, { 7, 55 }, { 9, 110 }, { 11, 34 },
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{ 13, 33 }, { 14, 35 }, { 17, 46 }, { 19, 48 }, { 21, 83 },
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{ 22, 36 }, { 26, 38 }, { 35, 37 }, { 39, 118 }, { 41, 47 },
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{ 47, 49 }, { 48, 51 }, { 50, 52 }, { 51, 116 }, { 55, 56 },
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{ 56, 57 }, { 57, 58 }, { 60, 60 }, { 71, 54 }, { 80, 73 },
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{ 81, 64 }, { 82, 50 }, { 83, 65 }, { 84, 92 }, { 85, 99 },
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{ 86, 67 }, { 87, 84 }, { 88, 117 }, { 89, 115 }, { 90, 69 },
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{ 92, 88}, { 93, 75 }, { 94, 91 }, { 95, 72 }, { 96, 82 },
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{ 97, 74 }, { 98, 95 }, { 99, 94 }, { 100, 100 }, { 101, 40 },
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{ 102, 93 }, { 103, 77 }, { 104, 78 }, { 105, 96 }, { 107, 97 },
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{ 108, 111 }, { 112, 112 }, { 113, 113 }, { 117, 85 }, { 118, 102},
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{ 119, 87 }, { 120, 114}, { 121, 89 }, { 122, 90},
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};
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static struct msm_dir_conn sm6150_dir_conn[] = {
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{1, 525},
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{3, 511},
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{7, 535},
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{9, 625},
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{11, 514},
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{13, 513},
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{14, 515},
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{17, 526},
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{19, 528},
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{21, 563},
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{22, 516},
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{26, 518},
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{35, 517},
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{39, 633}, /* GPIO 39 mapped to SPI 640 as well */
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{41, 527},
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{47, 529},
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{48, 531},
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{50, 532},
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{51, 631}, /* GPIO 51 mapped to SPI 638 as well */
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{55, 536},
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{56, 537},
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{57, 538},
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{60, 540},
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{71, 534},
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{80, 553},
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{81, 544},
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{82, 530},
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{83, 545},
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{84, 572},
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{85, 614},
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{86, 547},
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{87, 564},
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{88, 632}, /* GPIO 88 mapped to SPI 639 as well */
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{89, 630}, /* GPIO 89 mapped to SPI 637 as well */
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{90, 549},
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{92, 568},
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{93, 555},
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{94, 571},
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{95, 552},
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{96, 562},
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{97, 554},
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{98, 610},
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{99, 609},
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{100, 615},
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{101, 520},
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{102, 573},
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{103, 557},
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{104, 558},
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{105, 611},
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{107, 612},
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{108, 626},
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{112, 627},
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{113, 628},
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{117, 565},
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{118, 617},
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{119, 567},
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{120, 629},
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{121, 569},
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{122, 570},
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{-1, 216},
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{-1, 215},
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{-1, 214},
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{-1, 213},
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{-1, 212},
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{-1, 211},
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{-1, 210},
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{-1, 209},
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{-1, 0}, {-1, 0}, {-1, 0}, {-1, 0}, {-1, 0},
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{-1, 0}, {-1, 0}, {-1, 0}, {-1, 0}
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};
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#ifdef CONFIG_HIBERNATION
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@ -1654,7 +1604,9 @@ static struct msm_pinctrl_soc_data sm6150_pinctrl = {
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.nfunctions = ARRAY_SIZE(sm6150_functions),
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.groups = sm6150_groups,
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.ngroups = ARRAY_SIZE(sm6150_groups),
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.ngpios = 123,
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.ngpios = 124,
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.wakeirq_map = sm6150_pdc_map,
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.nwakeirq_map = ARRAY_SIZE(sm6150_pdc_map),
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.dir_conn = sm6150_dir_conn,
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#ifdef CONFIG_HIBERNATION
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.dir_conn_addr = tile_dir_conn_addr,
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