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msm: kgsl: Dump the always on counter for a6xx interrupts

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If an interrupt occurs while GX is off it is useful to read the always
on counter value to match the error with the GMU trace.

Change-Id: Ic0dedbad923e37ebcb9c19dc26b0023a2bd0613c
Signed-off-by: Hareesh Gundu <[email protected]>
Signed-off-by: Jordan Crouse <[email protected]>
This commit is contained in:
Jordan Crouse 2019-12-11 11:49:21 -07:00
commit ea01925637
1 changed files with 9 additions and 2 deletions
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11
drivers/gpu/msm/adreno_a6xx.c
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@ -1404,25 +1404,32 @@ static int a6xx_irq_poll_fence(struct adreno_device *adreno_dev)
{
struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
u32 status, fence, fence_retries = 0;
u64 a, b, c;
if (!gmu_core_isenabled(device))
return 0;
a = a6xx_read_alwayson(adreno_dev);
kgsl_regread(device, A6XX_GMU_AO_AHB_FENCE_CTRL, &fence);
while (fence != 0) {
b = a6xx_read_alwayson(adreno_dev);
/* Wait for small time before trying again */
udelay(1);
kgsl_regread(device, A6XX_GMU_AO_AHB_FENCE_CTRL, &fence);
if (fence_retries == 100 && fence != 0) {
c = a6xx_read_alwayson(adreno_dev);
kgsl_regread(device, A6XX_GMU_RBBM_INT_UNMASKED_STATUS,
&status);
dev_crit_ratelimited(device->dev,
"status=0x%x Unmasked status=0x%x Mask=0x%x\n",
"status=0x%x Unmasked status=0x%x Mask=0x%x timestamps: %llx %llx %llx\n",
status & adreno_dev->irq_mask, status,
adreno_dev->irq_mask);
adreno_dev->irq_mask, a, b, c);
return -ETIMEDOUT;
}