From ea27d6f0cb4c4b8f17da36324fb5d8826d356cef Mon Sep 17 00:00:00 2001
From: Melody Olvera <molvera@quicinc.com>
Date: Tue, 29 Jun 2021 11:04:58 -0700
Subject: [PATCH] ARM: dts: msm: Add interrupt mask offset for EUD for sdxlemur

The EUD driver defaults to using INT1 for its interrupt mask.
However, on sdxlemur, this interrupt does not serve the apps
processor, so add the offset of the interrupt mask to the
device tree entry for EUD on sdxlemur.

Change-Id: I48e36cfead5f3b47ae97f4088cd019994654309e
---
 qcom/sdxlemur.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/qcom/sdxlemur.dtsi b/qcom/sdxlemur.dtsi
index a130619ee521..a2908fa370f1 100644
--- a/qcom/sdxlemur.dtsi
+++ b/qcom/sdxlemur.dtsi
@@ -412,6 +412,7 @@
 		interrupt-names = "eud_irq";
 		interrupt-parent = <&pdc>;
 		interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-mask = <0x30>;
 		reg = <0xff0000 0x2000>,
 			<0xff2000 0x1000>;
 		reg-names = "eud_base", "eud_mode_mgr2";