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Revert "ASoC: cs35l41: Specify CSPL_CMD address"

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This reverts commit dedc905d09d87794b2d5040e1ae8c82f75e1ab9b.
Mot-CRs-fixed: (CR): River: AoU bringup on Marley+Prince
Change-Id: Ia7a8ae1bd6d8dfc483ecbc19ed0e984c515fb7f9
Reviewed-on: https://gerrit.mot.com/1238843
Tested-by: Jira Key
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Reviewed-by: Konstantin Makariev <kmakariev@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
vkarp 2018-08-10 12:27:01 -05:00 • committed by Patrick Gries
commit ea40ea0ace
3 changed files with 7 additions and 13 deletions
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1
include/sound/cs35l41.h
View file

@ -61,7 +61,6 @@ struct cs35l41_private {
int extclk_freq;
int extclk_cfg;
int sclk;
unsigned int cspl_cmd_reg;
bool tdm_mode;
bool i2s_mode;
bool swire_mode;

12
sound/soc/codecs/cs35l41.c
View file

@ -175,12 +175,12 @@ static int cs35l41_dsp_load_ev(struct snd_soc_dapm_widget *w,
cs35l41->halo_booted = true;
}
regmap_write(cs35l41->regmap, cs35l41->cspl_cmd_reg,
CS35L41_CSPL_CMD_UNMUTE);
regmap_write(cs35l41->regmap, CS35L41_CSPL_COMMAND,
(CS35L41_CSPL_CMD_UNMUTE));
return 0;
case SND_SOC_DAPM_PRE_PMD:
regmap_write(cs35l41->regmap, cs35l41->cspl_cmd_reg,
regmap_write(cs35l41->regmap, CS35L41_CSPL_COMMAND,
CS35L41_CSPL_CMD_MUTE);
default:
return 0;
@ -1720,12 +1720,6 @@ int cs35l41_probe(struct cs35l41_private *cs35l41,
"Failed to apply A0 errata patch %d\n", ret);
goto err;
}
cs35l41->cspl_cmd_reg = CS35L41_CSPL_COMMAND_REV_A0;
break;
case CS35L41_REVID_B0:
cs35l41->cspl_cmd_reg = CS35L41_CSPL_COMMAND_REV_B0;
break;
}
ret = cs35l41_otp_unpack(cs35l41);

7
sound/soc/codecs/cs35l41.h
View file

@ -696,7 +696,6 @@
#define CS35L41R_CHIP_ID 0x35b40
#define CS35L41_MTLREVID_MASK 0x0F
#define CS35L41_REVID_A0 0xA0
#define CS35L41_REVID_B0 0xB0
#define CS35L41_DSP_N_RX_RATES 8
#define CS35L41_DSP_N_TX_RATES 8
@ -734,7 +733,9 @@ extern const struct cs35l41_otp_map_element_t
#define CS35L41_CSPL_CMD_UNMUTE 2
#define CS35L41_CSPL_CMD_REINIT 3
#define CS35L41_CSPL_COMMAND_REV_A0 0x02800210
#define CS35L41_CSPL_COMMAND_REV_B0 0x02800234
#define CS35L41_CSPL_XM_STRUCT_ADDR 0x0280020c
#define CS35L41_CSPL_COMMAND 0x02800210
#define CS35L41_CSPL_CAL_STRUCT_ADDR 0x02800224
#define CS35L41_AMB_TEMP_DEFAULT 25
#endif /*__CS35L41_H__*/