From eaa8a1fefd92d1d7f64d83ef8ff12d451f7339fb Mon Sep 17 00:00:00 2001
From: Nirav Shah <nnshah@codeaurora.org>
Date: Mon, 17 Feb 2020 19:22:01 +0530
Subject: [PATCH] qcacld-3.0: Enable Shadow register from PCIe block in QCN7605

QCN7605 has 2 set of shadow registers, WCSS block and PCIe block.
As PCIe shadow register are at power domain boundary, enabling
PCIe shadow register for QCN7605.
Also PCIe shadow register falls below 512KB, no need to use register
windowing which is required to get it access from IPA FW.

Change-Id: Ic0bbc2de4c3e32c4fb6453d273f0f29d19f3537c
CRs-Fixed: 2623851
---
 Kbuild               | 1 +
 configs/genoa.common | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/Kbuild b/Kbuild
index 1cc44c8f23e4..9e9076293eb2 100644
--- a/Kbuild
+++ b/Kbuild
@@ -3007,6 +3007,7 @@ cppflags-$(CONFIG_SAP_DHCP_FW_IND) += -DSAP_DHCP_FW_IND
 cppflags-$(CONFIG_WLAN_DP_PENDING_MEM_FLUSH) += -DWLAN_DP_PENDING_MEM_FLUSH
 cppflags-$(CONFIG_WLAN_SUPPORT_DATA_STALL) += -DWLAN_SUPPORT_DATA_STALL
 cppflags-$(CONFIG_WLAN_SUPPORT_TXRX_HL_BUNDLE) += -DWLAN_SUPPORT_TXRX_HL_BUNDLE
+cppflags-$(CONFIG_QCN7605_PCIE_SHADOW_REG_SUPPORT) += -DQCN7605_PCIE_SHADOW_REG_SUPPORT
 
 ifdef CONFIG_MAX_LOGS_PER_SEC
 ccflags-y += -DWLAN_MAX_LOGS_PER_SEC=$(CONFIG_MAX_LOGS_PER_SEC)
diff --git a/configs/genoa.common b/configs/genoa.common
index e4980ca651b3..3e862d5231f5 100644
--- a/configs/genoa.common
+++ b/configs/genoa.common
@@ -230,4 +230,6 @@ CONFIG_SAP_DHCP_FW_IND := n
 #Enable FW Offload
 CONFIG_WLAN_FW_OFFLOAD := y
 
+#Enable PCIe Shadow Register
+CONFIG_QCN7605_PCIE_SHADOW_REG_SUPPORT := y
 ###################################