From ead5c2e76931879cb6b3562a186c32a17ff87b68 Mon Sep 17 00:00:00 2001
From: Vignesh Viswanathan <viswanat@qti.qualcomm.com>
Date: Fri, 26 Nov 2021 14:44:09 +0530
Subject: [PATCH] ARM: dts: qcom: Enable QCN9000 nodes for
 sdxlemur-mtp-cpe-pine2x

Enable QCN9000 wifi, reserved memory, GPIO and PCIe nodes for
sdxlemur-mtp-cpe-pine2x.dtsi.

Change-Id: Ife764d2519b94a2b02a6f99f853bab88f5ee8841
---
 qcom/sdxlemur-mtp-cpe-pine2x.dtsi | 80 ++++++++++++++++++++++++++++++-
 1 file changed, 79 insertions(+), 1 deletion(-)

diff --git a/qcom/sdxlemur-mtp-cpe-pine2x.dtsi b/qcom/sdxlemur-mtp-cpe-pine2x.dtsi
index a7373e1f2622..2fc2b95bc75d 100644
--- a/qcom/sdxlemur-mtp-cpe-pine2x.dtsi
+++ b/qcom/sdxlemur-mtp-cpe-pine2x.dtsi
@@ -1,4 +1,82 @@
+#include "sdxlemur-qcn9000.dtsi"
 
 &soc {
-
+	pine_vreg: pine_vreg {
+		compatible = "regulator-fixed";
+		regulator-name = "pine_vreg";
+		gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		regulator-enable-ramp-delay = <200000>;
+	};
+};
+
+&qps615_vreg {
+	vin-supply = <&pine_vreg>;
+};
+
+&pcie_i2c_ctrl {
+	reg_update = <0x82c030 0x1
+			0x828000 0x3
+			0x82bd00 0x8
+			0x82c030 0x2
+			0x828000 0x3
+			0x82bd00 0x8
+			0x82c030 0x8
+			0x828000 0x1
+			0x82bd00 0x8
+			0x82c01c 0x10
+			0x82c030 0xf
+			0x828000 0xf
+			0x82b268 0x2>;
+};
+
+&pcie0 {
+	qcom,no-l0s-supported;
+	qcom,no-l1-supported;
+	qcom,no-l1ss-supported;
+	qcom,no-aux-clk-sync;
+};
+
+&pcie0_bus2_dev1_fn0 {
+	cnss_pci1: cnss_pci1 {
+		reg = <0 0 0 0 0>;
+		qcom,iommu-group = <&qcn9000_pci_iommu_group_0>;
+		memory-region = <&qcn9000_0_mem>;
+		qrtr_instance_id = <0x20>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+};
+
+&pcie0_bus2_dev2_fn0 {
+	cnss_pci2: cnss_pci2 {
+		reg = <0 0 0 0 0>;
+		qcom,iommu-group = <&qcn9000_pci_iommu_group_1>;
+		memory-region = <&qcn9000_1_mem>;
+		qrtr_instance_id = <0x21>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+};
+
+&wifi0 {
+	status = "ok";
+	board_id = <0xa0>;
+};
+
+&wifi1 {
+	status = "ok";
+	board_id = <0xa1>;
+};
+
+&qcn9000_0_mem {
+	status = "ok";
+};
+
+&qcn9000_1_mem {
+	status = "ok";
 };