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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-09 13:49:24 -04:00
msm: mhi_dev: Update msi_disable on fetching MSI config
Fix for the timing difference between host writing into MSI capability register and MHI MMIO init where the first instance of setting or resetting the msi_disable flag. Hence, updating the msi_disable flag on fetching the MSI config from PCIe. This will ensure to update the flag value in the case of EP reading the MSI capability register before the host sets it. Change-Id: I508a85e7107ee5a575fc03d54ab3e445049d73b2 Signed-off-by: Mohana Basava Tejesh Reddy Mareddy <quic_mmareddy@quicinc.com>
This commit is contained in:
parent
1a1dccc448
commit
eb0c95250b
1 changed files with 53 additions and 41 deletions
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@ -103,6 +103,38 @@ static DECLARE_COMPLETION(write_to_host);
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static DECLARE_COMPLETION(transfer_host_to_device);
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static DECLARE_COMPLETION(transfer_device_to_host);
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/*
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* mhi_dev_get_msi_config () - Fetch the MSI config from
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* PCIe and set the msi_disable flag accordingly
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*
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* @phandle : phandle structure
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* @cfg : PCIe MSI config structure
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*/
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static int mhi_dev_get_msi_config(struct ep_pcie_hw *phandle,
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struct ep_pcie_msi_config *cfg)
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{
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int rc;
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/*
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* Fetching MSI config to read the MSI capability and setting the
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* msi_disable flag based on it.
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*/
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rc = ep_pcie_get_msi_config(phandle, cfg);
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if (rc == -EOPNOTSUPP) {
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mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");
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mhi_ctx->msi_disable = true;
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} else if (!rc) {
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mhi_ctx->msi_disable = false;
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} else {
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mhi_log(MHI_MSG_ERROR,
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"Error retrieving pcie msi logic\n");
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return rc;
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}
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mhi_log(MHI_MSG_VERBOSE, "msi_disable = %d\n", mhi_ctx->msi_disable);
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return 0;
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}
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/*
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* mhi_dev_ring_cache_completion_cb () - Call back function called
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* by IPA driver when ring element cache is done
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@ -280,16 +312,16 @@ static int mhi_dev_schedule_msi_ipa(struct mhi_dev *mhi, struct event_req *ereq)
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union mhi_dev_ring_ctx *ctx;
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int rc;
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rc = ep_pcie_get_msi_config(mhi->phandle, &cfg);
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if (rc == -EOPNOTSUPP) {
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mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");
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mhi_ctx->msi_disable = true;
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return 0;
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} else if (rc) {
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rc = mhi_dev_get_msi_config(mhi->phandle, &cfg);
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if (rc) {
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mhi_log(MHI_MSG_ERROR, "Error retrieving pcie msi logic\n");
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return rc;
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}
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/* If MSI is disabled, bailing out */
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if (mhi_ctx->msi_disable)
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return 0;
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ctx = (union mhi_dev_ring_ctx *)&mhi->ev_ctx_cache[ereq->event_ring];
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msi_addr.size = sizeof(uint32_t);
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@ -436,17 +468,16 @@ static int mhi_trigger_msi_edma(struct mhi_dev_ring *ring, u32 idx)
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unsigned long flags;
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if (!mhi_ctx->msi_lower) {
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rc = ep_pcie_get_msi_config(mhi_ctx->phandle, &cfg);
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if (rc == -EOPNOTSUPP) {
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mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");
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mhi_ctx->msi_disable = true;
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return 0;
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} else if (rc) {
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mhi_log(MHI_MSG_ERROR,
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"Error retrieving pcie msi logic\n");
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rc = mhi_dev_get_msi_config(mhi_ctx->phandle, &cfg);
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if (rc) {
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mhi_log(MHI_MSG_ERROR, "Error retrieving pcie msi logic\n");
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return rc;
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}
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/* If MSI is disabled, bailing out */
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if (mhi_ctx->msi_disable)
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return 0;
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mhi_ctx->msi_data = cfg.data;
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mhi_ctx->msi_lower = cfg.lower;
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}
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@ -1450,13 +1481,9 @@ static int mhi_hwc_init(struct mhi_dev *mhi)
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}
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/* Call IPA HW_ACC Init with MSI Address and db routing info */
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rc = ep_pcie_get_msi_config(mhi_ctx->phandle, &cfg);
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if (rc == -EOPNOTSUPP) {
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mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");
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mhi_ctx->msi_disable = true;
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} else if (rc) {
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mhi_log(MHI_MSG_ERROR,
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"Error retrieving pcie msi logic\n");
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rc = mhi_dev_get_msi_config(mhi_ctx->phandle, &cfg);
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if (rc) {
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mhi_log(MHI_MSG_ERROR, "Error retrieving pcie msi logic\n");
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return rc;
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}
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@ -1671,11 +1698,8 @@ int mhi_dev_send_event(struct mhi_dev *mhi, int evnt_ring,
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struct ep_pcie_msi_config cfg;
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struct mhi_addr transfer_addr;
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rc = ep_pcie_get_msi_config(mhi->phandle, &cfg);
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if (rc == -EOPNOTSUPP) {
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mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");
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mhi_ctx->msi_disable = true;
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} else if (rc) {
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rc = mhi_dev_get_msi_config(mhi->phandle, &cfg);
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if (rc) {
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mhi_log(MHI_MSG_ERROR, "Error retrieving pcie msi logic\n");
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return rc;
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}
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@ -4398,24 +4422,12 @@ static int mhi_dev_resume_mmio_mhi_init(struct mhi_dev *mhi_ctx)
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return -EINVAL;
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}
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/*
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* Fetching MSI config to read the MSI capability and setting the
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* msi_disable flag based on it.
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*/
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rc = ep_pcie_get_msi_config(mhi_ctx->phandle, &cfg);
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if (rc == -EOPNOTSUPP) {
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mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");
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mhi_ctx->msi_disable = true;
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} else if (!rc) {
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mhi_ctx->msi_disable = false;
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} else {
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mhi_log(MHI_MSG_ERROR,
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"Error retrieving pcie msi logic\n");
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rc = mhi_dev_get_msi_config(mhi_ctx->phandle, &cfg);
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if (rc) {
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mhi_log(MHI_MSG_ERROR, "Error retrieving pcie msi logic\n");
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return rc;
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}
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mhi_log(MHI_MSG_VERBOSE, "msi_disable = %d\n", mhi_ctx->msi_disable);
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rc = mhi_dev_recover(mhi_ctx);
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if (rc) {
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mhi_log(MHI_MSG_ERROR, "get mhi state failed\n");
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