ASoC: Updates for v3.8

Very quiet release for ASoC really:
 
 - Standardisation of the logging.
 - DT and dmaengine support for Atmel.
 - Support for Wolfson ADSP cores.
 - New drivers for Freescale/iVeia P1022 and Maxim MAX98090.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJQutrLAAoJELSic+t+oim9NVUP/3Y1YJjUADTy3w1d6L7zKaQb
 dGVg2cdDBNgXCrIuyb3zUA9yNGrR1c7gzDGjTuiBrJKx917/DrF08pmgHAUv5e9B
 +//xoy2lSwYgnPiWY7p6092+pYNI1hs4PDkV3zucrkkgQovIZOlebUM3MOrSf50+
 abe9uPA11EyqPtmy8HrhtL2iJ3kUOq1y6YNbrDQaaWTL/lwBPS+LzxFAIE36LjN6
 fIUOb8jtSE0rjOVo+jmuytdCnlugaEFfQzOebKMVYpB9LNv6hqISai/baaKFO1Fc
 Jtkjv2xGuUuxP0kY6Fkbjabut7mS8oiVZfGmNUKbYoKStsk1t//xjay/2F0HsNgg
 O7PsK6y1HD/iB87YNaO8Go/6lLSszeQ2WU7Fvynv/CTOpjO/8gjaQz3zDi3HsF5O
 gyh/WYnj9jwnUJkaMDeEyjKBbKDxLuBeXBETVhNIWNgCwnj48TSYQwmGhtefNnS1
 AM/CUrfXVsgCxPn8z/ep/hbkat8+PHENuPR9v81mUyQvVX9jTALVIYioTdxkc8Ul
 y0p5UmgM/TsmnINGVUeFp5LkmfdyOhUhBtwovDhzDjR4RC1/otty1/9l4VHqw1ym
 ETwqu7pl7bb9aDNsOEV9Z21kOMuTDbApHIT6crptNBllUvR0jDYfD4xOAs3zQLO5
 JWOX2fPUHzFusINuA6fS
 =2irt
 -----END PGP SIGNATURE-----

Merge tag 'asoc-3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next

ASoC: Updates for v3.8

Very quiet release for ASoC really:

- Standardisation of the logging.
- DT and dmaengine support for Atmel.
- Support for Wolfson ADSP cores.
- New drivers for Freescale/iVeia P1022 and Maxim MAX98090.
This commit is contained in:
Takashi Iwai 2012-12-03 09:55:44 +01:00
commit eb10149d17
301 changed files with 7775 additions and 2751 deletions

View file

@ -19,6 +19,7 @@
struct cs4271_platform_data {
int gpio_nreset; /* GPIO driving Reset pin, if any */
int amutec_eq_bmutec:1; /* flag to enable AMUTEC=BMUTEC */
};
#endif /* __CS4271_H */

View file

@ -26,6 +26,7 @@
* A: inversion
* B: format mode
* C: chip specific
* D: clock selecter if master mode
*/
/* A: clock inversion */
@ -44,6 +45,11 @@
#define SH_FSI_OPTION_MASK 0x00000F00
#define SH_FSI_ENABLE_STREAM_MODE (1 << 8) /* for 16bit data */
/* D: clock selecter if master mode */
#define SH_FSI_CLK_MASK 0x0000F000
#define SH_FSI_CLK_EXTERNAL (0 << 12)
#define SH_FSI_CLK_CPG (1 << 12) /* FSIxCK + FSI-DIV */
/*
* set_rate return value
*

View file

@ -26,6 +26,7 @@ struct aic32x4_pdata {
u32 power_cfg;
u32 micpga_routing;
bool swapdacs;
int rstn_gpio;
};
#endif