mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-24 21:54:34 -04:00
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (29 commits) [ARM] 4062/1: S3C24XX: Anubis and Osiris shuld have CONFIG_PM_SIMTEC [ARM] 4060/1: update several ARM defconfigs [ARM] 4061/1: xsc3: change of maintainer [ARM] 4059/1: VR1000: fix LED3's platform device number [ARM] 4022/1: iop13xx: generic irq fixups [ARM] 4015/1: s3c2410 cpu ifdefs [ARM] 4057/1: ixp23xx: unconditionally enable hardware coherency [ARM] 4056/1: iop13xx: fix resource.end off-by-one in flash setup [ARM] 4055/1: iop13xx: fix phys_io/io_pg_offst for iq81340mc/sc [ARM] 4054/1: ep93xx: add HWCAP_CRUNCH [ARM] 4052/1: S3C24XX: Fix PM in arch/arm/mach-s3c2410/Kconfig [ARM] Fix warnings from asm/system.h [ARM] 4051/1: S3C24XX: clean includes in S3C2440 and S3C2442 support [ARM] 4050/1: S3C24XX: remove old changelogs in arch/arm/mach-s3c2410 [ARM] 4049/1: S3C24XX: fix sparse warning due to upf_t in regs-serial.h [ARM] 4048/1: S3C24XX: make s3c2410_pm_resume() static [ARM] 4046/1: S3C24XX: fix sparse errors arch/arm/mach-s3c2410 [ARM] 4045/1: S3C24XX: remove old VA for non-shared areas [ARM] 4044/1: S3C24XX: fix sparse warnings in arch/arm/mach-s3c2410/s3c2442-clock.c [ARM] 4043/1: S3C24XX: fix sparse warnings in arch/arm/mach-s3c2410/s3c2440-clock.c ...
This commit is contained in:
Linus Torvalds
commit
eb2112fbcf
83 changed files with 1071 additions and 462 deletions
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@ -24,8 +24,5 @@
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#define PBI_CF_IDE_BASE (IQ81340_CMP_FLSH)
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#define PBI_CF_BAR_ADDR (IOP13XX_PBI_BAR1)
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/* These are the values used in the Machine description */
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#define PHYS_IO 0xfeffff00
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#define IO_PG_OFFSET 0xffffff00
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#define BOOT_PARAM_OFFSET 0x00000100
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#endif /* _IQ81340_H_ */
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@ -41,21 +41,7 @@
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data = *((volatile int *)IXP23XX_PCI_SDRAM_BAR); \
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__phys_to_virt((((b - (data & 0xfffffff0)) + 0x00000000))); })
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/*
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* Coherency support. Only supported on A2 CPUs or on A1
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* systems that have the cache coherency workaround.
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*/
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static inline int __ixp23xx_arch_is_coherent(void)
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{
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extern unsigned int processor_id;
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if (((processor_id & 15) >= 4) || machine_is_roadrunner())
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return 1;
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return 0;
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}
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#define arch_is_coherent() __ixp23xx_arch_is_coherent()
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#define arch_is_coherent() 1
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#endif
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@ -1,6 +1,6 @@
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/* linux/include/asm-arm/arch-s3c2410/anubis-cpld.h
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*
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* (c) 2005 Simtec Electronics
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* Copyright (c) 2005 Simtec Electronics
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* http://www.simtec.co.uk/products/
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* Ben Dooks <ben@simtec.co.uk>
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*
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@ -1,6 +1,6 @@
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/* linux/include/asm-arm/arch-s3c2410/anubis-irq.h
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*
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* (c) 2005 Simtec Electronics
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* Copyright (c) 2005 Simtec Electronics
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* http://www.simtec.co.uk/products/
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* Ben Dooks <ben@simtec.co.uk>
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*
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@ -1,6 +1,6 @@
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/* linux/include/asm-arm/arch-s3c2410/anubis-map.h
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*
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* (c) 2005 Simtec Electronics
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* Copyright (c) 2005 Simtec Electronics
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* http://www.simtec.co.uk/products/
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* Ben Dooks <ben@simtec.co.uk>
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*
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@ -1,6 +1,6 @@
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/* linux/include/asm-arm/arch-s3c2410/audio.h
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*
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* (c) 2004-2005 Simtec Electronics
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* Copyright (c) 2004-2005 Simtec Electronics
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* http://www.simtec.co.uk/products/SWLINUX/
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* Ben Dooks <ben@simtec.co.uk>
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*
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@ -1,7 +1,7 @@
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/* linux/include/asm-arm/arch-s3c2410/bast-cpld.h
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*
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* (c) 2003,2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* Copyright (c) 2003,2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* BAST - CPLD control constants
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*
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@ -1,7 +1,7 @@
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/* linux/include/asm-arm/arch-s3c2410/bast-irq.h
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*
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* (c) 2003,2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* Copyright (c) 2003,2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* Machine BAST - IRQ Number definitions
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*
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@ -1,7 +1,7 @@
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/* linux/include/asm-arm/arch-s3c2410/bast-map.h
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*
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* (c) 2003,2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* Copyright (c) 2003,2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* Machine BAST - Memory map definitions
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*
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@ -1,6 +1,6 @@
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/* linux/include/asm-arm/arch-s3c2410/bast-pmu.h
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*
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* (c) 2003,2004 Simtec Electronics
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* Copyright (c) 2003,2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
|
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* Vincent Sanders <vince@simtec.co.uk>
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*
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@ -1,6 +1,6 @@
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/* linux/include/asm-arm/arch-s3c2410/h1940-latch.h
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*
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* (c) 2005 Simtec Electronics
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* Copyright (c) 2005 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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@ -16,7 +16,7 @@
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#ifndef __ASSEMBLY__
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#define H1940_LATCH ((void __iomem *)0xF8000000)
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#define H1940_LATCH ((void __force __iomem *)0xF8000000)
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#else
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#define H1940_LATCH 0xF8000000
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#endif
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@ -1,7 +1,7 @@
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/* linux/include/asm-arm/arch-s3c2410/hardware.h
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*
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* (c) 2003 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* Copyright (c) 2003 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - hardware
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*
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@ -1,6 +1,6 @@
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/* linux/include/asm-arm/arch-s3c2410/iic.h
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*
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* (c) 2004 Simtec Electronics
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* Copyright (c) 2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - I2C Controller platfrom_device info
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@ -1,6 +1,6 @@
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/* linux/include/asm-arm/arch-s3c2410/leds-gpio.h
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*
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* (c) 2006 Simtec Electronics
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* Copyright (c) 2006 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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@ -1,7 +1,7 @@
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/* linux/include/asm-arm/arch-s3c2410/map.h
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*
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* (c) 2003 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* Copyright (c) 2003 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - Memory map definitions
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*
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@ -25,7 +25,7 @@
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*/
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#ifndef __ASSEMBLY__
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#define S3C2410_ADDR(x) ((void __iomem *)0xF0000000 + (x))
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#define S3C2410_ADDR(x) ((void __iomem __force *)0xF0000000 + (x))
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#else
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#define S3C2410_ADDR(x) (0xF0000000 + (x))
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#endif
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@ -47,73 +47,65 @@
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#define S3C24XX_SZ_MEMCTRL SZ_1M
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/* USB host controller */
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#define S3C24XX_VA_USBHOST S3C2410_ADDR(0x00200000)
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#define S3C2400_PA_USBHOST (0x14200000)
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#define S3C2410_PA_USBHOST (0x49000000)
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#define S3C24XX_SZ_USBHOST SZ_1M
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/* DMA controller */
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#define S3C24XX_VA_DMA S3C2410_ADDR(0x00300000)
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#define S3C2400_PA_DMA (0x14600000)
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#define S3C2410_PA_DMA (0x4B000000)
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#define S3C24XX_SZ_DMA SZ_1M
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/* Clock and Power management */
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#define S3C24XX_VA_CLKPWR S3C2410_ADDR(0x00400000)
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#define S3C24XX_VA_CLKPWR S3C2410_ADDR(0x00200000)
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#define S3C2400_PA_CLKPWR (0x14800000)
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#define S3C2410_PA_CLKPWR (0x4C000000)
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#define S3C24XX_SZ_CLKPWR SZ_1M
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/* LCD controller */
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#define S3C24XX_VA_LCD S3C2410_ADDR(0x00600000)
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#define S3C24XX_VA_LCD S3C2410_ADDR(0x00300000)
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#define S3C2400_PA_LCD (0x14A00000)
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#define S3C2410_PA_LCD (0x4D000000)
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#define S3C24XX_SZ_LCD SZ_1M
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/* NAND flash controller */
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#define S3C24XX_VA_NAND S3C2410_ADDR(0x00700000)
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#define S3C2410_PA_NAND (0x4E000000)
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#define S3C24XX_SZ_NAND SZ_1M
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/* MMC controller - available on the S3C2400 */
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#define S3C2400_VA_MMC S3C2400_ADDR(0x00700000)
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#define S3C2400_PA_MMC (0x15A00000)
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#define S3C2400_SZ_MMC SZ_1M
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/* UARTs */
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#define S3C24XX_VA_UART S3C2410_ADDR(0x00800000)
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#define S3C24XX_VA_UART S3C2410_ADDR(0x00400000)
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#define S3C2400_PA_UART (0x15000000)
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#define S3C2410_PA_UART (0x50000000)
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#define S3C24XX_SZ_UART SZ_1M
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/* Timers */
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#define S3C24XX_VA_TIMER S3C2410_ADDR(0x00900000)
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#define S3C24XX_VA_TIMER S3C2410_ADDR(0x00500000)
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#define S3C2400_PA_TIMER (0x15100000)
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#define S3C2410_PA_TIMER (0x51000000)
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#define S3C24XX_SZ_TIMER SZ_1M
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/* USB Device port */
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#define S3C24XX_VA_USBDEV S3C2410_ADDR(0x00A00000)
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#define S3C24XX_VA_USBDEV S3C2410_ADDR(0x00600000)
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#define S3C2400_PA_USBDEV (0x15200140)
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#define S3C2410_PA_USBDEV (0x52000000)
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#define S3C24XX_SZ_USBDEV SZ_1M
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/* Watchdog */
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#define S3C24XX_VA_WATCHDOG S3C2410_ADDR(0x00B00000)
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#define S3C24XX_VA_WATCHDOG S3C2410_ADDR(0x00700000)
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#define S3C2400_PA_WATCHDOG (0x15300000)
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#define S3C2410_PA_WATCHDOG (0x53000000)
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#define S3C24XX_SZ_WATCHDOG SZ_1M
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/* IIC hardware controller */
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#define S3C24XX_VA_IIC S3C2410_ADDR(0x00C00000)
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#define S3C2400_PA_IIC (0x15400000)
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#define S3C2410_PA_IIC (0x54000000)
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#define S3C24XX_SZ_IIC SZ_1M
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#define VA_IIC_BASE (S3C24XX_VA_IIC)
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/* IIS controller */
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#define S3C24XX_VA_IIS S3C2410_ADDR(0x00D00000)
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#define S3C2400_PA_IIS (0x15508000)
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#define S3C2410_PA_IIS (0x55000000)
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#define S3C24XX_SZ_IIS SZ_1M
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@ -134,25 +126,21 @@
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#define S3C24XX_SZ_GPIO SZ_1M
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/* RTC */
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#define S3C24XX_VA_RTC S3C2410_ADDR(0x00F00000)
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#define S3C2400_PA_RTC (0x15700040)
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#define S3C2410_PA_RTC (0x57000000)
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#define S3C24XX_SZ_RTC SZ_1M
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/* ADC */
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#define S3C24XX_VA_ADC S3C2410_ADDR(0x01000000)
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#define S3C2400_PA_ADC (0x15800000)
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#define S3C2410_PA_ADC (0x58000000)
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#define S3C24XX_SZ_ADC SZ_1M
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|
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/* SPI */
|
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#define S3C24XX_VA_SPI S3C2410_ADDR(0x01100000)
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#define S3C2400_PA_SPI (0x15900000)
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#define S3C2410_PA_SPI (0x59000000)
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#define S3C24XX_SZ_SPI SZ_1M
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|
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/* SDI */
|
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#define S3C24XX_VA_SDI S3C2410_ADDR(0x01200000)
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#define S3C2410_PA_SDI (0x5A000000)
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#define S3C24XX_SZ_SDI SZ_1M
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@ -1,7 +1,7 @@
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/* linux/include/asm-arm/arch-s3c2410/nand.h
|
||||
*
|
||||
* (c) 2004 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* Copyright (c) 2004 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C2410 - NAND device controller platfrom_device info
|
||||
*
|
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|
|
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@ -1,6 +1,6 @@
|
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/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
|
||||
*
|
||||
* (c) 2005 Simtec Electronics
|
||||
* Copyright (c) 2005 Simtec Electronics
|
||||
* http://www.simtec.co.uk/products/
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
|
|
|
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|
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@ -197,7 +197,7 @@ struct s3c2410_uartcfg {
|
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unsigned char hwport; /* hardware port number */
|
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unsigned char unused;
|
||||
unsigned short flags;
|
||||
unsigned long uart_flags; /* default uart flags */
|
||||
upf_t uart_flags; /* default uart flags */
|
||||
|
||||
unsigned long ucon; /* value of ucon for port */
|
||||
unsigned long ulcon; /* value of ulcon for port */
|
||||
|
|
|
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|
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@ -1,7 +1,7 @@
|
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/* linux/include/asm-arm/arch-s3c2410/system.h
|
||||
*
|
||||
* (c) 2003 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* Copyright (c) 2003 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C2410 - System function defines and includes
|
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*
|
||||
|
|
|
|||
|
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@ -1,7 +1,7 @@
|
|||
/* linux/include/asm-arm/arch-s3c2410/timex.h
|
||||
*
|
||||
* (c) 2003-2005 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* Copyright (c) 2003-2005 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C2410 - time parameters
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/* linux/include/asm-arm/arch-s3c2410/uncompress.h
|
||||
*
|
||||
* (c) 2003 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* Copyright (c) 2003 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C2410 - uncompress code
|
||||
*
|
||||
|
|
@ -13,6 +13,7 @@
|
|||
#ifndef __ASM_ARCH_UNCOMPRESS_H
|
||||
#define __ASM_ARCH_UNCOMPRESS_H
|
||||
|
||||
typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
|
||||
|
||||
/* defines for UART registers */
|
||||
#include "asm/arch/regs-serial.h"
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/* linux/include/asm-arm/arch-s3c2410/usb-control.h
|
||||
*
|
||||
* (c) 2004 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* Copyright (c) 2004 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C2410 - usb port information
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/* linux/include/asm-arm/arch-s3c2410/vr1000-cpld.h
|
||||
*
|
||||
* (c) 2003 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* Copyright (c) 2003 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* VR1000 - CPLD control constants
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/* linux/include/asm-arm/arch-s3c2410/vr1000-irq.h
|
||||
*
|
||||
* (c) 2003,2004 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* Copyright (c) 2003,2004 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* Machine VR1000 - IRQ Number definitions
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/* linux/include/asm-arm/arch-s3c2410/vr1000-map.h
|
||||
*
|
||||
* (c) 2003-2005 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* Copyright (c) 2003-2005 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* Machine VR1000 - Memory map definitions
|
||||
*
|
||||
|
|
|
|||
|
|
@ -52,6 +52,7 @@ typedef struct user_fp elf_fpregset_t;
|
|||
#define HWCAP_EDSP 128
|
||||
#define HWCAP_JAVA 256
|
||||
#define HWCAP_IWMMXT 512
|
||||
#define HWCAP_CRUNCH 1024
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
|
|||
|
|
@ -73,6 +73,7 @@
|
|||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/irqflags.h>
|
||||
|
||||
struct thread_info;
|
||||
struct task_struct;
|
||||
|
|
@ -139,6 +140,9 @@ static inline int cpu_is_xsc3(void)
|
|||
#define cpu_is_xscale() 1
|
||||
#endif
|
||||
|
||||
extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
|
||||
extern unsigned long cr_alignment; /* defined in entry-armv.S */
|
||||
|
||||
static inline unsigned int get_cr(void)
|
||||
{
|
||||
unsigned int val;
|
||||
|
|
@ -152,6 +156,10 @@ static inline void set_cr(unsigned int val)
|
|||
: : "r" (val) : "cc");
|
||||
}
|
||||
|
||||
#ifndef CONFIG_SMP
|
||||
extern void adjust_cr(unsigned long mask, unsigned long set);
|
||||
#endif
|
||||
|
||||
#define CPACC_FULL(n) (3 << (n * 2))
|
||||
#define CPACC_SVC(n) (1 << (n * 2))
|
||||
#define CPACC_DISABLE(n) (0 << (n * 2))
|
||||
|
|
@ -170,29 +178,6 @@ static inline void set_copro_access(unsigned int val)
|
|||
: : "r" (val) : "cc");
|
||||
}
|
||||
|
||||
extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
|
||||
extern unsigned long cr_alignment; /* defined in entry-armv.S */
|
||||
|
||||
#ifndef CONFIG_SMP
|
||||
static inline void adjust_cr(unsigned long mask, unsigned long set)
|
||||
{
|
||||
unsigned long flags, cr;
|
||||
|
||||
mask &= ~CR_A;
|
||||
|
||||
set &= mask;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
cr_no_alignment = (cr_no_alignment & ~mask) | set;
|
||||
cr_alignment = (cr_alignment & ~mask) | set;
|
||||
|
||||
set_cr((get_cr() & ~mask) | set);
|
||||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
#endif
|
||||
|
||||
#define UDBG_UNDEFINED (1 << 0)
|
||||
#define UDBG_SYSCALL (1 << 1)
|
||||
#define UDBG_BADABORT (1 << 2)
|
||||
|
|
@ -248,8 +233,6 @@ static inline void sched_cacheflush(void)
|
|||
{
|
||||
}
|
||||
|
||||
#include <linux/irqflags.h>
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
|
||||
#define smp_mb() mb()
|
||||
|
|
|
|||
|
|
@ -360,6 +360,18 @@
|
|||
#define __NR_readlinkat (__NR_SYSCALL_BASE+332)
|
||||
#define __NR_fchmodat (__NR_SYSCALL_BASE+333)
|
||||
#define __NR_faccessat (__NR_SYSCALL_BASE+334)
|
||||
/* 335 for pselect6 */
|
||||
/* 336 for ppoll */
|
||||
#define __NR_unshare (__NR_SYSCALL_BASE+337)
|
||||
#define __NR_set_robust_list (__NR_SYSCALL_BASE+338)
|
||||
#define __NR_get_robust_list (__NR_SYSCALL_BASE+339)
|
||||
#define __NR_splice (__NR_SYSCALL_BASE+340)
|
||||
#define __NR_arm_sync_file_range (__NR_SYSCALL_BASE+341)
|
||||
#define __NR_tee (__NR_SYSCALL_BASE+342)
|
||||
#define __NR_vmsplice (__NR_SYSCALL_BASE+343)
|
||||
#define __NR_move_pages (__NR_SYSCALL_BASE+344)
|
||||
#define __NR_getcpu (__NR_SYSCALL_BASE+345)
|
||||
/* 346 for epoll_pwait */
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
|
|
|
|||
Loading…
Reference in a new issue