Merge "coresight-etm4x: Merge ETM changes"

This commit is contained in:
qctecmdr 2019-09-11 14:44:57 -07:00 • committed by Gerrit - the friendly Code Review server
commit eb8f310881
2 changed files with 9 additions and 5 deletions

View file

@ -667,8 +667,10 @@ static void etm4_init_arch_data(void *info)
else
drvdata->sysstall = false;
/* NUMPROC, bits[30:28] the number of PEs available for tracing */
drvdata->nr_pe = BMVAL(etmidr3, 28, 30);
/* NUMPROC, bits[13:12, 30:28]
* the number of PEs available for tracing
*/
drvdata->nr_pe = (BMVAL(etmidr3, 12, 13) << 3) | BMVAL(etmidr3, 28, 30);
/* NOOVERFLOW, bit[31] is trace overflow prevention supported */
if (BMVAL(etmidr3, 31, 31))
@ -1109,7 +1111,9 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
if (drvdata->cpu < 0)
return drvdata->cpu;
desc.name = devm_kasprintf(dev, GFP_KERNEL, "etm%d", drvdata->cpu);
if (of_property_read_string(dev->of_node, "coresight-name", &desc.name))
desc.name = devm_kasprintf(dev, GFP_KERNEL, "etm%d",
drvdata->cpu);
if (!desc.name)
return -ENOMEM;

View file

@ -8,7 +8,7 @@
#define _LINUX_CORESIGHT_PMU_H
#define CORESIGHT_ETM_PMU_NAME "cs_etm"
#define CORESIGHT_ETM_PMU_SEED 0x10
#define CORESIGHT_ETM_PMU_SEED 0x01
/* ETMv3.5/PTM's ETMCR config bit */
#define ETM_OPT_CYCACC 12
@ -30,7 +30,7 @@ static inline int coresight_get_trace_id(int cpu)
* the common convention is to have data trace IDs be I(N) + 1,
* set instruction trace IDs as a function of the CPU number.
*/
return (CORESIGHT_ETM_PMU_SEED + (cpu * 2));
return (CORESIGHT_ETM_PMU_SEED + cpu);
}
#endif