diff --git a/display/dsi-panel-r66451-dsc-fhd-plus-60hz-cmd.dtsi b/display/dsi-panel-r66451-dsc-fhd-plus-60hz-cmd.dtsi
index 7674b87a769f..6f408edc7be9 100644
--- a/display/dsi-panel-r66451-dsc-fhd-plus-60hz-cmd.dtsi
+++ b/display/dsi-panel-r66451-dsc-fhd-plus-60hz-cmd.dtsi
@@ -14,6 +14,9 @@
 		qcom,dsi-ctrl-num = <0>;
 		qcom,dsi-phy-num = <0>;
 
+		qcom,dsi-sec-ctrl-num = <1>;
+		qcom,dsi-sec-phy-num = <1>;
+
 		qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
 		qcom,mdss-dsi-lane-map = "lane_map_0123";
 		qcom,mdss-dsi-bllp-eof-power-mode;
diff --git a/display/dsi-panel-r66451-dsc-fhd-plus-60hz-video.dtsi b/display/dsi-panel-r66451-dsc-fhd-plus-60hz-video.dtsi
index 310f28f3ee28..1b00915032df 100644
--- a/display/dsi-panel-r66451-dsc-fhd-plus-60hz-video.dtsi
+++ b/display/dsi-panel-r66451-dsc-fhd-plus-60hz-video.dtsi
@@ -6,6 +6,8 @@
 		qcom,mdss-dsi-panel-physical-type = "oled";
 		qcom,dsi-ctrl-num = <0>;
 		qcom,dsi-phy-num = <0>;
+		qcom,dsi-sec-ctrl-num = <1>;
+		qcom,dsi-sec-phy-num = <1>;
 		qcom,mdss-dsi-virtual-channel-id = <0>;
 		qcom,mdss-dsi-stream = <0>;
 		qcom,mdss-dsi-bpp = <24>;
diff --git a/display/shima-sde-display-common.dtsi b/display/shima-sde-display-common.dtsi
index d601cb6cb167..8dd9fd76391c 100644
--- a/display/shima-sde-display-common.dtsi
+++ b/display/shima-sde-display-common.dtsi
@@ -97,6 +97,7 @@
 
 &dsi_r66451_amoled_60hz_video {
 	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
+	qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";
 	qcom,mdss-dsi-display-timings {
 		timing@0 {
 			qcom,mdss-dsi-panel-phy-timings = [00 10 04 04 12 11 04
@@ -109,6 +110,7 @@
 
 &dsi_r66451_amoled_60hz_cmd {
 	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
+	qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";
 	qcom,dsi-dyn-clk-enable;
 	qcom,dsi-dyn-clk-list =
 		<327096550 325733640 328459448>;
diff --git a/display/shima-sde-display-idp.dtsi b/display/shima-sde-display-idp.dtsi
index 9b5ef968a80a..5bbc92e9c622 100644
--- a/display/shima-sde-display-idp.dtsi
+++ b/display/shima-sde-display-idp.dtsi
@@ -12,23 +12,29 @@
 
 &dsi_r66451_amoled_60hz_video {
 	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
 	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
 	qcom,mdss-dsi-bl-min-level = <1>;
 	qcom,mdss-dsi-bl-max-level = <4095>;
 	qcom,mdss-brightness-max-level = <255>;
 	qcom,mdss-dsi-bl-inverted-dbv;
 	qcom,platform-reset-gpio = <&tlmm 24 0>;
+	qcom,platform-sec-reset-gpio = <&tlmm 25 0>;
 };
 
 &dsi_r66451_amoled_60hz_cmd {
 	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
 	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
 	qcom,mdss-dsi-bl-min-level = <1>;
 	qcom,mdss-dsi-bl-max-level = <4095>;
 	qcom,mdss-brightness-max-level = <255>;
 	qcom,mdss-dsi-bl-inverted-dbv;
 	qcom,platform-te-gpio = <&tlmm 82 0>;
 	qcom,platform-reset-gpio = <&tlmm 24 0>;
+	qcom,platform-sec-reset-gpio = <&tlmm 25 0>;
 };
 
 &dsi_r66451_amoled_cmd {