Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

This commit is contained in:
David Woodhouse 2007-10-13 14:58:23 +01:00
commit ebf8889bd1
4422 changed files with 315047 additions and 98479 deletions

View file

@ -214,7 +214,7 @@ extern struct ArcProto *arc_proto_map[256], *arc_proto_default,
*/
struct Incoming {
struct sk_buff *skb; /* packet data buffer */
uint16_t sequence; /* sequence number of assembly */
__be16 sequence; /* sequence number of assembly */
uint8_t lastpacket, /* number of last packet (from 1) */
numpackets; /* number of packets in split */
};
@ -292,7 +292,7 @@ struct arcnet_local {
struct {
uint16_t sequence; /* sequence number (incs with each packet) */
uint16_t aborted_seq;
__be16 aborted_seq;
struct Incoming incoming[256]; /* one from each address */
} rfc1201;

View file

@ -230,6 +230,12 @@ enum {
SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
/* SETFEATURE Sector counts for SATA features */
SATA_AN = 0x05, /* Asynchronous Notification */
/* ATAPI stuff */
ATAPI_PKT_DMA = (1 << 0),
ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
@ -281,6 +287,15 @@ enum {
SERR_PROTOCOL = (1 << 10), /* protocol violation */
SERR_INTERNAL = (1 << 11), /* host internal error */
SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
SERR_COMM_WAKE = (1 << 18), /* Comm wake */
SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
SERR_DISPARITY = (1 << 20), /* Disparity */
SERR_CRC = (1 << 21), /* CRC error */
SERR_HANDSHAKE = (1 << 22), /* Handshake error */
SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
SERR_DEV_XCHG = (1 << 26), /* device exchanged */
/* struct ata_taskfile flags */
@ -341,24 +356,17 @@ struct ata_taskfile {
};
#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
#define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6))
#define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5))
#define ata_id_hpa_enabled(id) ((id)[85] & (1 << 10))
#define ata_id_has_fua(id) ((id)[84] & (1 << 6))
#define ata_id_has_flush(id) ((id)[83] & (1 << 12))
#define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13))
#define ata_id_has_lba48(id) ((id)[83] & (1 << 10))
#define ata_id_has_hpa(id) ((id)[82] & (1 << 10))
#define ata_id_has_wcache(id) ((id)[82] & (1 << 5))
#define ata_id_has_pm(id) ((id)[82] & (1 << 3))
#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
#define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
#define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
#define ata_id_removeable(id) ((id)[0] & (1 << 7))
#define ata_id_has_dword_io(id) ((id)[50] & (1 << 0))
#define ata_id_has_dword_io(id) ((id)[48] & (1 << 0))
#define ata_id_has_atapi_AN(id) \
( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
((id)[78] & (1 << 5)) )
#define ata_id_iordy_disable(id) ((id)[49] & (1 << 10))
#define ata_id_has_iordy(id) ((id)[49] & (1 << 9))
#define ata_id_has_iordy(id) ((id)[49] & (1 << 11))
#define ata_id_u32(id,n) \
(((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
#define ata_id_u64(id,n) \
@ -369,6 +377,90 @@ struct ata_taskfile {
#define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20)
static inline int ata_id_has_fua(const u16 *id)
{
if ((id[84] & 0xC000) != 0x4000)
return 0;
return id[84] & (1 << 6);
}
static inline int ata_id_has_flush(const u16 *id)
{
if ((id[83] & 0xC000) != 0x4000)
return 0;
return id[83] & (1 << 12);
}
static inline int ata_id_has_flush_ext(const u16 *id)
{
if ((id[83] & 0xC000) != 0x4000)
return 0;
return id[83] & (1 << 13);
}
static inline int ata_id_has_lba48(const u16 *id)
{
if ((id[83] & 0xC000) != 0x4000)
return 0;
return id[83] & (1 << 10);
}
static inline int ata_id_hpa_enabled(const u16 *id)
{
/* Yes children, word 83 valid bits cover word 82 data */
if ((id[83] & 0xC000) != 0x4000)
return 0;
/* And 87 covers 85-87 */
if ((id[87] & 0xC000) != 0x4000)
return 0;
/* Check command sets enabled as well as supported */
if ((id[85] & ( 1 << 10)) == 0)
return 0;
return id[82] & (1 << 10);
}
static inline int ata_id_has_wcache(const u16 *id)
{
/* Yes children, word 83 valid bits cover word 82 data */
if ((id[83] & 0xC000) != 0x4000)
return 0;
return id[82] & (1 << 5);
}
static inline int ata_id_has_pm(const u16 *id)
{
if ((id[83] & 0xC000) != 0x4000)
return 0;
return id[82] & (1 << 3);
}
static inline int ata_id_rahead_enabled(const u16 *id)
{
if ((id[87] & 0xC000) != 0x4000)
return 0;
return id[85] & (1 << 6);
}
static inline int ata_id_wcache_enabled(const u16 *id)
{
if ((id[87] & 0xC000) != 0x4000)
return 0;
return id[85] & (1 << 5);
}
/**
* ata_id_major_version - get ATA level of drive
* @id: Identify data
*
* Caveats:
* ATA-1 considers identify optional
* ATA-2 introduces mandatory identify
* ATA-3 introduces word 80 and accurate reporting
*
* The practical impact of this is that ata_id_major_version cannot
* reliably report on drives below ATA3.
*/
static inline unsigned int ata_id_major_version(const u16 *id)
{
unsigned int mver;

View file

@ -108,10 +108,11 @@
#define AUDIT_MAC_CIPSOV4_DEL 1408 /* NetLabel: del CIPSOv4 DOI entry */
#define AUDIT_MAC_MAP_ADD 1409 /* NetLabel: add LSM domain mapping */
#define AUDIT_MAC_MAP_DEL 1410 /* NetLabel: del LSM domain mapping */
#define AUDIT_MAC_IPSEC_ADDSA 1411 /* Add a XFRM state */
#define AUDIT_MAC_IPSEC_DELSA 1412 /* Delete a XFRM state */
#define AUDIT_MAC_IPSEC_ADDSPD 1413 /* Add a XFRM policy */
#define AUDIT_MAC_IPSEC_DELSPD 1414 /* Delete a XFRM policy */
#define AUDIT_MAC_IPSEC_ADDSA 1411 /* Not used */
#define AUDIT_MAC_IPSEC_DELSA 1412 /* Not used */
#define AUDIT_MAC_IPSEC_ADDSPD 1413 /* Not used */
#define AUDIT_MAC_IPSEC_DELSPD 1414 /* Not used */
#define AUDIT_MAC_IPSEC_EVENT 1415 /* Audit an IPSec event */
#define AUDIT_FIRST_KERN_ANOM_MSG 1700
#define AUDIT_LAST_KERN_ANOM_MSG 1799

View file

@ -92,4 +92,13 @@ static inline void * bl_get_data(struct backlight_device *bl_dev)
return dev_get_drvdata(&bl_dev->dev);
}
struct generic_bl_info {
const char *name;
int max_intensity;
int default_intensity;
int limit_mask;
void (*set_bl_intensity)(int intensity);
void (*kick_battery)(void);
};
#endif

View file

@ -64,7 +64,7 @@ struct bio_vec {
struct bio_set;
struct bio;
typedef int (bio_end_io_t) (struct bio *, unsigned int, int);
typedef void (bio_end_io_t) (struct bio *, int);
typedef void (bio_destructor_t) (struct bio *);
/*
@ -226,7 +226,7 @@ struct bio {
#define BIO_SEG_BOUNDARY(q, b1, b2) \
BIOVEC_SEG_BOUNDARY((q), __BVEC_END((b1)), __BVEC_START((b2)))
#define bio_io_error(bio, bytes) bio_endio((bio), (bytes), -EIO)
#define bio_io_error(bio) bio_endio((bio), -EIO)
/*
* drivers should not use the __ version unless they _really_ want to
@ -286,7 +286,7 @@ extern struct bio *bio_alloc_bioset(gfp_t, int, struct bio_set *);
extern void bio_put(struct bio *);
extern void bio_free(struct bio *, struct bio_set *);
extern void bio_endio(struct bio *, unsigned int, int);
extern void bio_endio(struct bio *, int);
struct request_queue;
extern int bio_phys_segments(struct request_queue *, struct bio *);
extern int bio_hw_segments(struct request_queue *, struct bio *);

View file

@ -1,6 +1,8 @@
#ifndef _LINUX_BLKDEV_H
#define _LINUX_BLKDEV_H
#ifdef CONFIG_BLOCK
#include <linux/sched.h>
#include <linux/major.h>
#include <linux/genhd.h>
@ -18,22 +20,6 @@
#include <asm/scatterlist.h>
#ifdef CONFIG_LBD
# include <asm/div64.h>
# define sector_div(a, b) do_div(a, b)
#else
# define sector_div(n, b)( \
{ \
int _res; \
_res = (n) % (b); \
(n) /= (b); \
_res; \
} \
)
#endif
#ifdef CONFIG_BLOCK
struct scsi_ioctl_command;
struct request_queue;
@ -471,7 +457,6 @@ struct request_queue
int orderr, ordcolor;
struct request pre_flush_rq, bar_rq, post_flush_rq;
struct request *orig_bar_rq;
unsigned int bi_size;
struct mutex sysfs_lock;
@ -637,10 +622,23 @@ static inline void blk_queue_bounce(struct request_queue *q, struct bio **bio)
}
#endif /* CONFIG_MMU */
#define rq_for_each_bio(_bio, rq) \
struct req_iterator {
int i;
struct bio *bio;
};
/* This should not be used directly - use rq_for_each_segment */
#define __rq_for_each_bio(_bio, rq) \
if ((rq->bio)) \
for (_bio = (rq)->bio; _bio; _bio = _bio->bi_next)
#define rq_for_each_segment(bvl, _rq, _iter) \
__rq_for_each_bio(_iter.bio, _rq) \
bio_for_each_segment(bvl, _iter.bio, _iter.i)
#define rq_iter_last(rq, _iter) \
(_iter.bio->bi_next == NULL && _iter.i == _iter.bio->bi_vcnt-1)
extern int blk_register_queue(struct gendisk *disk);
extern void blk_unregister_queue(struct gendisk *disk);
extern void register_disk(struct gendisk *dev);
@ -662,8 +660,8 @@ extern int sg_scsi_ioctl(struct file *, struct request_queue *,
/*
* Temporary export, until SCSI gets fixed up.
*/
extern int ll_back_merge_fn(struct request_queue *, struct request *,
struct bio *);
extern int blk_rq_append_bio(struct request_queue *q, struct request *rq,
struct bio *bio);
/*
* A queue has just exitted congestion. Note this in the global counter of
@ -810,7 +808,6 @@ static inline struct request *blk_map_queue_find_tag(struct blk_queue_tag *bqt,
return bqt->tag_index[tag];
}
extern void blk_rq_bio_prep(struct request_queue *, struct request *, struct bio *);
extern int blkdev_issue_flush(struct block_device *, sector_t *);
#define MAX_PHYS_SEGMENTS 128

View file

@ -142,10 +142,14 @@ struct blk_user_trace_setup {
u32 pid;
};
#ifdef __KERNEL__
#if defined(CONFIG_BLK_DEV_IO_TRACE)
extern int blk_trace_ioctl(struct block_device *, unsigned, char __user *);
extern void blk_trace_shutdown(struct request_queue *);
extern void __blk_add_trace(struct blk_trace *, sector_t, int, int, u32, int, int, void *);
extern int do_blk_trace_setup(struct request_queue *q,
struct block_device *bdev, struct blk_user_trace_setup *buts);
/**
* blk_add_trace_rq - Add a trace for a request oriented action
@ -286,6 +290,7 @@ static inline void blk_add_trace_remap(struct request_queue *q, struct bio *bio,
#define blk_add_trace_generic(q, rq, rw, what) do { } while (0)
#define blk_add_trace_pdu_int(q, what, bio, pdu) do { } while (0)
#define blk_add_trace_remap(q, bio, dev, f, t) do {} while (0)
#define do_blk_trace_setup(q, bdev, buts) (-ENOTTY)
#endif /* CONFIG_BLK_DEV_IO_TRACE */
#endif /* __KERNEL__ */
#endif

View file

@ -8,7 +8,7 @@
#ifndef _LINUX_CLOCKCHIPS_H
#define _LINUX_CLOCKCHIPS_H
#ifdef CONFIG_GENERIC_CLOCKEVENTS
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BUILD
#include <linux/clocksource.h>
#include <linux/cpumask.h>
@ -126,11 +126,14 @@ extern int clockevents_register_notifier(struct notifier_block *nb);
extern int clockevents_program_event(struct clock_event_device *dev,
ktime_t expires, ktime_t now);
#ifdef CONFIG_GENERIC_CLOCKEVENTS
extern void clockevents_notify(unsigned long reason, void *arg);
#else
# define clockevents_notify(reason, arg) do { } while (0)
#endif
#else /* CONFIG_GENERIC_CLOCKEVENTS_BUILD */
static inline void clockevents_resume_events(void) { }
#define clockevents_notify(reason, arg) do { } while (0)
#endif

View file

@ -153,7 +153,7 @@ struct cn_dev {
u32 seq, groups;
struct sock *nls;
void (*input) (struct sock * sk, int len);
void (*input) (struct sk_buff *skb);
struct cn_queue_dev *cbdev;
};

View file

@ -32,12 +32,24 @@
* CPUFREQ NOTIFIER INTERFACE *
*********************************************************************/
int cpufreq_register_notifier(struct notifier_block *nb, unsigned int list);
int cpufreq_unregister_notifier(struct notifier_block *nb, unsigned int list);
#define CPUFREQ_TRANSITION_NOTIFIER (0)
#define CPUFREQ_POLICY_NOTIFIER (1)
#ifdef CONFIG_CPU_FREQ
int cpufreq_register_notifier(struct notifier_block *nb, unsigned int list);
int cpufreq_unregister_notifier(struct notifier_block *nb, unsigned int list);
#else /* CONFIG_CPU_FREQ */
static inline int cpufreq_register_notifier(struct notifier_block *nb,
unsigned int list)
{
return 0;
}
static inline int cpufreq_unregister_notifier(struct notifier_block *nb,
unsigned int list)
{
return 0;
}
#endif /* CONFIG_CPU_FREQ */
/* if (cpufreq_driver->target) exists, the ->governor decides what frequency
* within the limits is used. If (cpufreq_driver->setpolicy> exists, these
@ -155,6 +167,9 @@ struct cpufreq_governor {
char name[CPUFREQ_NAME_LEN];
int (*governor) (struct cpufreq_policy *policy,
unsigned int event);
unsigned int max_transition_latency; /* HW must be able to switch to
next freq faster than this value in nano secs or we
will fallback to performance governor */
struct list_head governor_list;
struct module *owner;
};
@ -279,12 +294,24 @@ static inline unsigned int cpufreq_quick_get(unsigned int cpu)
*********************************************************************/
#ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
/*
Performance governor is fallback governor if any other gov failed to
auto load due latency restrictions
*/
#ifdef CONFIG_CPU_FREQ_GOV_PERFORMANCE
extern struct cpufreq_governor cpufreq_gov_performance;
#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_performance
#endif
#ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
#define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_performance)
#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE)
extern struct cpufreq_governor cpufreq_gov_userspace;
#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_userspace
#define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_userspace)
#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND)
extern struct cpufreq_governor cpufreq_gov_ondemand;
#define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_ondemand)
#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE)
extern struct cpufreq_governor cpufreq_gov_conservative;
#define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_conservative)
#endif

View file

@ -34,6 +34,7 @@
#define CRYPTO_ALG_TYPE_HASH 0x00000003
#define CRYPTO_ALG_TYPE_BLKCIPHER 0x00000004
#define CRYPTO_ALG_TYPE_COMPRESS 0x00000005
#define CRYPTO_ALG_TYPE_AEAD 0x00000006
#define CRYPTO_ALG_TYPE_HASH_MASK 0x0000000e
@ -91,9 +92,9 @@
struct scatterlist;
struct crypto_ablkcipher;
struct crypto_async_request;
struct crypto_aead;
struct crypto_blkcipher;
struct crypto_hash;
struct crypto_queue;
struct crypto_tfm;
struct crypto_type;
@ -121,6 +122,32 @@ struct ablkcipher_request {
void *__ctx[] CRYPTO_MINALIGN_ATTR;
};
/**
* struct aead_request - AEAD request
* @base: Common attributes for async crypto requests
* @assoclen: Length in bytes of associated data for authentication
* @cryptlen: Length of data to be encrypted or decrypted
* @iv: Initialisation vector
* @assoc: Associated data
* @src: Source data
* @dst: Destination data
* @__ctx: Start of private context data
*/
struct aead_request {
struct crypto_async_request base;
unsigned int assoclen;
unsigned int cryptlen;
u8 *iv;
struct scatterlist *assoc;
struct scatterlist *src;
struct scatterlist *dst;
void *__ctx[] CRYPTO_MINALIGN_ATTR;
};
struct blkcipher_desc {
struct crypto_blkcipher *tfm;
void *info;
@ -150,13 +177,21 @@ struct ablkcipher_alg {
int (*encrypt)(struct ablkcipher_request *req);
int (*decrypt)(struct ablkcipher_request *req);
struct crypto_queue *queue;
unsigned int min_keysize;
unsigned int max_keysize;
unsigned int ivsize;
};
struct aead_alg {
int (*setkey)(struct crypto_aead *tfm, const u8 *key,
unsigned int keylen);
int (*encrypt)(struct aead_request *req);
int (*decrypt)(struct aead_request *req);
unsigned int ivsize;
unsigned int authsize;
};
struct blkcipher_alg {
int (*setkey)(struct crypto_tfm *tfm, const u8 *key,
unsigned int keylen);
@ -212,6 +247,7 @@ struct compress_alg {
};
#define cra_ablkcipher cra_u.ablkcipher
#define cra_aead cra_u.aead
#define cra_blkcipher cra_u.blkcipher
#define cra_cipher cra_u.cipher
#define cra_digest cra_u.digest
@ -237,6 +273,7 @@ struct crypto_alg {
union {
struct ablkcipher_alg ablkcipher;
struct aead_alg aead;
struct blkcipher_alg blkcipher;
struct cipher_alg cipher;
struct digest_alg digest;
@ -284,6 +321,16 @@ struct ablkcipher_tfm {
unsigned int reqsize;
};
struct aead_tfm {
int (*setkey)(struct crypto_aead *tfm, const u8 *key,
unsigned int keylen);
int (*encrypt)(struct aead_request *req);
int (*decrypt)(struct aead_request *req);
unsigned int ivsize;
unsigned int authsize;
unsigned int reqsize;
};
struct blkcipher_tfm {
void *iv;
int (*setkey)(struct crypto_tfm *tfm, const u8 *key,
@ -323,6 +370,7 @@ struct compress_tfm {
};
#define crt_ablkcipher crt_u.ablkcipher
#define crt_aead crt_u.aead
#define crt_blkcipher crt_u.blkcipher
#define crt_cipher crt_u.cipher
#define crt_hash crt_u.hash
@ -334,6 +382,7 @@ struct crypto_tfm {
union {
struct ablkcipher_tfm ablkcipher;
struct aead_tfm aead;
struct blkcipher_tfm blkcipher;
struct cipher_tfm cipher;
struct hash_tfm hash;
@ -349,6 +398,10 @@ struct crypto_ablkcipher {
struct crypto_tfm base;
};
struct crypto_aead {
struct crypto_tfm base;
};
struct crypto_blkcipher {
struct crypto_tfm base;
};
@ -369,11 +422,15 @@ enum {
CRYPTOA_UNSPEC,
CRYPTOA_ALG,
CRYPTOA_TYPE,
CRYPTOA_U32,
__CRYPTOA_MAX,
};
#define CRYPTOA_MAX (__CRYPTOA_MAX - 1)
/* Maximum number of (rtattr) parameters for each template. */
#define CRYPTO_MAX_ATTRS 32
struct crypto_attr_alg {
char name[CRYPTO_MAX_ALG_NAME];
};
@ -383,6 +440,10 @@ struct crypto_attr_type {
u32 mask;
};
struct crypto_attr_u32 {
u32 num;
};
/*
* Transform user interface.
*/
@ -563,7 +624,8 @@ static inline int crypto_ablkcipher_decrypt(struct ablkcipher_request *req)
return crt->decrypt(req);
}
static inline int crypto_ablkcipher_reqsize(struct crypto_ablkcipher *tfm)
static inline unsigned int crypto_ablkcipher_reqsize(
struct crypto_ablkcipher *tfm)
{
return crypto_ablkcipher_crt(tfm)->reqsize;
}
@ -619,6 +681,150 @@ static inline void ablkcipher_request_set_crypt(
req->info = iv;
}
static inline struct crypto_aead *__crypto_aead_cast(struct crypto_tfm *tfm)
{
return (struct crypto_aead *)tfm;
}
static inline struct crypto_aead *crypto_alloc_aead(const char *alg_name,
u32 type, u32 mask)
{
type &= ~CRYPTO_ALG_TYPE_MASK;
type |= CRYPTO_ALG_TYPE_AEAD;
mask |= CRYPTO_ALG_TYPE_MASK;
return __crypto_aead_cast(crypto_alloc_base(alg_name, type, mask));
}
static inline struct crypto_tfm *crypto_aead_tfm(struct crypto_aead *tfm)
{
return &tfm->base;
}
static inline void crypto_free_aead(struct crypto_aead *tfm)
{
crypto_free_tfm(crypto_aead_tfm(tfm));
}
static inline struct aead_tfm *crypto_aead_crt(struct crypto_aead *tfm)
{
return &crypto_aead_tfm(tfm)->crt_aead;
}
static inline unsigned int crypto_aead_ivsize(struct crypto_aead *tfm)
{
return crypto_aead_crt(tfm)->ivsize;
}
static inline unsigned int crypto_aead_authsize(struct crypto_aead *tfm)
{
return crypto_aead_crt(tfm)->authsize;
}
static inline unsigned int crypto_aead_blocksize(struct crypto_aead *tfm)
{
return crypto_tfm_alg_blocksize(crypto_aead_tfm(tfm));
}
static inline unsigned int crypto_aead_alignmask(struct crypto_aead *tfm)
{
return crypto_tfm_alg_alignmask(crypto_aead_tfm(tfm));
}
static inline u32 crypto_aead_get_flags(struct crypto_aead *tfm)
{
return crypto_tfm_get_flags(crypto_aead_tfm(tfm));
}
static inline void crypto_aead_set_flags(struct crypto_aead *tfm, u32 flags)
{
crypto_tfm_set_flags(crypto_aead_tfm(tfm), flags);
}
static inline void crypto_aead_clear_flags(struct crypto_aead *tfm, u32 flags)
{
crypto_tfm_clear_flags(crypto_aead_tfm(tfm), flags);
}
static inline int crypto_aead_setkey(struct crypto_aead *tfm, const u8 *key,
unsigned int keylen)
{
return crypto_aead_crt(tfm)->setkey(tfm, key, keylen);
}
static inline struct crypto_aead *crypto_aead_reqtfm(struct aead_request *req)
{
return __crypto_aead_cast(req->base.tfm);
}
static inline int crypto_aead_encrypt(struct aead_request *req)
{
return crypto_aead_crt(crypto_aead_reqtfm(req))->encrypt(req);
}
static inline int crypto_aead_decrypt(struct aead_request *req)
{
return crypto_aead_crt(crypto_aead_reqtfm(req))->decrypt(req);
}
static inline unsigned int crypto_aead_reqsize(struct crypto_aead *tfm)
{
return crypto_aead_crt(tfm)->reqsize;
}
static inline void aead_request_set_tfm(struct aead_request *req,
struct crypto_aead *tfm)
{
req->base.tfm = crypto_aead_tfm(tfm);
}
static inline struct aead_request *aead_request_alloc(struct crypto_aead *tfm,
gfp_t gfp)
{
struct aead_request *req;
req = kmalloc(sizeof(*req) + crypto_aead_reqsize(tfm), gfp);
if (likely(req))
aead_request_set_tfm(req, tfm);
return req;
}
static inline void aead_request_free(struct aead_request *req)
{
kfree(req);
}
static inline void aead_request_set_callback(struct aead_request *req,
u32 flags,
crypto_completion_t complete,
void *data)
{
req->base.complete = complete;
req->base.data = data;
req->base.flags = flags;
}
static inline void aead_request_set_crypt(struct aead_request *req,
struct scatterlist *src,
struct scatterlist *dst,
unsigned int cryptlen, u8 *iv)
{
req->src = src;
req->dst = dst;
req->cryptlen = cryptlen;
req->iv = iv;
}
static inline void aead_request_set_assoc(struct aead_request *req,
struct scatterlist *assoc,
unsigned int assoclen)
{
req->assoc = assoc;
req->assoclen = assoclen;
}
static inline struct crypto_blkcipher *__crypto_blkcipher_cast(
struct crypto_tfm *tfm)
{

View file

@ -56,10 +56,9 @@ struct dccp_hdr_ext {
};
/**
* struct dccp_hdr_request - Conection initiation request header
* struct dccp_hdr_request - Connection initiation request header
*
* @dccph_req_service - Service to which the client app wants to connect
* @dccph_req_options - list of options (must be a multiple of 32 bits
*/
struct dccp_hdr_request {
__be32 dccph_req_service;
@ -76,12 +75,10 @@ struct dccp_hdr_ack_bits {
__be32 dccph_ack_nr_low;
};
/**
* struct dccp_hdr_response - Conection initiation response header
* struct dccp_hdr_response - Connection initiation response header
*
* @dccph_resp_ack_nr_high - 48 bit ack number high order bits, contains GSR
* @dccph_resp_ack_nr_low - 48 bit ack number low order bits, contains GSR
* @dccph_resp_ack - 48 bit Acknowledgment Number Subheader (5.3)
* @dccph_resp_service - Echoes the Service Code on a received DCCP-Request
* @dccph_resp_options - list of options (must be a multiple of 32 bits
*/
struct dccp_hdr_response {
struct dccp_hdr_ack_bits dccph_resp_ack;
@ -91,8 +88,9 @@ struct dccp_hdr_response {
/**
* struct dccp_hdr_reset - Unconditionally shut down a connection
*
* @dccph_reset_service - Echoes the Service Code on a received DCCP-Request
* @dccph_reset_options - list of options (must be a multiple of 32 bits
* @dccph_reset_ack - 48 bit Acknowledgment Number Subheader (5.6)
* @dccph_reset_code - one of %dccp_reset_codes
* @dccph_reset_data - the Data 1 ... Data 3 fields from 5.6
*/
struct dccp_hdr_reset {
struct dccp_hdr_ack_bits dccph_reset_ack;
@ -204,6 +202,7 @@ struct dccp_so_feat {
#define DCCP_SOCKOPT_SERVICE 2
#define DCCP_SOCKOPT_CHANGE_L 3
#define DCCP_SOCKOPT_CHANGE_R 4
#define DCCP_SOCKOPT_GET_CUR_MPS 5
#define DCCP_SOCKOPT_SEND_CSCOV 10
#define DCCP_SOCKOPT_RECV_CSCOV 11
#define DCCP_SOCKOPT_CCID_RX_INFO 128
@ -215,6 +214,7 @@ struct dccp_so_feat {
#ifdef __KERNEL__
#include <linux/in.h>
#include <linux/ktime.h>
#include <linux/list.h>
#include <linux/uio.h>
#include <linux/workqueue.h>
@ -391,7 +391,6 @@ struct dccp_opt_pend {
struct dccp_opt_conf *dccpop_sc;
};
extern void __dccp_minisock_init(struct dccp_minisock *dmsk);
extern void dccp_minisock_init(struct dccp_minisock *dmsk);
extern int dccp_parse_options(struct sock *sk, struct sk_buff *skb);
@ -471,6 +470,7 @@ struct dccp_ackvec;
* @dccps_pcrlen - receiver partial checksum coverage (via sockopt)
* @dccps_ndp_count - number of Non Data Packets since last data packet
* @dccps_mss_cache - current value of MSS (path MTU minus header sizes)
* @dccps_rate_last - timestamp for rate-limiting DCCP-Sync (RFC 4340, 7.5.4)
* @dccps_minisock - associated minisock (accessed via dccp_msk)
* @dccps_hc_rx_ackvec - rx half connection ack vector
* @dccps_hc_rx_ccid - CCID used for the receiver (or receiving half-connection)
@ -498,7 +498,7 @@ struct dccp_sock {
__u64 dccps_gar;
__be32 dccps_service;
struct dccp_service_list *dccps_service_list;
struct timeval dccps_timestamp_time;
ktime_t dccps_timestamp_time;
__u32 dccps_timestamp_echo;
__u16 dccps_l_ack_ratio;
__u16 dccps_r_ack_ratio;
@ -506,12 +506,12 @@ struct dccp_sock {
__u16 dccps_pcrlen;
unsigned long dccps_ndp_count;
__u32 dccps_mss_cache;
unsigned long dccps_rate_last;
struct dccp_minisock dccps_minisock;
struct dccp_ackvec *dccps_hc_rx_ackvec;
struct ccid *dccps_hc_rx_ccid;
struct ccid *dccps_hc_tx_ccid;
struct dccp_options_received dccps_options_received;
struct timeval dccps_epoch;
enum dccp_role dccps_role:2;
__u8 dccps_hc_rx_insert_options:1;
__u8 dccps_hc_tx_insert_options:1;

View file

@ -49,6 +49,12 @@ struct dentry *debugfs_create_u32(const char *name, mode_t mode,
struct dentry *parent, u32 *value);
struct dentry *debugfs_create_u64(const char *name, mode_t mode,
struct dentry *parent, u64 *value);
struct dentry *debugfs_create_x8(const char *name, mode_t mode,
struct dentry *parent, u8 *value);
struct dentry *debugfs_create_x16(const char *name, mode_t mode,
struct dentry *parent, u16 *value);
struct dentry *debugfs_create_x32(const char *name, mode_t mode,
struct dentry *parent, u32 *value);
struct dentry *debugfs_create_bool(const char *name, mode_t mode,
struct dentry *parent, u32 *value);
@ -122,6 +128,27 @@ static inline struct dentry *debugfs_create_u64(const char *name, mode_t mode,
return ERR_PTR(-ENODEV);
}
static inline struct dentry *debugfs_create_x8(const char *name, mode_t mode,
struct dentry *parent,
u8 *value)
{
return ERR_PTR(-ENODEV);
}
static inline struct dentry *debugfs_create_x16(const char *name, mode_t mode,
struct dentry *parent,
u16 *value)
{
return ERR_PTR(-ENODEV);
}
static inline struct dentry *debugfs_create_x32(const char *name, mode_t mode,
struct dentry *parent,
u32 *value)
{
return ERR_PTR(-ENODEV);
}
static inline struct dentry *debugfs_create_bool(const char *name, mode_t mode,
struct dentry *parent,
u32 *value)

View file

@ -64,12 +64,9 @@ struct bus_type {
struct bus_attribute * bus_attrs;
struct device_attribute * dev_attrs;
struct driver_attribute * drv_attrs;
struct bus_attribute drivers_autoprobe_attr;
struct bus_attribute drivers_probe_attr;
int (*match)(struct device * dev, struct device_driver * drv);
int (*uevent)(struct device *dev, char **envp,
int num_envp, char *buffer, int buffer_size);
int (*uevent)(struct device *dev, struct kobj_uevent_env *env);
int (*probe)(struct device * dev);
int (*remove)(struct device * dev);
void (*shutdown)(struct device * dev);
@ -189,10 +186,8 @@ struct class {
struct class_device_attribute * class_dev_attrs;
struct device_attribute * dev_attrs;
int (*uevent)(struct class_device *dev, char **envp,
int num_envp, char *buffer, int buffer_size);
int (*dev_uevent)(struct device *dev, char **envp, int num_envp,
char *buffer, int buffer_size);
int (*uevent)(struct class_device *dev, struct kobj_uevent_env *env);
int (*dev_uevent)(struct device *dev, struct kobj_uevent_env *env);
void (*release)(struct class_device *dev);
void (*class_release)(struct class *class);
@ -268,8 +263,7 @@ struct class_device {
struct attribute_group ** groups; /* optional groups */
void (*release)(struct class_device *dev);
int (*uevent)(struct class_device *dev, char **envp,
int num_envp, char *buffer, int buffer_size);
int (*uevent)(struct class_device *dev, struct kobj_uevent_env *env);
char class_id[BUS_ID_SIZE]; /* unique to this class */
};
@ -337,8 +331,7 @@ extern void class_device_destroy(struct class *cls, dev_t devt);
struct device_type {
const char *name;
struct attribute_group **groups;
int (*uevent)(struct device *dev, char **envp, int num_envp,
char *buffer, int buffer_size);
int (*uevent)(struct device *dev, struct kobj_uevent_env *env);
void (*release)(struct device *dev);
int (*suspend)(struct device * dev, pm_message_t state);
int (*resume)(struct device * dev);

View file

@ -54,7 +54,7 @@ struct dmi_strmatch {
};
struct dmi_system_id {
int (*callback)(struct dmi_system_id *);
int (*callback)(const struct dmi_system_id *);
const char *ident;
struct dmi_strmatch matches[4];
void *driver_data;
@ -71,22 +71,22 @@ struct dmi_device {
#ifdef CONFIG_DMI
extern int dmi_check_system(struct dmi_system_id *list);
extern char * dmi_get_system_info(int field);
extern struct dmi_device * dmi_find_device(int type, const char *name,
struct dmi_device *from);
extern int dmi_check_system(const struct dmi_system_id *list);
extern const char * dmi_get_system_info(int field);
extern const struct dmi_device * dmi_find_device(int type, const char *name,
const struct dmi_device *from);
extern void dmi_scan_machine(void);
extern int dmi_get_year(int field);
extern int dmi_name_in_vendors(char *str);
extern int dmi_name_in_vendors(const char *str);
#else
static inline int dmi_check_system(struct dmi_system_id *list) { return 0; }
static inline char * dmi_get_system_info(int field) { return NULL; }
static inline struct dmi_device * dmi_find_device(int type, const char *name,
struct dmi_device *from) { return NULL; }
static inline int dmi_check_system(const struct dmi_system_id *list) { return 0; }
static inline const char * dmi_get_system_info(int field) { return NULL; }
static inline const struct dmi_device * dmi_find_device(int type, const char *name,
const struct dmi_device *from) { return NULL; }
static inline int dmi_get_year(int year) { return 0; }
static inline int dmi_name_in_vendors(char *s) { return 0; }
static inline int dmi_name_in_vendors(const char *s) { return 0; }
#endif

View file

@ -21,13 +21,14 @@
/*
Module: eeprom_93cx6
Abstract: EEPROM reader datastructures for 93cx6 chipsets.
Supported chipsets: 93c46 & 93c66.
Supported chipsets: 93c46, 93c56 and 93c66.
*/
/*
* EEPROM operation defines.
*/
#define PCI_EEPROM_WIDTH_93C46 6
#define PCI_EEPROM_WIDTH_93C56 8
#define PCI_EEPROM_WIDTH_93C66 8
#define PCI_EEPROM_WIDTH_OPCODE 3
#define PCI_EEPROM_WRITE_OPCODE 0x05

View file

@ -389,12 +389,14 @@ extern Elf64_Dyn _DYNAMIC [];
#endif
/* Optional callbacks to write extra ELF notes. */
#ifndef ARCH_HAVE_EXTRA_ELF_NOTES
static inline int arch_notes_size(void) { return 0; }
static inline void arch_write_notes(struct file *file) { }
#define ELF_CORE_EXTRA_NOTES_SIZE arch_notes_size()
#define ELF_CORE_WRITE_EXTRA_NOTES arch_write_notes(file)
#endif /* ARCH_HAVE_EXTRA_ELF_NOTES */
static inline int elf_coredump_extra_notes_size(void) { return 0; }
static inline int elf_coredump_extra_notes_write(struct file *file,
loff_t *foffset) { return 0; }
#else
extern int elf_coredump_extra_notes_size(void);
extern int elf_coredump_extra_notes_write(struct file *file, loff_t *foffset);
#endif
#endif /* _LINUX_ELF_H */

View file

@ -29,15 +29,19 @@
#include <linux/random.h>
#ifdef __KERNEL__
extern int eth_header(struct sk_buff *skb, struct net_device *dev,
unsigned short type, void *daddr,
void *saddr, unsigned len);
extern int eth_rebuild_header(struct sk_buff *skb);
extern __be16 eth_type_trans(struct sk_buff *skb, struct net_device *dev);
extern void eth_header_cache_update(struct hh_cache *hh, struct net_device *dev,
unsigned char * haddr);
extern int eth_header_cache(struct neighbour *neigh,
struct hh_cache *hh);
extern const struct header_ops eth_header_ops;
extern int eth_header(struct sk_buff *skb, struct net_device *dev,
unsigned short type,
const void *daddr, const void *saddr, unsigned len);
extern int eth_rebuild_header(struct sk_buff *skb);
extern int eth_header_parse(const struct sk_buff *skb, unsigned char *haddr);
extern int eth_header_cache(const struct neighbour *neigh, struct hh_cache *hh);
extern void eth_header_cache_update(struct hh_cache *hh,
const struct net_device *dev,
const unsigned char *haddr);
extern struct net_device *alloc_etherdev_mq(int sizeof_priv, unsigned int queue_count);
#define alloc_etherdev(sizeof_priv) alloc_etherdev_mq(sizeof_priv, 1)

View file

@ -39,7 +39,8 @@ struct ethtool_drvinfo {
char bus_info[ETHTOOL_BUSINFO_LEN]; /* Bus info for this IF. */
/* For PCI devices, use pci_name(pci_dev). */
char reserved1[32];
char reserved2[16];
char reserved2[12];
__u32 n_priv_flags; /* number of flags valid in ETHTOOL_GPFLAGS */
__u32 n_stats; /* number of u64's from ETHTOOL_GSTATS */
__u32 testinfo_len;
__u32 eedump_len; /* Size of data from ETHTOOL_GEEPROM (bytes) */
@ -219,6 +220,7 @@ struct ethtool_pauseparam {
enum ethtool_stringset {
ETH_SS_TEST = 0,
ETH_SS_STATS,
ETH_SS_PRIV_FLAGS,
};
/* for passing string sets for data tagging */
@ -256,6 +258,19 @@ struct ethtool_perm_addr {
__u8 data[0];
};
/* boolean flags controlling per-interface behavior characteristics.
* When reading, the flag indicates whether or not a certain behavior
* is enabled/present. When writing, the flag indicates whether
* or not the driver should turn on (set) or off (clear) a behavior.
*
* Some behaviors may read-only (unconditionally absent or present).
* If such is the case, return EINVAL in the set-flags operation if the
* flag differs from the read-only value.
*/
enum ethtool_flags {
ETH_FLAG_LRO = (1 << 15), /* LRO is enabled */
};
#ifdef __KERNEL__
struct net_device;
@ -272,6 +287,8 @@ u32 ethtool_op_get_tso(struct net_device *dev);
int ethtool_op_set_tso(struct net_device *dev, u32 data);
u32 ethtool_op_get_ufo(struct net_device *dev);
int ethtool_op_set_ufo(struct net_device *dev, u32 data);
u32 ethtool_op_get_flags(struct net_device *dev);
int ethtool_op_set_flags(struct net_device *dev, u32 data);
/**
* &ethtool_ops - Alter and report network device settings
@ -307,6 +324,8 @@ int ethtool_op_set_ufo(struct net_device *dev, u32 data);
* get_strings: Return a set of strings that describe the requested objects
* phys_id: Identify the device
* get_stats: Return statistics about the device
* get_flags: get 32-bit flags bitmap
* set_flags: set 32-bit flags bitmap
*
* Description:
*
@ -359,16 +378,23 @@ struct ethtool_ops {
int (*set_sg)(struct net_device *, u32);
u32 (*get_tso)(struct net_device *);
int (*set_tso)(struct net_device *, u32);
int (*self_test_count)(struct net_device *);
void (*self_test)(struct net_device *, struct ethtool_test *, u64 *);
void (*get_strings)(struct net_device *, u32 stringset, u8 *);
int (*phys_id)(struct net_device *, u32);
int (*get_stats_count)(struct net_device *);
void (*get_ethtool_stats)(struct net_device *, struct ethtool_stats *, u64 *);
int (*begin)(struct net_device *);
void (*complete)(struct net_device *);
u32 (*get_ufo)(struct net_device *);
int (*set_ufo)(struct net_device *, u32);
u32 (*get_flags)(struct net_device *);
int (*set_flags)(struct net_device *, u32);
u32 (*get_priv_flags)(struct net_device *);
int (*set_priv_flags)(struct net_device *, u32);
int (*get_sset_count)(struct net_device *, int);
/* the following hooks are obsolete */
int (*self_test_count)(struct net_device *);/* use get_sset_count */
int (*get_stats_count)(struct net_device *);/* use get_sset_count */
};
#endif /* __KERNEL__ */
@ -410,6 +436,10 @@ struct ethtool_ops {
#define ETHTOOL_SUFO 0x00000022 /* Set UFO enable (ethtool_value) */
#define ETHTOOL_GGSO 0x00000023 /* Get GSO enable (ethtool_value) */
#define ETHTOOL_SGSO 0x00000024 /* Set GSO enable (ethtool_value) */
#define ETHTOOL_GFLAGS 0x00000025 /* Get flags bitmap(ethtool_value) */
#define ETHTOOL_SFLAGS 0x00000026 /* Set flags bitmap(ethtool_value) */
#define ETHTOOL_GPFLAGS 0x00000027 /* Get driver-private flags bitmap */
#define ETHTOOL_SPFLAGS 0x00000028 /* Set driver-private flags bitmap */
/* compatibility with older code */
#define SPARC_ETH_GSET ETHTOOL_GSET

View file

@ -16,6 +16,7 @@
#ifndef FS_ENET_PD_H
#define FS_ENET_PD_H
#include <linux/string.h>
#include <asm/types.h>
#define FS_ENET_NAME "fs_enet"
@ -119,6 +120,7 @@ struct fs_platform_info {
u32 cp_page; /* CPM page */
u32 cp_block; /* CPM sblock */
u32 cp_command; /* CPM page/sblock/mcn */
u32 clk_trx; /* some stuff for pins & mux configuration*/
u32 clk_rx;
@ -133,7 +135,11 @@ struct fs_platform_info {
u32 device_flags;
int phy_addr; /* the phy address (-1 no phy) */
#ifdef CONFIG_PPC_CPM_NEW_BINDING
char bus_id[16];
#else
const char* bus_id;
#endif
int phy_irq; /* the phy irq (if it exists) */
const struct fs_mii_bus_info *bus_info;

View file

@ -169,6 +169,33 @@ struct gfs2_rgrp {
__u8 rg_reserved[80]; /* Several fields from gfs1 now reserved */
};
/*
* quota linked list: user quotas and group quotas form two separate
* singly linked lists. ll_next stores uids or gids of next quotas in the
* linked list.
Given the uid/gid, how to calculate the quota file offsets for the corresponding
gfs2_quota structures on disk:
for user quotas, given uid,
offset = uid * sizeof(struct gfs2_quota);
for group quotas, given gid,
offset = (gid * sizeof(struct gfs2_quota)) + sizeof(struct gfs2_quota);
uid:0 gid:0 uid:12 gid:12 uid:17 gid:17 uid:5142 gid:5142
+-------+-------+ +-------+-------+ +-------+- - - -+ +- - - -+-------+
| valid | valid | :: | valid | valid | :: | valid | inval | :: | inval | valid |
+-------+-------+ +-------+-------+ +-------+- - - -+ +- - - -+-------+
next:12 next:12 next:17 next:5142 next:NULL next:NULL
| | | | |<-- user quota list |
\______|___________/ \______|___________/ group quota list -->|
| | |
\__________________/ \_______________________________________/
*/
/*
* quota structure
*/
@ -177,7 +204,8 @@ struct gfs2_quota {
__be64 qu_limit;
__be64 qu_warn;
__be64 qu_value;
__u8 qu_reserved[64];
__be32 qu_ll_next; /* location of next quota in list */
__u8 qu_reserved[60];
};
/*

View file

@ -119,6 +119,7 @@
#define I2C_DRIVERID_WM8750 90 /* Wolfson WM8750 audio codec */
#define I2C_DRIVERID_WM8753 91 /* Wolfson WM8753 audio codec */
#define I2C_DRIVERID_LM4857 92 /* LM4857 Audio Amplifier */
#define I2C_DRIVERID_VP27SMPX 93 /* Panasonic VP27s tuner internal MPX */
#define I2C_DRIVERID_I2CDEV 900
#define I2C_DRIVERID_ARP 902 /* SMBus ARP Client */
@ -196,6 +197,7 @@
#define I2C_HW_B_EM28XX 0x01001f /* em28xx video capture cards */
#define I2C_HW_B_CX2341X 0x010020 /* Conexant CX2341X MPEG encoder cards */
#define I2C_HW_B_INTELFB 0x010021 /* intel framebuffer driver */
#define I2C_HW_B_CX23885 0x010022 /* conexant 23885 based tv cards (bus1) */
/* --- PCF 8584 based algorithms */
#define I2C_HW_P_LP 0x020000 /* Parallel port interface */

View file

@ -634,7 +634,7 @@ typedef struct ide_drive_s {
unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
unsigned int cyl; /* "real" number of cyls */
unsigned int drive_data; /* use by tuneproc/selectproc */
unsigned int drive_data; /* used by set_pio_mode/selectproc */
unsigned int failures; /* current failure count */
unsigned int max_failures; /* maximum allowed failure count */
u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
@ -702,10 +702,10 @@ typedef struct hwif_s {
#if 0
ide_hwif_ops_t *hwifops;
#else
/* routine to tune PIO mode for drives */
void (*tuneproc)(ide_drive_t *, u8);
/* routine to set PIO mode for drives */
void (*set_pio_mode)(ide_drive_t *, const u8);
/* routine to retune DMA modes for drives */
int (*speedproc)(ide_drive_t *, u8);
int (*speedproc)(ide_drive_t *, const u8);
/* tweaks hardware to select drive */
void (*selectproc)(ide_drive_t *);
/* chipset polling based on hba specifics */
@ -723,6 +723,7 @@ typedef struct hwif_s {
/* driver soft-power interface */
int (*busproc)(ide_drive_t *, int);
#endif
u8 (*mdma_filter)(ide_drive_t *);
u8 (*udma_filter)(ide_drive_t *);
void (*ata_input_data)(ide_drive_t *, void *, u32);
@ -1255,6 +1256,12 @@ enum {
IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
/* don't use conservative PIO "downgrade" */
IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
/* use PIO8/9 for prefetch off/on */
IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
/* use PIO6/7 for fast-devsel off/on */
IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
/* use 100-102 and 200-202 PIO values to set DMA modes */
IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
};
typedef struct ide_pci_device_s {
@ -1295,7 +1302,14 @@ int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
#ifdef CONFIG_BLK_DEV_IDEDMA
int __ide_dma_bad_drive(ide_drive_t *);
int __ide_dma_good_drive(ide_drive_t *);
u8 ide_max_dma_mode(ide_drive_t *);
u8 ide_find_dma_mode(ide_drive_t *, u8);
static inline u8 ide_max_dma_mode(ide_drive_t *drive)
{
return ide_find_dma_mode(drive, XFER_UDMA_6);
}
int ide_tune_dma(ide_drive_t *);
void ide_dma_off(ide_drive_t *);
void ide_dma_verbose(ide_drive_t *);
@ -1321,6 +1335,7 @@ extern void ide_dma_timeout(ide_drive_t *);
#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
#else
static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
static inline int ide_tune_dma(ide_drive_t *drive) { return 0; }
static inline void ide_dma_off(ide_drive_t *drive) { ; }
@ -1337,11 +1352,13 @@ extern int ide_acpi_exec_tfs(ide_drive_t *drive);
extern void ide_acpi_get_timing(ide_hwif_t *hwif);
extern void ide_acpi_push_timing(ide_hwif_t *hwif);
extern void ide_acpi_init(ide_hwif_t *hwif);
extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
#else
static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
#endif
extern int ide_hwif_request_regions(ide_hwif_t *hwif);
@ -1367,7 +1384,6 @@ static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
}
/* ide-lib.c */
u8 ide_rate_filter(ide_drive_t *, u8);
extern char *ide_xfer_verbose(u8 xfer_rate);
extern void ide_toggle_bounce(ide_drive_t *drive, int on);
extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
@ -1404,6 +1420,12 @@ unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
extern const ide_pio_timings_t ide_pio_timings[6];
void ide_set_pio(ide_drive_t *, u8);
static inline void ide_set_max_pio(ide_drive_t *drive)
{
ide_set_pio(drive, 255);
}
extern spinlock_t ide_lock;
extern struct mutex ide_cfg_mtx;

View file

@ -16,6 +16,7 @@
#define IEEE80211_H
#include <linux/types.h>
#include <asm/byteorder.h>
#define FCS_LEN 4
@ -350,4 +351,64 @@ enum ieee80211_eid {
#define WLAN_MAX_KEY_LEN 32
/**
* ieee80211_get_SA - get pointer to SA
*
* Given an 802.11 frame, this function returns the offset
* to the source address (SA). It does not verify that the
* header is long enough to contain the address, and the
* header must be long enough to contain the frame control
* field.
*
* @hdr: the frame
*/
static inline u8 *ieee80211_get_SA(struct ieee80211_hdr *hdr)
{
u8 *raw = (u8 *) hdr;
u8 tofrom = (*(raw+1)) & 3; /* get the TODS and FROMDS bits */
switch (tofrom) {
case 2:
return hdr->addr3;
case 3:
return hdr->addr4;
}
return hdr->addr2;
}
/**
* ieee80211_get_DA - get pointer to DA
*
* Given an 802.11 frame, this function returns the offset
* to the destination address (DA). It does not verify that
* the header is long enough to contain the address, and the
* header must be long enough to contain the frame control
* field.
*
* @hdr: the frame
*/
static inline u8 *ieee80211_get_DA(struct ieee80211_hdr *hdr)
{
u8 *raw = (u8 *) hdr;
u8 to_ds = (*(raw+1)) & 1; /* get the TODS bit */
if (to_ds)
return hdr->addr3;
return hdr->addr1;
}
/**
* ieee80211_get_morefrag - determine whether the MOREFRAGS bit is set
*
* This function determines whether the "more fragments" bit is set
* in the frame.
*
* @hdr: the frame
*/
static inline int ieee80211_get_morefrag(struct ieee80211_hdr *hdr)
{
return (le16_to_cpu(hdr->frame_control) &
IEEE80211_FCTL_MOREFRAGS) != 0;
}
#endif /* IEEE80211_H */

View file

@ -59,7 +59,7 @@ struct arc_rfc1201
{
uint8_t proto; /* protocol ID field - varies */
uint8_t split_flag; /* for use with split packets */
uint16_t sequence; /* sequence number */
__be16 sequence; /* sequence number */
uint8_t payload[0]; /* space remaining in packet (504 bytes)*/
};
#define RFC1201_HDR_SIZE 4

View file

@ -104,7 +104,7 @@ struct __fdb_entry
#include <linux/netdevice.h>
extern void brioctl_set(int (*ioctl_hook)(unsigned int, void __user *));
extern void brioctl_set(int (*ioctl_hook)(struct net *, unsigned int, void __user *));
extern struct sk_buff *(*br_handle_frame_hook)(struct net_bridge_port *p,
struct sk_buff *skb);
extern int (*br_should_route_hook)(struct sk_buff **pskb);

View file

@ -58,7 +58,6 @@ typedef struct equalizer {
slave_queue_t queue;
int min_slaves;
int max_slaves;
struct net_device_stats stats;
struct timer_list timer;
} equalizer_t;

View file

@ -117,9 +117,19 @@ static inline struct ethhdr *eth_hdr(const struct sk_buff *skb)
return (struct ethhdr *)skb_mac_header(skb);
}
int eth_header_parse(const struct sk_buff *skb, unsigned char *haddr);
#ifdef CONFIG_SYSCTL
extern struct ctl_table ether_table[];
#endif
/*
* Display a 6 byte device address (MAC) in a readable format.
*/
#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
extern char *print_mac(char *buf, const u8 *addr);
#define DECLARE_MAC_BUF(var) char var[18] __maybe_unused
#endif
#endif /* _LINUX_IF_ETHER_H */

View file

@ -78,6 +78,7 @@ enum
IFLA_LINKMODE,
IFLA_LINKINFO,
#define IFLA_LINKINFO IFLA_LINKINFO
IFLA_NET_NS_PID,
__IFLA_MAX
};

View file

@ -40,7 +40,7 @@
/************************************************************************
* PPPoE addressing definition
*/
typedef __u16 sid_t;
typedef __be16 sid_t;
struct pppoe_addr{
sid_t sid; /* Session identifier */
unsigned char remote[ETH_ALEN]; /* Remote address */
@ -90,8 +90,8 @@ struct sockaddr_pppol2tp {
#define PADS_CODE 0x65
#define PADT_CODE 0xa7
struct pppoe_tag {
__u16 tag_type;
__u16 tag_len;
__be16 tag_type;
__be16 tag_len;
char tag_data[0];
} __attribute ((packed));
@ -118,8 +118,8 @@ struct pppoe_hdr {
#error "Please fix <asm/byteorder.h>"
#endif
__u8 code;
__u16 sid;
__u16 length;
__be16 sid;
__be16 length;
struct pppoe_tag tag[0];
} __attribute__ ((packed));
@ -152,7 +152,7 @@ struct pppox_sock {
union {
struct pppoe_opt pppoe;
} proto;
unsigned short num;
__be16 num;
};
#define pppoe_dev proto.pppoe.dev
#define pppoe_ifindex proto.pppoe.ifindex
@ -172,7 +172,7 @@ static inline struct sock *sk_pppox(struct pppox_sock *po)
struct module;
struct pppox_proto {
int (*create)(struct socket *sock);
int (*create)(struct net *net, struct socket *sock);
int (*ioctl)(struct socket *sock, unsigned int cmd,
unsigned long arg);
struct module *owner;

View file

@ -24,19 +24,7 @@ struct shaper
unsigned long recovery; /* Time we can next clock a packet out on
an empty queue */
spinlock_t lock;
struct net_device_stats stats;
struct net_device *dev;
int (*hard_start_xmit) (struct sk_buff *skb,
struct net_device *dev);
int (*hard_header) (struct sk_buff *skb,
struct net_device *dev,
unsigned short type,
void *daddr,
void *saddr,
unsigned len);
int (*rebuild_header)(struct sk_buff *skb);
int (*hard_header_cache)(struct neighbour *neigh, struct hh_cache *hh);
void (*header_cache_update)(struct hh_cache *hh, struct net_device *dev, unsigned char * haddr);
struct net_device_stats* (*get_stats)(struct net_device *dev);
struct timer_list timer;
};

View file

@ -42,7 +42,6 @@ struct tun_struct {
struct sk_buff_head readq;
struct net_device *dev;
struct net_device_stats stats;
struct fasync_struct *fasync;

View file

@ -62,7 +62,7 @@ struct vlan_hdr {
#define VLAN_VID_MASK 0xfff
/* found in socket.c */
extern void vlan_ioctl_set(int (*hook)(void __user *));
extern void vlan_ioctl_set(int (*hook)(struct net *, void __user *));
#define VLAN_NAME "vlan"

177
include/linux/inet_lro.h Normal file
View file

@ -0,0 +1,177 @@
/*
* linux/include/linux/inet_lro.h
*
* Large Receive Offload (ipv4 / tcp)
*
* (C) Copyright IBM Corp. 2007
*
* Authors:
* Jan-Bernd Themann <themann@de.ibm.com>
* Christoph Raisch <raisch@de.ibm.com>
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __INET_LRO_H_
#define __INET_LRO_H_
#include <net/ip.h>
#include <net/tcp.h>
/*
* LRO statistics
*/
struct net_lro_stats {
unsigned long aggregated;
unsigned long flushed;
unsigned long no_desc;
};
/*
* LRO descriptor for a tcp session
*/
struct net_lro_desc {
struct sk_buff *parent;
struct sk_buff *last_skb;
struct skb_frag_struct *next_frag;
struct iphdr *iph;
struct tcphdr *tcph;
struct vlan_group *vgrp;
__wsum data_csum;
u32 tcp_rcv_tsecr;
u32 tcp_rcv_tsval;
u32 tcp_ack;
u32 tcp_next_seq;
u32 skb_tot_frags_len;
u16 ip_tot_len;
u16 tcp_saw_tstamp; /* timestamps enabled */
u16 tcp_window;
u16 vlan_tag;
int pkt_aggr_cnt; /* counts aggregated packets */
int vlan_packet;
int mss;
int active;
};
/*
* Large Receive Offload (LRO) Manager
*
* Fields must be set by driver
*/
struct net_lro_mgr {
struct net_device *dev;
struct net_lro_stats stats;
/* LRO features */
unsigned long features;
#define LRO_F_NAPI 1 /* Pass packets to stack via NAPI */
#define LRO_F_EXTRACT_VLAN_ID 2 /* Set flag if VLAN IDs are extracted
from received packets and eth protocol
is still ETH_P_8021Q */
u32 ip_summed; /* Set in non generated SKBs in page mode */
u32 ip_summed_aggr; /* Set in aggregated SKBs: CHECKSUM_UNNECESSARY
* or CHECKSUM_NONE */
int max_desc; /* Max number of LRO descriptors */
int max_aggr; /* Max number of LRO packets to be aggregated */
struct net_lro_desc *lro_arr; /* Array of LRO descriptors */
/*
* Optimized driver functions
*
* get_skb_header: returns tcp and ip header for packet in SKB
*/
int (*get_skb_header)(struct sk_buff *skb, void **ip_hdr,
void **tcpudp_hdr, u64 *hdr_flags, void *priv);
/* hdr_flags: */
#define LRO_IPV4 1 /* ip_hdr is IPv4 header */
#define LRO_TCP 2 /* tcpudp_hdr is TCP header */
/*
* get_frag_header: returns mac, tcp and ip header for packet in SKB
*
* @hdr_flags: Indicate what kind of LRO has to be done
* (IPv4/IPv6/TCP/UDP)
*/
int (*get_frag_header)(struct skb_frag_struct *frag, void **mac_hdr,
void **ip_hdr, void **tcpudp_hdr, u64 *hdr_flags,
void *priv);
};
/*
* Processes a SKB
*
* @lro_mgr: LRO manager to use
* @skb: SKB to aggregate
* @priv: Private data that may be used by driver functions
* (for example get_tcp_ip_hdr)
*/
void lro_receive_skb(struct net_lro_mgr *lro_mgr,
struct sk_buff *skb,
void *priv);
/*
* Processes a SKB with VLAN HW acceleration support
*/
void lro_vlan_hwaccel_receive_skb(struct net_lro_mgr *lro_mgr,
struct sk_buff *skb,
struct vlan_group *vgrp,
u16 vlan_tag,
void *priv);
/*
* Processes a fragment list
*
* This functions aggregate fragments and generate SKBs do pass
* the packets to the stack.
*
* @lro_mgr: LRO manager to use
* @frags: Fragment to be processed. Must contain entire header in first
* element.
* @len: Length of received data
* @true_size: Actual size of memory the fragment is consuming
* @priv: Private data that may be used by driver functions
* (for example get_tcp_ip_hdr)
*/
void lro_receive_frags(struct net_lro_mgr *lro_mgr,
struct skb_frag_struct *frags,
int len, int true_size, void *priv, __wsum sum);
void lro_vlan_hwaccel_receive_frags(struct net_lro_mgr *lro_mgr,
struct skb_frag_struct *frags,
int len, int true_size,
struct vlan_group *vgrp,
u16 vlan_tag,
void *priv, __wsum sum);
/*
* Forward all aggregated SKBs held by lro_mgr to network stack
*/
void lro_flush_all(struct net_lro_mgr *lro_mgr);
void lro_flush_pkt(struct net_lro_mgr *lro_mgr,
struct iphdr *iph, struct tcphdr *tcph);
#endif

View file

@ -57,6 +57,7 @@
* The markers follow same syntax rules as __init / __initdata. */
#define __init_refok noinline __attribute__ ((__section__ (".text.init.refok")))
#define __initdata_refok __attribute__ ((__section__ (".data.init.refok")))
#define __exit_refok noinline __attribute__ ((__section__ (".exit.text.refok")))
#ifdef MODULE
#define __exit __attribute__ ((__section__(".exit.text"))) __cold

View file

@ -9,6 +9,7 @@
#include <linux/ipc.h>
#include <linux/pid_namespace.h>
#include <linux/user_namespace.h>
#include <net/net_namespace.h>
#define INIT_FDTABLE \
{ \
@ -78,6 +79,7 @@ extern struct nsproxy init_nsproxy;
.nslock = __SPIN_LOCK_UNLOCKED(nsproxy.nslock), \
.uts_ns = &init_uts_ns, \
.mnt_ns = NULL, \
INIT_NET_NS(net_ns) \
INIT_IPC_NS(ipc_ns) \
.user_ns = &init_user_ns, \
}

View file

@ -360,6 +360,7 @@ struct input_absinfo {
#define KEY_BLUETOOTH 237
#define KEY_WLAN 238
#define KEY_UWB 239
#define KEY_UNKNOWN 240

View file

@ -96,27 +96,6 @@ struct ipv6_destopt_hao {
struct in6_addr addr;
} __attribute__ ((__packed__));
struct ipv6_auth_hdr {
__u8 nexthdr;
__u8 hdrlen; /* This one is measured in 32 bit units! */
__be16 reserved;
__be32 spi;
__be32 seq_no; /* Sequence number */
__u8 auth_data[0]; /* Length variable but >=4. Mind the 64 bit alignment! */
};
struct ipv6_esp_hdr {
__be32 spi;
__be32 seq_no; /* Sequence number */
__u8 enc_data[0]; /* Length variable but >=8. Mind the 64 bit alignment! */
};
struct ipv6_comp_hdr {
__u8 nexthdr;
__u8 flags;
__be16 cpi;
};
/*
* IPv6 fixed header
*

View file

@ -353,13 +353,6 @@ typedef struct isdn_net_local_s {
/* a particular channel (including */
/* the frame_cnt */
int (*org_hhc)(
struct neighbour *neigh,
struct hh_cache *hh);
/* Ptr to orig. header_cache_update */
void (*org_hcu)(struct hh_cache *,
struct net_device *,
unsigned char *);
int pppbind; /* ippp device for bindings */
int dialtimeout; /* How long shall we try on dialing? (jiffies) */
int dialwait; /* How long shall we wait after failed attempt? (jiffies) */
@ -389,7 +382,7 @@ typedef struct isdn_net_dev_s {
online */
spinlock_t queue_lock; /* lock to protect queue */
void *next; /* Pointer to next isdn-interface */
struct net_device dev; /* interface to upper levels */
struct net_device *dev; /* interface to upper levels */
#ifdef CONFIG_ISDN_PPP
ippp_bundle * pb; /* pointer to the common bundle structure
* with the per-bundle data */

72
include/linux/ivtv.h Normal file
View file

@ -0,0 +1,72 @@
/*
Public ivtv API header
Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
Copyright (C) 2004-2007 Hans Verkuil <hverkuil@xs4all.nl>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __LINUX_IVTV_H__
#define __LINUX_IVTV_H__
#ifdef __KERNEL__
#include <linux/compiler.h> /* need __user */
#else
#define __user
#endif
#include <linux/types.h>
/* ivtv knows several distinct output modes: MPEG streaming,
YUV streaming, YUV updates through user DMA and the passthrough
mode.
In order to clearly tell the driver that we are in user DMA
YUV mode you need to call IVTV_IOC_DMA_FRAME with y_source == NULL
first (althrough if you don't then the first time
DMA_FRAME is called the mode switch is done automatically).
When you close the file handle the user DMA mode is exited again.
While in one mode, you cannot use another mode (EBUSY is returned).
All this means that if you want to change the YUV interlacing
for the user DMA YUV mode you first need to do call IVTV_IOC_DMA_FRAME
with y_source == NULL before you can set the correct format using
VIDIOC_S_FMT.
Eventually all this should be replaced with a proper V4L2 API,
but for now we have to do it this way. */
struct ivtv_dma_frame {
enum v4l2_buf_type type; /* V4L2_BUF_TYPE_VIDEO_OUTPUT */
__u32 pixelformat; /* 0 == same as destination */
void __user *y_source; /* if NULL and type == V4L2_BUF_TYPE_VIDEO_OUTPUT,
then just switch to user DMA YUV output mode */
void __user *uv_source; /* Unused for RGB pixelformats */
struct v4l2_rect src;
struct v4l2_rect dst;
__u32 src_width;
__u32 src_height;
};
#define IVTV_IOC_DMA_FRAME _IOW ('V', BASE_VIDIOC_PRIVATE+0, struct ivtv_dma_frame)
/* These are the VBI types as they appear in the embedded VBI private packets. */
#define IVTV_SLICED_TYPE_TELETEXT_B (1)
#define IVTV_SLICED_TYPE_CAPTION_525 (4)
#define IVTV_SLICED_TYPE_WSS_625 (5)
#define IVTV_SLICED_TYPE_VPS (7)
#endif /* _LINUX_IVTV_H */

42
include/linux/ivtvfb.h Normal file
View file

@ -0,0 +1,42 @@
/*
On Screen Display cx23415 Framebuffer driver
Copyright (C) 2006, 2007 Ian Armstrong <ian@iarmst.demon.co.uk>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __LINUX_IVTVFB_H__
#define __LINUX_IVTVFB_H__
#ifdef __KERNEL__
#include <linux/compiler.h> /* need __user */
#else
#define __user
#endif
#include <linux/types.h>
/* Framebuffer external API */
struct ivtvfb_dma_frame {
void __user *source;
unsigned long dest_offset;
int count;
};
#define IVTVFB_IOC_DMA_FRAME _IOW('V', BASE_VIDIOC_PRIVATE+0, struct ivtvfb_dma_frame)
#define FBIO_WAITFORVSYNC _IOW('F', 0x20, u_int32_t)
#endif

View file

@ -36,8 +36,6 @@
/* LATCH is used in the interval timer and ftape setup. */
#define LATCH ((CLOCK_TICK_RATE + HZ/2) / HZ) /* For divider */
#define LATCH_HPET ((HPET_TICK_RATE + HZ/2) / HZ)
/* Suppose we want to devide two numbers NOM and DEN: NOM/DEN, the we can
* improve accuracy by shifting LSH bits, hence calculating:
* (NOM << LSH) / DEN
@ -53,13 +51,9 @@
/* HZ is the requested value. ACTHZ is actual HZ ("<< 8" is for accuracy) */
#define ACTHZ (SH_DIV (CLOCK_TICK_RATE, LATCH, 8))
#define ACTHZ_HPET (SH_DIV (HPET_TICK_RATE, LATCH_HPET, 8))
/* TICK_NSEC is the time between ticks in nsec assuming real ACTHZ */
#define TICK_NSEC (SH_DIV (1000000UL * 1000, ACTHZ, 8))
#define TICK_NSEC_HPET (SH_DIV(1000000UL * 1000, ACTHZ_HPET, 8))
/* TICK_USEC is the time between ticks in usec assuming fake USER_HZ */
#define TICK_USEC ((1000000UL + USER_HZ/2) / USER_HZ)

View file

@ -42,6 +42,20 @@ extern const char linux_proc_banner[];
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
#define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
#ifdef CONFIG_LBD
# include <asm/div64.h>
# define sector_div(a, b) do_div(a, b)
#else
# define sector_div(n, b)( \
{ \
int _res; \
_res = (n) % (b); \
(n) /= (b); \
_res; \
} \
)
#endif
/**
* upper_32_bits - return bits 32-63 of a number
* @n: the number we're accessing

View file

@ -1,8 +1,10 @@
/*
* kobject.h - generic kernel object infrastructure.
*
* Copyright (c) 2002-2003 Patrick Mochel
* Copyright (c) 2002-2003 Open Source Development Labs
* Copyright (c) 2002-2003 Patrick Mochel
* Copyright (c) 2002-2003 Open Source Development Labs
* Copyright (c) 2006-2007 Greg Kroah-Hartman <greg@kroah.com>
* Copyright (c) 2006-2007 Novell Inc.
*
* This file is released under the GPLv2.
*
@ -29,6 +31,8 @@
#define KOBJ_NAME_LEN 20
#define UEVENT_HELPER_PATH_LEN 256
#define UEVENT_NUM_ENVP 32 /* number of env pointers */
#define UEVENT_BUFFER_SIZE 2048 /* buffer for the variables */
/* path to the userspace helper executed on an event */
extern char uevent_helper[];
@ -56,19 +60,14 @@ enum kobject_action {
KOBJ_MAX
};
/* The list of strings defining the valid kobject actions as specified above */
extern const char *kobject_actions[];
struct kobject {
const char * k_name;
char name[KOBJ_NAME_LEN];
struct kref kref;
struct list_head entry;
struct kobject * parent;
struct kset * kset;
struct kobj_type * ktype;
struct sysfs_dirent * sd;
wait_queue_head_t poll;
};
extern int kobject_set_name(struct kobject *, const char *, ...)
@ -83,14 +82,9 @@ extern void kobject_init(struct kobject *);
extern void kobject_cleanup(struct kobject *);
extern int __must_check kobject_add(struct kobject *);
extern int __must_check kobject_shadow_add(struct kobject *kobj,
struct sysfs_dirent *shadow_parent);
extern void kobject_del(struct kobject *);
extern int __must_check kobject_rename(struct kobject *, const char *new_name);
extern int __must_check kobject_shadow_rename(struct kobject *kobj,
struct sysfs_dirent *new_parent,
const char *new_name);
extern int __must_check kobject_move(struct kobject *, struct kobject *);
extern int __must_check kobject_register(struct kobject *);
@ -111,36 +105,44 @@ struct kobj_type {
struct attribute ** default_attrs;
};
struct kobj_uevent_env {
char *envp[UEVENT_NUM_ENVP];
int envp_idx;
char buf[UEVENT_BUFFER_SIZE];
int buflen;
};
struct kset_uevent_ops {
int (*filter)(struct kset *kset, struct kobject *kobj);
const char *(*name)(struct kset *kset, struct kobject *kobj);
int (*uevent)(struct kset *kset, struct kobject *kobj, char **envp,
int num_envp, char *buffer, int buffer_size);
int (*uevent)(struct kset *kset, struct kobject *kobj,
struct kobj_uevent_env *env);
};
/*
* struct kset - a set of kobjects of a specific type, belonging
* to a specific subsystem.
/**
* struct kset - a set of kobjects of a specific type, belonging to a specific subsystem.
*
* All kobjects of a kset should be embedded in an identical
* type. This type may have a descriptor, which the kset points
* to. This allows there to exist sets of objects of the same
* type in different subsystems.
* A kset defines a group of kobjects. They can be individually
* different "types" but overall these kobjects all want to be grouped
* together and operated on in the same manner. ksets are used to
* define the attribute callbacks and other common events that happen to
* a kobject.
*
* A subsystem does not have to be a list of only one type
* of object; multiple ksets can belong to one subsystem. All
* ksets of a subsystem share the subsystem's lock.
*
* Each kset can support specific event variables; it can
* supress the event generation or add subsystem specific
* variables carried with the event.
* @ktype: the struct kobj_type for this specific kset
* @list: the list of all kobjects for this kset
* @list_lock: a lock for iterating over the kobjects
* @kobj: the embedded kobject for this kset (recursion, isn't it fun...)
* @uevent_ops: the set of uevent operations for this kset. These are
* called whenever a kobject has something happen to it so that the kset
* can add new environment variables, or filter out the uevents if so
* desired.
*/
struct kset {
struct kobj_type * ktype;
struct kobj_type *ktype;
struct list_head list;
spinlock_t list_lock;
struct kobject kobj;
struct kset_uevent_ops * uevent_ops;
struct kset_uevent_ops *uevent_ops;
};
@ -179,18 +181,18 @@ extern struct kobject * kset_find_obj(struct kset *, const char *);
* Use this when initializing an embedded kset with no other
* fields to initialize.
*/
#define set_kset_name(str) .kset = { .kobj = { .name = str } }
#define set_kset_name(str) .kset = { .kobj = { .k_name = str } }
#define decl_subsys(_name,_type,_uevent_ops) \
struct kset _name##_subsys = { \
.kobj = { .name = __stringify(_name) }, \
.kobj = { .k_name = __stringify(_name) }, \
.ktype = _type, \
.uevent_ops =_uevent_ops, \
}
#define decl_subsys_name(_varname,_name,_type,_uevent_ops) \
struct kset _varname##_subsys = { \
.kobj = { .name = __stringify(_name) }, \
.kobj = { .k_name = __stringify(_name) }, \
.ktype = _type, \
.uevent_ops =_uevent_ops, \
}
@ -218,49 +220,9 @@ extern struct kset hypervisor_subsys;
#define kobj_set_kset_s(obj,subsys) \
(obj)->kobj.kset = &(subsys)
/**
* kset_set_kset_s(obj,subsys) - set kset for embedded kset.
* @obj: ptr to some object type.
* @subsys: a subsystem object (not a ptr).
*
* Can be used for any object type with an embedded ->kset.
* Sets the kset of @obj's embedded kobject (via its embedded
* kset) to @subsys.kset. This makes @obj a member of that
* kset.
*/
#define kset_set_kset_s(obj,subsys) \
(obj)->kset.kobj.kset = &(subsys)
/**
* subsys_set_kset(obj,subsys) - set kset for subsystem
* @obj: ptr to some object type.
* @_subsys: a subsystem object (not a ptr).
*
* Can be used for any object type with an embedded ->subsys.
* Sets the kset of @obj's kobject to @subsys.kset. This makes
* the object a member of that kset.
*/
#define subsys_set_kset(obj,_subsys) \
(obj)->subsys.kobj.kset = &(_subsys)
extern void subsystem_init(struct kset *);
extern int __must_check subsystem_register(struct kset *);
extern void subsystem_unregister(struct kset *);
static inline struct kset *subsys_get(struct kset *s)
{
if (s)
return kset_get(s);
return NULL;
}
static inline void subsys_put(struct kset *s)
{
kset_put(s);
}
struct subsys_attribute {
struct attribute attr;
ssize_t (*show)(struct kset *, char *);
@ -275,10 +237,11 @@ int kobject_uevent(struct kobject *kobj, enum kobject_action action);
int kobject_uevent_env(struct kobject *kobj, enum kobject_action action,
char *envp[]);
int add_uevent_var(char **envp, int num_envp, int *cur_index,
char *buffer, int buffer_size, int *cur_len,
const char *format, ...)
__attribute__((format (printf, 7, 8)));
int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...)
__attribute__((format (printf, 2, 3)));
int kobject_action_type(const char *buf, size_t count,
enum kobject_action *type);
#else
static inline int kobject_uevent(struct kobject *kobj, enum kobject_action action)
{ return 0; }
@ -287,10 +250,12 @@ static inline int kobject_uevent_env(struct kobject *kobj,
char *envp[])
{ return 0; }
static inline int add_uevent_var(char **envp, int num_envp, int *cur_index,
char *buffer, int buffer_size, int *cur_len,
const char *format, ...)
static inline int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...)
{ return 0; }
static inline int kobject_action_type(const char *buf, size_t count,
enum kobject_action *type)
{ return -EINVAL; }
#endif
#endif /* __KERNEL__ */

View file

@ -102,6 +102,13 @@ static inline ktime_t ktime_set(const long secs, const unsigned long nsecs)
#define ktime_add_ns(kt, nsval) \
({ (ktime_t){ .tv64 = (kt).tv64 + (nsval) }; })
/*
* Subtract a scalar nanosecod from a ktime_t variable
* res = kt - nsval:
*/
#define ktime_sub_ns(kt, nsval) \
({ (ktime_t){ .tv64 = (kt).tv64 - (nsval) }; })
/* convert a timespec to ktime_t format: */
static inline ktime_t timespec_to_ktime(struct timespec ts)
{
@ -199,6 +206,15 @@ static inline ktime_t ktime_add(const ktime_t add1, const ktime_t add2)
*/
extern ktime_t ktime_add_ns(const ktime_t kt, u64 nsec);
/**
* ktime_sub_ns - Subtract a scalar nanoseconds value from a ktime_t variable
* @kt: minuend
* @nsec: the scalar nsec value to subtract
*
* Returns the subtraction of @nsec from @kt in ktime_t format
*/
extern ktime_t ktime_sub_ns(const ktime_t kt, u64 nsec);
/**
* timespec_to_ktime - convert a timespec to ktime_t format
* @ts: the timespec variable to convert
@ -289,6 +305,11 @@ static inline ktime_t ktime_add_us(const ktime_t kt, const u64 usec)
return ktime_add_ns(kt, usec * 1000);
}
static inline ktime_t ktime_sub_us(const ktime_t kt, const u64 usec)
{
return ktime_sub_ns(kt, usec * 1000);
}
/*
* The resolution of the clocks. The resolution value is returned in
* the clock_getres() system call to give application programmers an

View file

@ -28,7 +28,6 @@
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <asm/scatterlist.h>
#include <linux/io.h>
@ -107,12 +106,6 @@ static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
/* defines only for the constants which don't work well as enums */
#define ATA_TAG_POISON 0xfafbfcfdU
/* move to PCI layer? */
static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
{
return &pdev->dev;
}
enum {
/* various global constants */
LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
@ -139,11 +132,12 @@ enum {
ATA_DFLAG_FLUSH_EXT = (1 << 4), /* do FLUSH_EXT instead of FLUSH */
ATA_DFLAG_ACPI_PENDING = (1 << 5), /* ACPI resume action pending */
ATA_DFLAG_ACPI_FAILED = (1 << 6), /* ACPI on devcfg has failed */
ATA_DFLAG_CFG_MASK = (1 << 8) - 1,
ATA_DFLAG_AN = (1 << 7), /* AN configured */
ATA_DFLAG_CFG_MASK = (1 << 12) - 1,
ATA_DFLAG_PIO = (1 << 8), /* device limited to PIO mode */
ATA_DFLAG_NCQ_OFF = (1 << 9), /* device limited to non-NCQ mode */
ATA_DFLAG_SPUNDOWN = (1 << 10), /* XXX: for spindown_compat */
ATA_DFLAG_PIO = (1 << 12), /* device limited to PIO mode */
ATA_DFLAG_NCQ_OFF = (1 << 13), /* device limited to non-NCQ mode */
ATA_DFLAG_SPUNDOWN = (1 << 14), /* XXX: for spindown_compat */
ATA_DFLAG_INIT_MASK = (1 << 16) - 1,
ATA_DFLAG_DETACH = (1 << 16),
@ -154,7 +148,22 @@ enum {
ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
ATA_DEV_ATAPI = 3, /* ATAPI device */
ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
ATA_DEV_NONE = 5, /* no device */
ATA_DEV_PMP = 5, /* SATA port multiplier */
ATA_DEV_PMP_UNSUP = 6, /* SATA port multiplier (unsupported) */
ATA_DEV_SEMB = 7, /* SEMB */
ATA_DEV_SEMB_UNSUP = 8, /* SEMB (unsupported) */
ATA_DEV_NONE = 9, /* no device */
/* struct ata_link flags */
ATA_LFLAG_HRST_TO_RESUME = (1 << 0), /* hardreset to resume link */
ATA_LFLAG_SKIP_D2H_BSY = (1 << 1), /* can't wait for the first D2H
* Register FIS clearing BSY */
ATA_LFLAG_NO_SRST = (1 << 2), /* avoid softreset */
ATA_LFLAG_ASSUME_ATA = (1 << 3), /* assume ATA class */
ATA_LFLAG_ASSUME_SEMB = (1 << 4), /* assume SEMB class */
ATA_LFLAG_ASSUME_CLASS = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB,
ATA_LFLAG_NO_RETRY = (1 << 5), /* don't retry this link */
ATA_LFLAG_DISABLED = (1 << 6), /* link is disabled */
/* struct ata_port flags */
ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */
@ -170,13 +179,12 @@ enum {
ATA_FLAG_PIO_POLLING = (1 << 9), /* use polling PIO if LLD
* doesn't handle PIO interrupts */
ATA_FLAG_NCQ = (1 << 10), /* host supports NCQ */
ATA_FLAG_HRST_TO_RESUME = (1 << 11), /* hardreset to resume phy */
ATA_FLAG_SKIP_D2H_BSY = (1 << 12), /* can't wait for the first D2H
* Register FIS clearing BSY */
ATA_FLAG_DEBUGMSG = (1 << 13),
ATA_FLAG_IGN_SIMPLEX = (1 << 15), /* ignore SIMPLEX */
ATA_FLAG_NO_IORDY = (1 << 16), /* controller lacks iordy */
ATA_FLAG_ACPI_SATA = (1 << 17), /* need native SATA ACPI layout */
ATA_FLAG_AN = (1 << 18), /* controller supports AN */
ATA_FLAG_PMP = (1 << 19), /* controller supports PMP */
/* The following flag belongs to ap->pflags but is kept in
* ap->flags because it's referenced in many LLDs and will be
@ -195,6 +203,7 @@ enum {
ATA_PFLAG_UNLOADING = (1 << 5), /* module is unloading */
ATA_PFLAG_SCSI_HOTPLUG = (1 << 6), /* SCSI hotplug scheduled */
ATA_PFLAG_INITIALIZING = (1 << 7), /* being initialized, don't touch */
ATA_PFLAG_RESETTING = (1 << 8), /* reset in progress */
ATA_PFLAG_SUSPENDED = (1 << 17), /* port is suspended (power) */
ATA_PFLAG_PM_PENDING = (1 << 18), /* PM operation pending */
@ -207,6 +216,7 @@ enum {
ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
ATA_QCFLAG_IO = (1 << 3), /* standard IO command */
ATA_QCFLAG_RESULT_TF = (1 << 4), /* result TF requested */
ATA_QCFLAG_CLEAR_EXCL = (1 << 5), /* clear excl_link on completion */
ATA_QCFLAG_FAILED = (1 << 16), /* cmd failed and is owned by EH */
ATA_QCFLAG_SENSE_VALID = (1 << 17), /* sense data valid */
@ -263,6 +273,10 @@ enum {
/* ering size */
ATA_ERING_SIZE = 32,
/* return values for ->qc_defer */
ATA_DEFER_LINK = 1,
ATA_DEFER_PORT = 2,
/* desc_len for ata_eh_info and context */
ATA_EH_DESC_LEN = 80,
@ -270,6 +284,7 @@ enum {
ATA_EH_REVALIDATE = (1 << 0),
ATA_EH_SOFTRESET = (1 << 1),
ATA_EH_HARDRESET = (1 << 2),
ATA_EH_ENABLE_LINK = (1 << 3),
ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET,
ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE,
@ -289,12 +304,16 @@ enum {
ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET,
ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK,
/* max repeat if error condition is still set after ->error_handler */
ATA_EH_MAX_REPEAT = 5,
/* max tries if error condition is still set after ->error_handler */
ATA_EH_MAX_TRIES = 5,
/* how hard are we gonna try to probe/recover devices */
ATA_PROBE_MAX_TRIES = 3,
ATA_EH_DEV_TRIES = 3,
ATA_EH_PMP_TRIES = 5,
ATA_EH_PMP_LINK_TRIES = 3,
SATA_PMP_SCR_TIMEOUT = 250,
/* Horkage types. May be set by libata or controller on drives
(some horkage may be drive/controller pair dependant */
@ -304,6 +323,14 @@ enum {
ATA_HORKAGE_NONCQ = (1 << 2), /* Don't use NCQ */
ATA_HORKAGE_MAX_SEC_128 = (1 << 3), /* Limit max sects to 128 */
ATA_HORKAGE_BROKEN_HPA = (1 << 4), /* Broken HPA */
ATA_HORKAGE_SKIP_PM = (1 << 5), /* Skip PM operations */
ATA_HORKAGE_HPA_SIZE = (1 << 6), /* native size off by one */
/* DMA mask for user DMA control: User visible values; DO NOT
renumber */
ATA_DMA_MASK_ATA = (1 << 0), /* DMA on ATA Disk */
ATA_DMA_MASK_ATAPI = (1 << 1), /* DMA on ATAPI */
ATA_DMA_MASK_CFA = (1 << 2), /* DMA on CF Card */
};
enum hsm_task_states {
@ -333,14 +360,15 @@ enum ata_completion_errors {
struct scsi_device;
struct ata_port_operations;
struct ata_port;
struct ata_link;
struct ata_queued_cmd;
/* typedefs */
typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
typedef int (*ata_prereset_fn_t)(struct ata_port *ap, unsigned long deadline);
typedef int (*ata_reset_fn_t)(struct ata_port *ap, unsigned int *classes,
typedef int (*ata_prereset_fn_t)(struct ata_link *link, unsigned long deadline);
typedef int (*ata_reset_fn_t)(struct ata_link *link, unsigned int *classes,
unsigned long deadline);
typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *classes);
typedef void (*ata_postreset_fn_t)(struct ata_link *link, unsigned int *classes);
struct ata_ioports {
void __iomem *cmd_addr;
@ -363,8 +391,6 @@ struct ata_ioports {
struct ata_host {
spinlock_t lock;
struct device *dev;
unsigned long irq;
unsigned long irq2;
void __iomem * const *iomap;
unsigned int n_ports;
void *private_data;
@ -436,7 +462,7 @@ struct ata_ering {
};
struct ata_device {
struct ata_port *ap;
struct ata_link *link;
unsigned int devno; /* 0 or 1 */
unsigned long flags; /* ATA_DFLAG_xxx */
unsigned int horkage; /* List of broken features */
@ -447,7 +473,12 @@ struct ata_device {
/* n_sector is used as CLEAR_OFFSET, read comment above CLEAR_OFFSET */
u64 n_sectors; /* size of device, if ATA */
unsigned int class; /* ATA_DEV_xxx */
u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
union {
u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */
};
u8 pio_mode;
u8 dma_mode;
u8 xfer_mode;
@ -510,6 +541,27 @@ struct ata_acpi_gtm {
u32 flags;
} __packed;
struct ata_link {
struct ata_port *ap;
int pmp; /* port multiplier port # */
unsigned int active_tag; /* active tag on this link */
u32 sactive; /* active NCQ commands */
unsigned int flags; /* ATA_LFLAG_xxx */
unsigned int hw_sata_spd_limit;
unsigned int sata_spd_limit;
unsigned int sata_spd; /* current SATA PHY speed */
/* record runtime error info, protected by host_set lock */
struct ata_eh_info eh_info;
/* EH context */
struct ata_eh_context eh_context;
struct ata_device device[ATA_MAX_DEVICES];
};
struct ata_port {
struct Scsi_Host *scsi_host; /* our co-allocated scsi host */
const struct ata_port_operations *ops;
@ -533,23 +585,17 @@ struct ata_port {
unsigned int mwdma_mask;
unsigned int udma_mask;
unsigned int cbl; /* cable type; ATA_CBL_xxx */
unsigned int hw_sata_spd_limit;
unsigned int sata_spd_limit; /* SATA PHY speed limit */
unsigned int sata_spd; /* current SATA PHY speed */
/* record runtime error info, protected by host lock */
struct ata_eh_info eh_info;
/* EH context owned by EH */
struct ata_eh_context eh_context;
struct ata_device device[ATA_MAX_DEVICES];
struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
unsigned long qc_allocated;
unsigned int qc_active;
int nr_active_links; /* #links with active qcs */
unsigned int active_tag;
u32 sactive;
struct ata_link link; /* host default link */
int nr_pmp_links; /* nr of available PMP links */
struct ata_link *pmp_link; /* array of PMP links */
struct ata_link *excl_link; /* for PMP qc exclusion */
struct ata_port_stats stats;
struct ata_host *host;
@ -565,6 +611,7 @@ struct ata_port {
u32 msg_enable;
struct list_head eh_done_q;
wait_queue_head_t eh_wait_q;
int eh_tries;
pm_message_t pm_mesg;
int *pm_result;
@ -582,8 +629,6 @@ struct ata_port {
};
struct ata_port_operations {
void (*port_disable) (struct ata_port *);
void (*dev_config) (struct ata_device *);
void (*set_piomode) (struct ata_port *, struct ata_device *);
@ -599,7 +644,7 @@ struct ata_port_operations {
void (*dev_select)(struct ata_port *ap, unsigned int device);
void (*phy_reset) (struct ata_port *ap); /* obsolete */
int (*set_mode) (struct ata_port *ap, struct ata_device **r_failed_dev);
int (*set_mode) (struct ata_link *link, struct ata_device **r_failed_dev);
int (*cable_detect) (struct ata_port *ap);
@ -610,9 +655,14 @@ struct ata_port_operations {
void (*data_xfer) (struct ata_device *, unsigned char *, unsigned int, int);
int (*qc_defer) (struct ata_queued_cmd *qc);
void (*qc_prep) (struct ata_queued_cmd *qc);
unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
/* port multiplier */
void (*pmp_attach) (struct ata_port *ap);
void (*pmp_detach) (struct ata_port *ap);
/* Error handlers. ->error_handler overrides ->eng_timeout and
* indicates that new-style EH is in place.
*/
@ -626,7 +676,6 @@ struct ata_port_operations {
irq_handler_t irq_handler;
void (*irq_clear) (struct ata_port *);
u8 (*irq_on) (struct ata_port *);
u8 (*irq_ack) (struct ata_port *ap, unsigned int chk_drq);
int (*scr_read) (struct ata_port *ap, unsigned int sc_reg, u32 *val);
int (*scr_write) (struct ata_port *ap, unsigned int sc_reg, u32 val);
@ -646,6 +695,7 @@ struct ata_port_operations {
struct ata_port_info {
struct scsi_host_template *sht;
unsigned long flags;
unsigned long link_flags;
unsigned long pio_mask;
unsigned long mwdma_mask;
unsigned long udma_mask;
@ -689,38 +739,27 @@ static inline int ata_port_is_dummy(struct ata_port *ap)
return ap->ops == &ata_dummy_port_ops;
}
extern void sata_print_link_status(struct ata_port *ap);
extern void sata_print_link_status(struct ata_link *link);
extern void ata_port_probe(struct ata_port *);
extern void __sata_phy_reset(struct ata_port *ap);
extern void sata_phy_reset(struct ata_port *ap);
extern void ata_bus_reset(struct ata_port *ap);
extern int sata_set_spd(struct ata_port *ap);
extern int sata_phy_debounce(struct ata_port *ap, const unsigned long *param,
extern int sata_set_spd(struct ata_link *link);
extern int sata_link_debounce(struct ata_link *link,
const unsigned long *params, unsigned long deadline);
extern int sata_link_resume(struct ata_link *link, const unsigned long *params,
unsigned long deadline);
extern int ata_std_prereset(struct ata_link *link, unsigned long deadline);
extern int ata_std_softreset(struct ata_link *link, unsigned int *classes,
unsigned long deadline);
extern int sata_phy_resume(struct ata_port *ap, const unsigned long *param,
unsigned long deadline);
extern int ata_std_prereset(struct ata_port *ap, unsigned long deadline);
extern int ata_std_softreset(struct ata_port *ap, unsigned int *classes,
unsigned long deadline);
extern int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing,
unsigned long deadline);
extern int sata_std_hardreset(struct ata_port *ap, unsigned int *class,
extern int sata_link_hardreset(struct ata_link *link,
const unsigned long *timing, unsigned long deadline);
extern int sata_std_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline);
extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes);
extern void ata_std_postreset(struct ata_link *link, unsigned int *classes);
extern void ata_port_disable(struct ata_port *);
extern void ata_std_ports(struct ata_ioports *ioaddr);
#ifdef CONFIG_PCI
extern int ata_pci_init_one (struct pci_dev *pdev,
const struct ata_port_info * const * ppi);
extern void ata_pci_remove_one (struct pci_dev *pdev);
#ifdef CONFIG_PM
extern void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg);
extern int __must_check ata_pci_device_do_resume(struct pci_dev *pdev);
extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
extern int ata_pci_device_resume(struct pci_dev *pdev);
#endif
extern int ata_pci_clear_simplex(struct pci_dev *pdev);
#endif /* CONFIG_PCI */
extern struct ata_host *ata_host_alloc(struct device *dev, int max_ports);
extern struct ata_host *ata_host_alloc_pinfo(struct device *dev,
const struct ata_port_info * const * ppi, int n_ports);
@ -746,12 +785,12 @@ extern int ata_sas_slave_configure(struct scsi_device *, struct ata_port *);
extern int ata_sas_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *),
struct ata_port *ap);
extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
extern int sata_scr_valid(struct ata_port *ap);
extern int sata_scr_read(struct ata_port *ap, int reg, u32 *val);
extern int sata_scr_write(struct ata_port *ap, int reg, u32 val);
extern int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val);
extern int ata_port_online(struct ata_port *ap);
extern int ata_port_offline(struct ata_port *ap);
extern int sata_scr_valid(struct ata_link *link);
extern int sata_scr_read(struct ata_link *link, int reg, u32 *val);
extern int sata_scr_write(struct ata_link *link, int reg, u32 val);
extern int sata_scr_write_flush(struct ata_link *link, int reg, u32 val);
extern int ata_link_online(struct ata_link *link);
extern int ata_link_offline(struct ata_link *link);
#ifdef CONFIG_PM
extern int ata_host_suspend(struct ata_host *host, pm_message_t mesg);
extern void ata_host_resume(struct ata_host *host);
@ -765,7 +804,8 @@ extern void ata_port_queue_task(struct ata_port *ap, work_func_t fn,
extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
unsigned long interval_msec,
unsigned long timeout_msec);
extern unsigned int ata_dev_try_classify(struct ata_port *, unsigned int, u8 *);
extern unsigned int ata_dev_try_classify(struct ata_device *dev, int present,
u8 *r_err);
/*
* Default driver ops implementations
@ -787,6 +827,7 @@ extern void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
unsigned int buflen, int write_data);
extern void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
unsigned int buflen, int write_data);
extern int ata_std_qc_defer(struct ata_queued_cmd *qc);
extern void ata_dumb_qc_prep(struct ata_queued_cmd *qc);
extern void ata_qc_prep(struct ata_queued_cmd *qc);
extern void ata_noop_qc_prep(struct ata_queued_cmd *qc);
@ -830,11 +871,8 @@ extern void ata_scsi_slave_destroy(struct scsi_device *sdev);
extern int ata_scsi_change_queue_depth(struct scsi_device *sdev,
int queue_depth);
extern struct ata_device *ata_dev_pair(struct ata_device *adev);
extern int ata_do_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev);
extern int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev);
extern u8 ata_irq_on(struct ata_port *ap);
extern u8 ata_dummy_irq_on(struct ata_port *ap);
extern u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq);
extern u8 ata_dummy_irq_ack(struct ata_port *ap, unsigned int chk_drq);
extern int ata_cable_40wire(struct ata_port *ap);
extern int ata_cable_80wire(struct ata_port *ap);
@ -869,8 +907,29 @@ enum {
ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
};
/* libata-acpi.c */
#ifdef CONFIG_ATA_ACPI
extern int ata_acpi_cbl_80wire(struct ata_port *ap);
int ata_acpi_stm(const struct ata_port *ap, struct ata_acpi_gtm *stm);
int ata_acpi_gtm(const struct ata_port *ap, struct ata_acpi_gtm *stm);
#else
static inline int ata_acpi_cbl_80wire(struct ata_port *ap) { return 0; }
#endif
#ifdef CONFIG_PCI
struct pci_dev;
extern int ata_pci_init_one (struct pci_dev *pdev,
const struct ata_port_info * const * ppi);
extern void ata_pci_remove_one (struct pci_dev *pdev);
#ifdef CONFIG_PM
extern void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg);
extern int __must_check ata_pci_device_do_resume(struct pci_dev *pdev);
extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
extern int ata_pci_device_resume(struct pci_dev *pdev);
#endif
extern int ata_pci_clear_simplex(struct pci_dev *pdev);
struct pci_bits {
unsigned int reg; /* PCI config register to read */
unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
@ -887,14 +946,30 @@ extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bit
extern unsigned long ata_pci_default_filter(struct ata_device *, unsigned long);
#endif /* CONFIG_PCI */
/*
* PMP
*/
extern int sata_pmp_qc_defer_cmd_switch(struct ata_queued_cmd *qc);
extern int sata_pmp_std_prereset(struct ata_link *link, unsigned long deadline);
extern int sata_pmp_std_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline);
extern void sata_pmp_std_postreset(struct ata_link *link, unsigned int *class);
extern void sata_pmp_do_eh(struct ata_port *ap,
ata_prereset_fn_t prereset, ata_reset_fn_t softreset,
ata_reset_fn_t hardreset, ata_postreset_fn_t postreset,
ata_prereset_fn_t pmp_prereset, ata_reset_fn_t pmp_softreset,
ata_reset_fn_t pmp_hardreset, ata_postreset_fn_t pmp_postreset);
/*
* EH
*/
extern void ata_eng_timeout(struct ata_port *ap);
extern void ata_port_schedule_eh(struct ata_port *ap);
extern int ata_link_abort(struct ata_link *link);
extern int ata_port_abort(struct ata_port *ap);
extern int ata_port_freeze(struct ata_port *ap);
extern int sata_async_notification(struct ata_port *ap);
extern void ata_eh_freeze_port(struct ata_port *ap);
extern void ata_eh_thaw_port(struct ata_port *ap);
@ -912,14 +987,25 @@ extern void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
#define ata_port_printk(ap, lv, fmt, args...) \
printk(lv"ata%u: "fmt, (ap)->print_id , ##args)
#define ata_link_printk(link, lv, fmt, args...) do { \
if ((link)->ap->nr_pmp_links) \
printk(lv"ata%u.%02u: "fmt, (link)->ap->print_id, \
(link)->pmp , ##args); \
else \
printk(lv"ata%u: "fmt, (link)->ap->print_id , ##args); \
} while(0)
#define ata_dev_printk(dev, lv, fmt, args...) \
printk(lv"ata%u.%02u: "fmt, (dev)->ap->print_id, (dev)->devno , ##args)
printk(lv"ata%u.%02u: "fmt, (dev)->link->ap->print_id, \
(dev)->link->pmp + (dev)->devno , ##args)
/*
* ata_eh_info helpers
*/
extern void __ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...);
extern void ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...);
extern void __ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...)
__attribute__ ((format (printf, 2, 3)));
extern void ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...)
__attribute__ ((format (printf, 2, 3)));
extern void ata_ehi_clear_desc(struct ata_eh_info *ehi);
static inline void ata_ehi_schedule_probe(struct ata_eh_info *ehi)
@ -933,9 +1019,20 @@ static inline void ata_ehi_hotplugged(struct ata_eh_info *ehi)
{
ata_ehi_schedule_probe(ehi);
ehi->flags |= ATA_EHI_HOTPLUGGED;
ehi->action |= ATA_EH_ENABLE_LINK;
ehi->err_mask |= AC_ERR_ATA_BUS;
}
/*
* port description helpers
*/
extern void ata_port_desc(struct ata_port *ap, const char *fmt, ...)
__attribute__ ((format (printf, 2, 3)));
#ifdef CONFIG_PCI
extern void ata_port_pbar_desc(struct ata_port *ap, int bar, ssize_t offset,
const char *name);
#endif
/*
* qc helpers
*/
@ -991,12 +1088,14 @@ static inline unsigned int ata_tag_internal(unsigned int tag)
*/
static inline unsigned int ata_class_enabled(unsigned int class)
{
return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI ||
class == ATA_DEV_PMP || class == ATA_DEV_SEMB;
}
static inline unsigned int ata_class_disabled(unsigned int class)
{
return class == ATA_DEV_ATA_UNSUP || class == ATA_DEV_ATAPI_UNSUP;
return class == ATA_DEV_ATA_UNSUP || class == ATA_DEV_ATAPI_UNSUP ||
class == ATA_DEV_PMP_UNSUP || class == ATA_DEV_SEMB_UNSUP;
}
static inline unsigned int ata_class_absent(unsigned int class)
@ -1020,15 +1119,62 @@ static inline unsigned int ata_dev_absent(const struct ata_device *dev)
}
/*
* port helpers
* link helpers
*/
static inline int ata_port_max_devices(const struct ata_port *ap)
static inline int ata_is_host_link(const struct ata_link *link)
{
if (ap->flags & ATA_FLAG_SLAVE_POSS)
return link == &link->ap->link;
}
static inline int ata_link_max_devices(const struct ata_link *link)
{
if (ata_is_host_link(link) && link->ap->flags & ATA_FLAG_SLAVE_POSS)
return 2;
return 1;
}
static inline int ata_link_active(struct ata_link *link)
{
return ata_tag_valid(link->active_tag) || link->sactive;
}
static inline struct ata_link *ata_port_first_link(struct ata_port *ap)
{
if (ap->nr_pmp_links)
return ap->pmp_link;
return &ap->link;
}
static inline struct ata_link *ata_port_next_link(struct ata_link *link)
{
struct ata_port *ap = link->ap;
if (link == &ap->link) {
if (!ap->nr_pmp_links)
return NULL;
return ap->pmp_link;
}
if (++link - ap->pmp_link < ap->nr_pmp_links)
return link;
return NULL;
}
#define __ata_port_for_each_link(lk, ap) \
for ((lk) = &(ap)->link; (lk); (lk) = ata_port_next_link(lk))
#define ata_port_for_each_link(link, ap) \
for ((link) = ata_port_first_link(ap); (link); \
(link) = ata_port_next_link(link))
#define ata_link_for_each_dev(dev, link) \
for ((dev) = (link)->device; \
(dev) < (link)->device + ata_link_max_devices(link) || ((dev) = NULL); \
(dev)++)
#define ata_link_for_each_dev_reverse(dev, link) \
for ((dev) = (link)->device + ata_link_max_devices(link) - 1; \
(dev) >= (link)->device || ((dev) = NULL); (dev)--)
static inline u8 ata_chk_status(struct ata_port *ap)
{
@ -1110,9 +1256,11 @@ static inline u8 ata_wait_idle(struct ata_port *ap)
{
u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
#ifdef ATA_DEBUG
if (status != 0xff && (status & (ATA_BUSY | ATA_DRQ)))
DPRINTK("ATA: abnormal status 0x%X on port 0x%p\n",
status, ap->ioaddr.status_addr);
ata_port_printk(ap, KERN_DEBUG, "abnormal Status 0x%X\n",
status);
#endif
return status;
}
@ -1149,7 +1297,7 @@ static inline void ata_tf_init(struct ata_device *dev, struct ata_taskfile *tf)
{
memset(tf, 0, sizeof(*tf));
tf->ctl = dev->ap->ctl;
tf->ctl = dev->link->ap->ctl;
if (dev->devno == 0)
tf->device = ATA_DEVICE_OBS;
else

View file

@ -524,6 +524,20 @@ static inline void list_splice_init_rcu(struct list_head *list,
prefetch(pos->member.next), &pos->member != (head); \
pos = list_entry(pos->member.next, typeof(*pos), member))
/**
* list_for_each_entry_continue_reverse - iterate backwards from the given point
* @pos: the type * to use as a loop cursor.
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*
* Start to iterate over list of given type backwards, continuing after
* the current position.
*/
#define list_for_each_entry_continue_reverse(pos, head, member) \
for (pos = list_entry(pos->member.prev, typeof(*pos), member); \
prefetch(pos->member.prev), &pos->member != (head); \
pos = list_entry(pos->member.prev, typeof(*pos), member))
/**
* list_for_each_entry_from - iterate over list of given type from the current point
* @pos: the type * to use as a loop cursor.

View file

@ -0,0 +1,42 @@
#ifndef __LINUX_MDIO_BITBANG_H
#define __LINUX_MDIO_BITBANG_H
#include <linux/phy.h>
#include <linux/module.h>
struct mdiobb_ctrl;
struct mdiobb_ops {
struct module *owner;
/* Set the Management Data Clock high if level is one,
* low if level is zero.
*/
void (*set_mdc)(struct mdiobb_ctrl *ctrl, int level);
/* Configure the Management Data I/O pin as an input if
* "output" is zero, or an output if "output" is one.
*/
void (*set_mdio_dir)(struct mdiobb_ctrl *ctrl, int output);
/* Set the Management Data I/O pin high if value is one,
* low if "value" is zero. This may only be called
* when the MDIO pin is configured as an output.
*/
void (*set_mdio_data)(struct mdiobb_ctrl *ctrl, int value);
/* Retrieve the state Management Data I/O pin. */
int (*get_mdio_data)(struct mdiobb_ctrl *ctrl);
};
struct mdiobb_ctrl {
const struct mdiobb_ops *ops;
};
/* The returned bus is not yet registered with the phy layer. */
struct mii_bus *alloc_mdio_bitbang(struct mdiobb_ctrl *ctrl);
/* The bus must already have been unregistered. */
void free_mdio_bitbang(struct mii_bus *bus);
#endif

View file

@ -48,6 +48,10 @@ enum {
MLX4_MAX_PORTS = 2
};
enum {
MLX4_BOARD_ID_LEN = 64
};
enum {
MLX4_DEV_CAP_FLAG_RC = 1 << 0,
MLX4_DEV_CAP_FLAG_UC = 1 << 1,
@ -210,6 +214,17 @@ struct mlx4_mr {
int enabled;
};
struct mlx4_fmr {
struct mlx4_mr mr;
struct mlx4_mpt_entry *mpt;
__be64 *mtts;
dma_addr_t dma_handle;
int max_pages;
int max_maps;
int maps;
u8 page_shift;
};
struct mlx4_uar {
unsigned long pfn;
int index;
@ -272,6 +287,8 @@ struct mlx4_dev {
unsigned long flags;
struct mlx4_caps caps;
struct radix_tree_root qp_table_tree;
u32 rev_id;
char board_id[MLX4_BOARD_ID_LEN];
};
struct mlx4_init_port_param {
@ -331,4 +348,14 @@ int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port);
int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]);
int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]);
int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list,
int npages, u64 iova, u32 *lkey, u32 *rkey);
int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,
int max_maps, u8 page_shift, struct mlx4_fmr *fmr);
int mlx4_fmr_enable(struct mlx4_dev *dev, struct mlx4_fmr *fmr);
void mlx4_fmr_unmap(struct mlx4_dev *dev, struct mlx4_fmr *fmr,
u32 *lkey, u32 *rkey);
int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr);
int mlx4_SYNC_TPT(struct mlx4_dev *dev);
#endif /* MLX4_DEVICE_H */

View file

@ -55,7 +55,28 @@ struct sd_switch_caps {
unsigned int hs_max_dtr;
};
struct sdio_cccr {
unsigned int sdio_vsn;
unsigned int sd_vsn;
unsigned int multi_block:1,
low_speed:1,
wide_bus:1,
high_power:1,
high_speed:1;
};
struct sdio_cis {
unsigned short vendor;
unsigned short device;
unsigned short blksize;
unsigned int max_dtr;
};
struct mmc_host;
struct sdio_func;
struct sdio_func_tuple;
#define SDIO_MAX_FUNCS 7
/*
* MMC device
@ -67,11 +88,13 @@ struct mmc_card {
unsigned int type; /* card type */
#define MMC_TYPE_MMC 0 /* MMC card */
#define MMC_TYPE_SD 1 /* SD card */
#define MMC_TYPE_SDIO 2 /* SDIO card */
unsigned int state; /* (our) card state */
#define MMC_STATE_PRESENT (1<<0) /* present in sysfs */
#define MMC_STATE_READONLY (1<<1) /* card is read-only */
#define MMC_STATE_HIGHSPEED (1<<2) /* card is in high speed mode */
#define MMC_STATE_BLOCKADDR (1<<3) /* card uses block-addressing */
u32 raw_cid[4]; /* raw card CID */
u32 raw_csd[4]; /* raw card CSD */
u32 raw_scr[2]; /* raw card SCR */
@ -80,10 +103,19 @@ struct mmc_card {
struct mmc_ext_csd ext_csd; /* mmc v4 extended card specific */
struct sd_scr scr; /* extra SD information */
struct sd_switch_caps sw_caps; /* switch (CMD6) caps */
unsigned int sdio_funcs; /* number of SDIO functions */
struct sdio_cccr cccr; /* common card info */
struct sdio_cis cis; /* common tuple info */
struct sdio_func *sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */
unsigned num_info; /* number of info strings */
const char **info; /* info strings */
struct sdio_func_tuple *tuples; /* unknown common tuples */
};
#define mmc_card_mmc(c) ((c)->type == MMC_TYPE_MMC)
#define mmc_card_sd(c) ((c)->type == MMC_TYPE_SD)
#define mmc_card_sdio(c) ((c)->type == MMC_TYPE_SDIO)
#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT)
#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY)

View file

@ -25,14 +25,20 @@ struct mmc_command {
#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
#define MMC_CMD_MASK (3 << 5) /* command type */
#define MMC_CMD_MASK (3 << 5) /* non-SPI command type */
#define MMC_CMD_AC (0 << 5)
#define MMC_CMD_ADTC (1 << 5)
#define MMC_CMD_BC (2 << 5)
#define MMC_CMD_BCR (3 << 5)
#define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */
#define MMC_RSP_SPI_S2 (1 << 8) /* second byte */
#define MMC_RSP_SPI_B4 (1 << 9) /* four data bytes */
#define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */
/*
* These are the response types, and correspond to valid bit
* These are the native response types, and correspond to valid bit
* patterns of the above flags. One additional valid pattern
* is all zeros, which means we don't expect a response.
*/
@ -41,11 +47,29 @@ struct mmc_command {
#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
#define MMC_RSP_R3 (MMC_RSP_PRESENT)
#define MMC_RSP_R4 (MMC_RSP_PRESENT)
#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
#define mmc_resp_type(cmd) ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE))
/*
* These are the SPI response types for MMC, SD, and SDIO cards.
* Commands return R1, with maybe more info. Zero is an error type;
* callers must always provide the appropriate MMC_RSP_SPI_Rx flags.
*/
#define MMC_RSP_SPI_R1 (MMC_RSP_SPI_S1)
#define MMC_RSP_SPI_R1B (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY)
#define MMC_RSP_SPI_R2 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
#define MMC_RSP_SPI_R3 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
#define MMC_RSP_SPI_R4 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
#define MMC_RSP_SPI_R5 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
#define MMC_RSP_SPI_R7 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
#define mmc_spi_resp_type(cmd) ((cmd)->flags & \
(MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY|MMC_RSP_SPI_S2|MMC_RSP_SPI_B4))
/*
* These are the command types.
*/
@ -54,12 +78,19 @@ struct mmc_command {
unsigned int retries; /* max number of retries */
unsigned int error; /* command error */
#define MMC_ERR_NONE 0
#define MMC_ERR_TIMEOUT 1
#define MMC_ERR_BADCRC 2
#define MMC_ERR_FIFO 3
#define MMC_ERR_FAILED 4
#define MMC_ERR_INVALID 5
/*
* Standard errno values are used for errors, but some have specific
* meaning in the MMC layer:
*
* ETIMEDOUT Card took too long to respond
* EILSEQ Basic format problem with the received or sent data
* (e.g. CRC check failed, incorrect opcode in response
* or bad end bit)
* EINVAL Request cannot be performed because of restrictions
* in hardware and/or the driver
* ENOMEDIUM Host can determine that the slot is empty and is
* actively failing requests
*/
struct mmc_data *data; /* data segment associated with cmd */
struct mmc_request *mrq; /* associated request */
@ -76,7 +107,6 @@ struct mmc_data {
#define MMC_DATA_WRITE (1 << 8)
#define MMC_DATA_READ (1 << 9)
#define MMC_DATA_STREAM (1 << 10)
#define MMC_DATA_MULTI (1 << 11)
unsigned int bytes_xfered;
@ -104,9 +134,20 @@ extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *,
struct mmc_command *, int);
extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *, int);
extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *);
extern void mmc_claim_host(struct mmc_host *host);
extern int __mmc_claim_host(struct mmc_host *host, atomic_t *abort);
extern void mmc_release_host(struct mmc_host *host);
/**
* mmc_claim_host - exclusively claim a host
* @host: mmc host to claim
*
* Claim a host for a set of operations.
*/
static inline void mmc_claim_host(struct mmc_host *host)
{
__mmc_claim_host(host, NULL);
}
#endif

View file

@ -10,6 +10,8 @@
#ifndef LINUX_MMC_HOST_H
#define LINUX_MMC_HOST_H
#include <linux/leds.h>
#include <linux/mmc/core.h>
struct mmc_ios {
@ -51,6 +53,7 @@ struct mmc_host_ops {
void (*request)(struct mmc_host *host, struct mmc_request *req);
void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
int (*get_ro)(struct mmc_host *host);
void (*enable_sdio_irq)(struct mmc_host *host, int enable);
};
struct mmc_card;
@ -87,9 +90,10 @@ struct mmc_host {
#define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
#define MMC_CAP_MULTIWRITE (1 << 1) /* Can accurately report bytes sent to card on error */
#define MMC_CAP_BYTEBLOCK (1 << 2) /* Can do non-log2 block sizes */
#define MMC_CAP_MMC_HIGHSPEED (1 << 3) /* Can do MMC high-speed timing */
#define MMC_CAP_SD_HIGHSPEED (1 << 4) /* Can do SD high-speed timing */
#define MMC_CAP_MMC_HIGHSPEED (1 << 2) /* Can do MMC high-speed timing */
#define MMC_CAP_SD_HIGHSPEED (1 << 3) /* Can do SD high-speed timing */
#define MMC_CAP_SDIO_IRQ (1 << 4) /* Can signal pending SDIO IRQs */
#define MMC_CAP_SPI (1 << 5) /* Talks only SPI protocols */
/* host specific block data */
unsigned int max_seg_size; /* see blk_queue_max_segment_size */
@ -106,6 +110,14 @@ struct mmc_host {
struct mmc_ios ios; /* current io bus settings */
u32 ocr; /* the current OCR setting */
/* group bitfields together to minimize padding */
unsigned int use_spi_crc:1;
unsigned int claimed:1; /* host exclusively claimed */
unsigned int bus_dead:1; /* bus has been released */
#ifdef CONFIG_MMC_DEBUG
unsigned int removed:1; /* host is being removed */
#endif
unsigned int mode; /* current card mode of host */
#define MMC_MODE_MMC 0
#define MMC_MODE_SD 1
@ -113,16 +125,19 @@ struct mmc_host {
struct mmc_card *card; /* device attached to this host */
wait_queue_head_t wq;
unsigned int claimed:1; /* host exclusively claimed */
struct delayed_work detect;
#ifdef CONFIG_MMC_DEBUG
unsigned int removed:1; /* host is being removed */
#endif
const struct mmc_bus_ops *bus_ops; /* current bus driver */
unsigned int bus_refs; /* reference counter */
unsigned int bus_dead:1; /* bus has been released */
unsigned int sdio_irqs;
struct task_struct *sdio_irq_thread;
atomic_t sdio_irq_thread_abort;
#ifdef CONFIG_LEDS_TRIGGERS
struct led_trigger *led; /* activity led */
#endif
unsigned long private[0] ____cacheline_aligned;
};
@ -137,6 +152,8 @@ static inline void *mmc_priv(struct mmc_host *host)
return (void *)host->private;
}
#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
#define mmc_dev(x) ((x)->parent)
#define mmc_classdev(x) (&(x)->class_dev)
#define mmc_hostname(x) ((x)->class_dev.bus_id)
@ -147,5 +164,11 @@ extern int mmc_resume_host(struct mmc_host *);
extern void mmc_detect_change(struct mmc_host *, unsigned long delay);
extern void mmc_request_done(struct mmc_host *, struct mmc_request *);
static inline void mmc_signal_sdio_irq(struct mmc_host *host)
{
host->ops->enable_sdio_irq(host, 0);
wake_up_process(host->sdio_irq_thread);
}
#endif

View file

@ -27,7 +27,7 @@
/* Standard MMC commands (4.1) type argument response */
/* class 1 */
#define MMC_GO_IDLE_STATE 0 /* bc */
#define MMC_GO_IDLE_STATE 0 /* bc */
#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
#define MMC_ALL_SEND_CID 2 /* bcr R2 */
#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
@ -39,8 +39,10 @@
#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
#define MMC_SPI_READ_OCR 58 /* spi spi_R3 */
#define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
/* class 2 */
#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
@ -90,15 +92,15 @@
*/
/*
MMC status in R1
MMC status in R1, for native mode (SPI bits are different)
Type
e : error bit
e : error bit
s : status bit
r : detected and set for the actual command response
x : detected and set during command execution. the host must poll
the card by sending status command in order to read these bits.
Clear condition
a : according to the card state
a : according to the card state
b : always related to the previous command. Reception of
a valid command will clear it (with a delay of one command)
c : clear by read
@ -124,10 +126,33 @@
#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
#define R1_ERASE_RESET (1 << 13) /* sr, c */
#define R1_STATUS(x) (x & 0xFFFFE000)
#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
#define R1_APP_CMD (1 << 5) /* sr, c */
/*
* MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS
* R1 is the low order byte; R2 is the next highest byte, when present.
*/
#define R1_SPI_IDLE (1 << 0)
#define R1_SPI_ERASE_RESET (1 << 1)
#define R1_SPI_ILLEGAL_COMMAND (1 << 2)
#define R1_SPI_COM_CRC (1 << 3)
#define R1_SPI_ERASE_SEQ (1 << 4)
#define R1_SPI_ADDRESS (1 << 5)
#define R1_SPI_PARAMETER (1 << 6)
/* R1 bit 7 is always zero */
#define R2_SPI_CARD_LOCKED (1 << 8)
#define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */
#define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP
#define R2_SPI_ERROR (1 << 10)
#define R2_SPI_CC_ERROR (1 << 11)
#define R2_SPI_CARD_ECC_ERROR (1 << 12)
#define R2_SPI_WP_VIOLATION (1 << 13)
#define R2_SPI_ERASE_PARAM (1 << 14)
#define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */
#define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE
/* These are unpacked versions of the actual responses */
struct _mmc_csd {
@ -182,6 +207,7 @@ struct _mmc_csd {
*/
#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */
/* (CMD0,1,2,3,4,7,9,10,12,13,15) */
/* (and for SPI, CMD58,59) */
#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */
/* (CMD11) */
#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */
@ -227,6 +253,7 @@ struct _mmc_csd {
#define EXT_CSD_BUS_WIDTH 183 /* R/W */
#define EXT_CSD_HS_TIMING 185 /* R/W */
#define EXT_CSD_CARD_TYPE 196 /* RO */
#define EXT_CSD_REV 192 /* RO */
#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
/*

159
include/linux/mmc/sdio.h Normal file
View file

@ -0,0 +1,159 @@
/*
* include/linux/mmc/sdio.h
*
* Copyright 2006-2007 Pierre Ossman
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#ifndef MMC_SDIO_H
#define MMC_SDIO_H
/* SDIO commands type argument response */
#define SD_IO_SEND_OP_COND 5 /* bcr [23:0] OCR R4 */
#define SD_IO_RW_DIRECT 52 /* ac [31:0] See below R5 */
#define SD_IO_RW_EXTENDED 53 /* adtc [31:0] See below R5 */
/*
* SD_IO_RW_DIRECT argument format:
*
* [31] R/W flag
* [30:28] Function number
* [27] RAW flag
* [25:9] Register address
* [7:0] Data
*/
/*
* SD_IO_RW_EXTENDED argument format:
*
* [31] R/W flag
* [30:28] Function number
* [27] Block mode
* [26] Increment address
* [25:9] Register address
* [8:0] Byte/block count
*/
/*
SDIO status in R5
Type
e : error bit
s : status bit
r : detected and set for the actual command response
x : detected and set during command execution. the host must poll
the card by sending status command in order to read these bits.
Clear condition
a : according to the card state
b : always related to the previous command. Reception of
a valid command will clear it (with a delay of one command)
c : clear by read
*/
#define R5_COM_CRC_ERROR (1 << 15) /* er, b */
#define R5_ILLEGAL_COMMAND (1 << 14) /* er, b */
#define R5_ERROR (1 << 11) /* erx, c */
#define R5_FUNCTION_NUMBER (1 << 9) /* er, c */
#define R5_OUT_OF_RANGE (1 << 8) /* er, c */
#define R5_STATUS(x) (x & 0xCB00)
#define R5_IO_CURRENT_STATE(x) ((x & 0x3000) >> 12) /* s, b */
/*
* Card Common Control Registers (CCCR)
*/
#define SDIO_CCCR_CCCR 0x00
#define SDIO_CCCR_REV_1_00 0 /* CCCR/FBR Version 1.00 */
#define SDIO_CCCR_REV_1_10 1 /* CCCR/FBR Version 1.10 */
#define SDIO_CCCR_REV_1_20 2 /* CCCR/FBR Version 1.20 */
#define SDIO_SDIO_REV_1_00 0 /* SDIO Spec Version 1.00 */
#define SDIO_SDIO_REV_1_10 1 /* SDIO Spec Version 1.10 */
#define SDIO_SDIO_REV_1_20 2 /* SDIO Spec Version 1.20 */
#define SDIO_SDIO_REV_2_00 3 /* SDIO Spec Version 2.00 */
#define SDIO_CCCR_SD 0x01
#define SDIO_SD_REV_1_01 0 /* SD Physical Spec Version 1.01 */
#define SDIO_SD_REV_1_10 1 /* SD Physical Spec Version 1.10 */
#define SDIO_SD_REV_2_00 2 /* SD Physical Spec Version 2.00 */
#define SDIO_CCCR_IOEx 0x02
#define SDIO_CCCR_IORx 0x03
#define SDIO_CCCR_IENx 0x04 /* Function/Master Interrupt Enable */
#define SDIO_CCCR_INTx 0x05 /* Function Interrupt Pending */
#define SDIO_CCCR_ABORT 0x06 /* function abort/card reset */
#define SDIO_CCCR_IF 0x07 /* bus interface controls */
#define SDIO_BUS_WIDTH_1BIT 0x00
#define SDIO_BUS_WIDTH_4BIT 0x02
#define SDIO_BUS_CD_DISABLE 0x80 /* disable pull-up on DAT3 (pin 1) */
#define SDIO_CCCR_CAPS 0x08
#define SDIO_CCCR_CAP_SDC 0x01 /* can do CMD52 while data transfer */
#define SDIO_CCCR_CAP_SMB 0x02 /* can do multi-block xfers (CMD53) */
#define SDIO_CCCR_CAP_SRW 0x04 /* supports read-wait protocol */
#define SDIO_CCCR_CAP_SBS 0x08 /* supports suspend/resume */
#define SDIO_CCCR_CAP_S4MI 0x10 /* interrupt during 4-bit CMD53 */
#define SDIO_CCCR_CAP_E4MI 0x20 /* enable ints during 4-bit CMD53 */
#define SDIO_CCCR_CAP_LSC 0x40 /* low speed card */
#define SDIO_CCCR_CAP_4BLS 0x80 /* 4 bit low speed card */
#define SDIO_CCCR_CIS 0x09 /* common CIS pointer (3 bytes) */
/* Following 4 regs are valid only if SBS is set */
#define SDIO_CCCR_SUSPEND 0x0c
#define SDIO_CCCR_SELx 0x0d
#define SDIO_CCCR_EXECx 0x0e
#define SDIO_CCCR_READYx 0x0f
#define SDIO_CCCR_BLKSIZE 0x10
#define SDIO_CCCR_POWER 0x12
#define SDIO_POWER_SMPC 0x01 /* Supports Master Power Control */
#define SDIO_POWER_EMPC 0x02 /* Enable Master Power Control */
#define SDIO_CCCR_SPEED 0x13
#define SDIO_SPEED_SHS 0x01 /* Supports High-Speed mode */
#define SDIO_SPEED_EHS 0x02 /* Enable High-Speed mode */
/*
* Function Basic Registers (FBR)
*/
#define SDIO_FBR_BASE(f) ((f) * 0x100) /* base of function f's FBRs */
#define SDIO_FBR_STD_IF 0x00
#define SDIO_FBR_SUPPORTS_CSA 0x40 /* supports Code Storage Area */
#define SDIO_FBR_ENABLE_CSA 0x80 /* enable Code Storage Area */
#define SDIO_FBR_STD_IF_EXT 0x01
#define SDIO_FBR_POWER 0x02
#define SDIO_FBR_POWER_SPS 0x01 /* Supports Power Selection */
#define SDIO_FBR_POWER_EPS 0x02 /* Enable (low) Power Selection */
#define SDIO_FBR_CIS 0x09 /* CIS pointer (3 bytes) */
#define SDIO_FBR_CSA 0x0C /* CSA pointer (3 bytes) */
#define SDIO_FBR_CSA_DATA 0x0F
#define SDIO_FBR_BLKSIZE 0x10 /* block size (2 bytes) */
#endif

View file

@ -0,0 +1,153 @@
/*
* include/linux/mmc/sdio_func.h
*
* Copyright 2007 Pierre Ossman
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#ifndef MMC_SDIO_FUNC_H
#define MMC_SDIO_FUNC_H
#include <linux/device.h>
#include <linux/mod_devicetable.h>
struct mmc_card;
struct sdio_func;
typedef void (sdio_irq_handler_t)(struct sdio_func *);
/*
* SDIO function CIS tuple (unknown to the core)
*/
struct sdio_func_tuple {
struct sdio_func_tuple *next;
unsigned char code;
unsigned char size;
unsigned char data[0];
};
/*
* SDIO function devices
*/
struct sdio_func {
struct mmc_card *card; /* the card this device belongs to */
struct device dev; /* the device */
sdio_irq_handler_t *irq_handler; /* IRQ callback */
unsigned int num; /* function number */
unsigned char class; /* standard interface class */
unsigned short vendor; /* vendor id */
unsigned short device; /* device id */
unsigned max_blksize; /* maximum block size */
unsigned cur_blksize; /* current block size */
unsigned int state; /* function state */
#define SDIO_STATE_PRESENT (1<<0) /* present in sysfs */
u8 tmpbuf[4]; /* DMA:able scratch buffer */
unsigned num_info; /* number of info strings */
const char **info; /* info strings */
struct sdio_func_tuple *tuples;
};
#define sdio_func_present(f) ((f)->state & SDIO_STATE_PRESENT)
#define sdio_func_set_present(f) ((f)->state |= SDIO_STATE_PRESENT)
#define sdio_func_id(f) ((f)->dev.bus_id)
#define sdio_get_drvdata(f) dev_get_drvdata(&(f)->dev)
#define sdio_set_drvdata(f,d) dev_set_drvdata(&(f)->dev, d)
/*
* SDIO function device driver
*/
struct sdio_driver {
char *name;
const struct sdio_device_id *id_table;
int (*probe)(struct sdio_func *, const struct sdio_device_id *);
void (*remove)(struct sdio_func *);
struct device_driver drv;
};
/**
* SDIO_DEVICE - macro used to describe a specific SDIO device
* @vend: the 16 bit manufacturer code
* @dev: the 16 bit function id
*
* This macro is used to create a struct sdio_device_id that matches a
* specific device. The class field will be set to SDIO_ANY_ID.
*/
#define SDIO_DEVICE(vend,dev) \
.class = SDIO_ANY_ID, \
.vendor = (vend), .device = (dev)
/**
* SDIO_DEVICE_CLASS - macro used to describe a specific SDIO device class
* @dev_class: the 8 bit standard interface code
*
* This macro is used to create a struct sdio_device_id that matches a
* specific standard SDIO function type. The vendor and device fields will
* be set to SDIO_ANY_ID.
*/
#define SDIO_DEVICE_CLASS(dev_class) \
.class = (dev_class), \
.vendor = SDIO_ANY_ID, .device = SDIO_ANY_ID
extern int sdio_register_driver(struct sdio_driver *);
extern void sdio_unregister_driver(struct sdio_driver *);
/*
* SDIO I/O operations
*/
extern void sdio_claim_host(struct sdio_func *func);
extern void sdio_release_host(struct sdio_func *func);
extern int sdio_enable_func(struct sdio_func *func);
extern int sdio_disable_func(struct sdio_func *func);
extern int sdio_set_block_size(struct sdio_func *func, unsigned blksz);
extern int sdio_claim_irq(struct sdio_func *func, sdio_irq_handler_t *handler);
extern int sdio_release_irq(struct sdio_func *func);
extern unsigned char sdio_readb(struct sdio_func *func,
unsigned int addr, int *err_ret);
extern unsigned short sdio_readw(struct sdio_func *func,
unsigned int addr, int *err_ret);
extern unsigned long sdio_readl(struct sdio_func *func,
unsigned int addr, int *err_ret);
extern int sdio_memcpy_fromio(struct sdio_func *func, void *dst,
unsigned int addr, int count);
extern int sdio_readsb(struct sdio_func *func, void *dst,
unsigned int addr, int count);
extern void sdio_writeb(struct sdio_func *func, unsigned char b,
unsigned int addr, int *err_ret);
extern void sdio_writew(struct sdio_func *func, unsigned short b,
unsigned int addr, int *err_ret);
extern void sdio_writel(struct sdio_func *func, unsigned long b,
unsigned int addr, int *err_ret);
extern int sdio_memcpy_toio(struct sdio_func *func, unsigned int addr,
void *src, int count);
extern int sdio_writesb(struct sdio_func *func, unsigned int addr,
void *src, int count);
extern unsigned char sdio_f0_readb(struct sdio_func *func,
unsigned int addr, int *err_ret);
extern void sdio_f0_writeb(struct sdio_func *func, unsigned char b,
unsigned int addr, int *err_ret);
#endif

View file

@ -0,0 +1,23 @@
/*
* SDIO Classes, Interface Types, Manufacturer IDs, etc.
*/
#ifndef MMC_SDIO_IDS_H
#define MMC_SDIO_IDS_H
/*
* Standard SDIO Function Interfaces
*/
#define SDIO_CLASS_NONE 0x00 /* Not a SDIO standard interface */
#define SDIO_CLASS_UART 0x01 /* standard UART interface */
#define SDIO_CLASS_BT_A 0x02 /* Type-A BlueTooth std interface */
#define SDIO_CLASS_BT_B 0x03 /* Type-B BlueTooth std interface */
#define SDIO_CLASS_GPS 0x04 /* GPS standard interface */
#define SDIO_CLASS_CAMERA 0x05 /* Camera standard interface */
#define SDIO_CLASS_PHS 0x06 /* PHS standard interface */
#define SDIO_CLASS_WLAN 0x07 /* WLAN interface */
#define SDIO_CLASS_ATA 0x08 /* Embedded SDIO-ATA std interface */
#endif

View file

@ -340,4 +340,30 @@ struct parisc_device_id {
#define PA_HVERSION_ANY_ID 0xffff
#define PA_SVERSION_ANY_ID 0xffffffff
/* SDIO */
#define SDIO_ANY_ID (~0)
struct sdio_device_id {
__u8 class; /* Standard interface or SDIO_ANY_ID */
__u16 vendor; /* Vendor or SDIO_ANY_ID */
__u16 device; /* Device ID or SDIO_ANY_ID */
kernel_ulong_t driver_data; /* Data private to the driver */
};
/* SSB core, see drivers/ssb/ */
struct ssb_device_id {
__u16 vendor;
__u16 coreid;
__u8 revision;
};
#define SSB_DEVICE(_vendor, _coreid, _revision) \
{ .vendor = _vendor, .coreid = _coreid, .revision = _revision, }
#define SSB_DEVTABLE_END \
{ 0, },
#define SSB_ANY_VENDOR 0xFFFF
#define SSB_ANY_ID 0xFFFF
#define SSB_ANY_REV 0xFF
#endif /* LINUX_MOD_DEVICETABLE_H */

View file

@ -23,6 +23,7 @@
struct poll_table_struct;
struct inode;
struct net;
#define NPROTO 34 /* should be enough for now.. */
@ -169,7 +170,7 @@ struct proto_ops {
struct net_proto_family {
int family;
int (*create)(struct socket *sock, int protocol);
int (*create)(struct net *net, struct socket *sock, int protocol);
struct module *owner;
};

View file

@ -31,6 +31,7 @@
#ifdef __KERNEL__
#include <linux/timer.h>
#include <linux/delay.h>
#include <asm/atomic.h>
#include <asm/cache.h>
#include <asm/byteorder.h>
@ -38,6 +39,9 @@
#include <linux/device.h>
#include <linux/percpu.h>
#include <linux/dmaengine.h>
#include <linux/workqueue.h>
#include <net/net_namespace.h>
struct vlan_group;
struct ethtool_ops;
@ -246,6 +250,19 @@ struct hh_cache
#define LL_RESERVED_SPACE_EXTRA(dev,extra) \
((((dev)->hard_header_len+extra)&~(HH_DATA_MOD - 1)) + HH_DATA_MOD)
struct header_ops {
int (*create) (struct sk_buff *skb, struct net_device *dev,
unsigned short type, const void *daddr,
const void *saddr, unsigned len);
int (*parse)(const struct sk_buff *skb, unsigned char *haddr);
int (*rebuild)(struct sk_buff *skb);
#define HAVE_HEADER_CACHE
int (*cache)(const struct neighbour *neigh, struct hh_cache *hh);
void (*cache_update)(struct hh_cache *hh,
const struct net_device *dev,
const unsigned char *haddr);
};
/* These flag bits are private to the generic network queueing
* layer, they may not be explicitly referenced by any other
* code.
@ -258,7 +275,6 @@ enum netdev_state_t
__LINK_STATE_PRESENT,
__LINK_STATE_SCHED,
__LINK_STATE_NOCARRIER,
__LINK_STATE_RX_SCHED,
__LINK_STATE_LINKWATCH_PENDING,
__LINK_STATE_DORMANT,
__LINK_STATE_QDISC_RUNNING,
@ -277,6 +293,120 @@ struct netdev_boot_setup {
extern int __init netdev_boot_setup(char *str);
/*
* Structure for NAPI scheduling similar to tasklet but with weighting
*/
struct napi_struct {
/* The poll_list must only be managed by the entity which
* changes the state of the NAPI_STATE_SCHED bit. This means
* whoever atomically sets that bit can add this napi_struct
* to the per-cpu poll_list, and whoever clears that bit
* can remove from the list right before clearing the bit.
*/
struct list_head poll_list;
unsigned long state;
int weight;
int (*poll)(struct napi_struct *, int);
#ifdef CONFIG_NETPOLL
spinlock_t poll_lock;
int poll_owner;
struct net_device *dev;
struct list_head dev_list;
#endif
};
enum
{
NAPI_STATE_SCHED, /* Poll is scheduled */
};
extern void FASTCALL(__napi_schedule(struct napi_struct *n));
/**
* napi_schedule_prep - check if napi can be scheduled
* @n: napi context
*
* Test if NAPI routine is already running, and if not mark
* it as running. This is used as a condition variable
* insure only one NAPI poll instance runs
*/
static inline int napi_schedule_prep(struct napi_struct *n)
{
return !test_and_set_bit(NAPI_STATE_SCHED, &n->state);
}
/**
* napi_schedule - schedule NAPI poll
* @n: napi context
*
* Schedule NAPI poll routine to be called if it is not already
* running.
*/
static inline void napi_schedule(struct napi_struct *n)
{
if (napi_schedule_prep(n))
__napi_schedule(n);
}
/* Try to reschedule poll. Called by dev->poll() after napi_complete(). */
static inline int napi_reschedule(struct napi_struct *napi)
{
if (napi_schedule_prep(napi)) {
__napi_schedule(napi);
return 1;
}
return 0;
}
/**
* napi_complete - NAPI processing complete
* @n: napi context
*
* Mark NAPI processing as complete.
*/
static inline void __napi_complete(struct napi_struct *n)
{
BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
list_del(&n->poll_list);
smp_mb__before_clear_bit();
clear_bit(NAPI_STATE_SCHED, &n->state);
}
static inline void napi_complete(struct napi_struct *n)
{
local_irq_disable();
__napi_complete(n);
local_irq_enable();
}
/**
* napi_disable - prevent NAPI from scheduling
* @n: napi context
*
* Stop NAPI from being scheduled on this context.
* Waits till any outstanding processing completes.
*/
static inline void napi_disable(struct napi_struct *n)
{
while (test_and_set_bit(NAPI_STATE_SCHED, &n->state))
msleep_interruptible(1);
}
/**
* napi_enable - enable NAPI scheduling
* @n: napi context
*
* Resume NAPI from being scheduled on this context.
* Must be paired with napi_disable.
*/
static inline void napi_enable(struct napi_struct *n)
{
BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
smp_mb__before_clear_bit();
clear_bit(NAPI_STATE_SCHED, &n->state);
}
/*
* The DEVICE structure.
* Actually, this whole structure is a big mistake. It mixes I/O
@ -319,6 +449,9 @@ struct net_device
unsigned long state;
struct list_head dev_list;
#ifdef CONFIG_NETPOLL
struct list_head napi_list;
#endif
/* The device initialization function. Called only once. */
int (*init)(struct net_device *dev);
@ -339,8 +472,11 @@ struct net_device
#define NETIF_F_HW_VLAN_FILTER 512 /* Receive filtering on VLAN */
#define NETIF_F_VLAN_CHALLENGED 1024 /* Device cannot handle VLAN packets */
#define NETIF_F_GSO 2048 /* Enable software GSO. */
#define NETIF_F_LLTX 4096 /* LockLess TX */
#define NETIF_F_LLTX 4096 /* LockLess TX - deprecated. Please */
/* do not use LLTX in new drivers */
#define NETIF_F_NETNS_LOCAL 8192 /* Does not change network namespaces */
#define NETIF_F_MULTI_QUEUE 16384 /* Has multiple TX/RX queues */
#define NETIF_F_LRO 32768 /* large receive offload */
/* Segmentation offload features */
#define NETIF_F_GSO_SHIFT 16
@ -379,6 +515,9 @@ struct net_device
#endif
const struct ethtool_ops *ethtool_ops;
/* Hardware header description */
const struct header_ops *header_ops;
/*
* This marks the end of the "visible" part of the structure. All
* fields hereafter are internal to the system, and may change at
@ -430,12 +569,6 @@ struct net_device
/*
* Cache line mostly used on receive path (including eth_type_trans())
*/
struct list_head poll_list ____cacheline_aligned_in_smp;
/* Link to poll list */
int (*poll) (struct net_device *dev, int *quota);
int quota;
int weight;
unsigned long last_rx; /* Time of last Rx */
/* Interface address info used in eth_type_trans() */
unsigned char dev_addr[MAX_ADDR_LEN]; /* hw address, (before bcast
@ -508,13 +641,6 @@ struct net_device
int (*open)(struct net_device *dev);
int (*stop)(struct net_device *dev);
#define HAVE_NETDEV_POLL
int (*hard_header) (struct sk_buff *skb,
struct net_device *dev,
unsigned short type,
void *daddr,
void *saddr,
unsigned len);
int (*rebuild_header)(struct sk_buff *skb);
#define HAVE_CHANGE_RX_FLAGS
void (*change_rx_flags)(struct net_device *dev,
int flags);
@ -531,12 +657,6 @@ struct net_device
#define HAVE_SET_CONFIG
int (*set_config)(struct net_device *dev,
struct ifmap *map);
#define HAVE_HEADER_CACHE
int (*hard_header_cache)(struct neighbour *neigh,
struct hh_cache *hh);
void (*header_cache_update)(struct hh_cache *hh,
struct net_device *dev,
unsigned char * haddr);
#define HAVE_CHANGE_MTU
int (*change_mtu)(struct net_device *dev, int new_mtu);
@ -550,8 +670,6 @@ struct net_device
void (*vlan_rx_kill_vid)(struct net_device *dev,
unsigned short vid);
int (*hard_header_parse)(struct sk_buff *skb,
unsigned char *haddr);
int (*neigh_setup)(struct net_device *dev, struct neigh_parms *);
#ifdef CONFIG_NETPOLL
struct netpoll_info *npinfo;
@ -560,6 +678,9 @@ struct net_device
void (*poll_controller)(struct net_device *dev);
#endif
/* Network namespace this network device is inside */
struct net *nd_net;
/* bridge stuff */
struct net_bridge_port *br_port;
/* macvlan */
@ -582,17 +703,39 @@ struct net_device
#define NETDEV_ALIGN 32
#define NETDEV_ALIGN_CONST (NETDEV_ALIGN - 1)
/**
* netdev_priv - access network device private data
* @dev: network device
*
* Get network device private data
*/
static inline void *netdev_priv(const struct net_device *dev)
{
return dev->priv;
}
#define SET_MODULE_OWNER(dev) do { } while (0)
/* Set the sysfs physical device reference for the network logical device
* if set prior to registration will cause a symlink during initialization.
*/
#define SET_NETDEV_DEV(net, pdev) ((net)->dev.parent = (pdev))
static inline void netif_napi_add(struct net_device *dev,
struct napi_struct *napi,
int (*poll)(struct napi_struct *, int),
int weight)
{
INIT_LIST_HEAD(&napi->poll_list);
napi->poll = poll;
napi->weight = weight;
#ifdef CONFIG_NETPOLL
napi->dev = dev;
list_add(&napi->dev_list, &dev->napi_list);
spin_lock_init(&napi->poll_lock);
napi->poll_owner = -1;
#endif
set_bit(NAPI_STATE_SCHED, &napi->state);
}
struct packet_type {
__be16 type; /* This is really htons(ether_type). */
struct net_device *dev; /* NULL is wildcarded here */
@ -610,45 +753,46 @@ struct packet_type {
#include <linux/interrupt.h>
#include <linux/notifier.h>
extern struct net_device loopback_dev; /* The loopback */
extern struct list_head dev_base_head; /* All devices */
extern rwlock_t dev_base_lock; /* Device list lock */
#define for_each_netdev(d) \
list_for_each_entry(d, &dev_base_head, dev_list)
#define for_each_netdev_safe(d, n) \
list_for_each_entry_safe(d, n, &dev_base_head, dev_list)
#define for_each_netdev_continue(d) \
list_for_each_entry_continue(d, &dev_base_head, dev_list)
#define for_each_netdev(net, d) \
list_for_each_entry(d, &(net)->dev_base_head, dev_list)
#define for_each_netdev_safe(net, d, n) \
list_for_each_entry_safe(d, n, &(net)->dev_base_head, dev_list)
#define for_each_netdev_continue(net, d) \
list_for_each_entry_continue(d, &(net)->dev_base_head, dev_list)
#define net_device_entry(lh) list_entry(lh, struct net_device, dev_list)
static inline struct net_device *next_net_device(struct net_device *dev)
{
struct list_head *lh;
struct net *net;
net = dev->nd_net;
lh = dev->dev_list.next;
return lh == &dev_base_head ? NULL : net_device_entry(lh);
return lh == &net->dev_base_head ? NULL : net_device_entry(lh);
}
static inline struct net_device *first_net_device(void)
static inline struct net_device *first_net_device(struct net *net)
{
return list_empty(&dev_base_head) ? NULL :
net_device_entry(dev_base_head.next);
return list_empty(&net->dev_base_head) ? NULL :
net_device_entry(net->dev_base_head.next);
}
extern int netdev_boot_setup_check(struct net_device *dev);
extern unsigned long netdev_boot_base(const char *prefix, int unit);
extern struct net_device *dev_getbyhwaddr(unsigned short type, char *hwaddr);
extern struct net_device *dev_getfirstbyhwtype(unsigned short type);
extern struct net_device *__dev_getfirstbyhwtype(unsigned short type);
extern struct net_device *dev_getbyhwaddr(struct net *net, unsigned short type, char *hwaddr);
extern struct net_device *dev_getfirstbyhwtype(struct net *net, unsigned short type);
extern struct net_device *__dev_getfirstbyhwtype(struct net *net, unsigned short type);
extern void dev_add_pack(struct packet_type *pt);
extern void dev_remove_pack(struct packet_type *pt);
extern void __dev_remove_pack(struct packet_type *pt);
extern struct net_device *dev_get_by_flags(unsigned short flags,
extern struct net_device *dev_get_by_flags(struct net *net, unsigned short flags,
unsigned short mask);
extern struct net_device *dev_get_by_name(const char *name);
extern struct net_device *__dev_get_by_name(const char *name);
extern struct net_device *dev_get_by_name(struct net *net, const char *name);
extern struct net_device *__dev_get_by_name(struct net *net, const char *name);
extern int dev_alloc_name(struct net_device *dev, const char *name);
extern int dev_open(struct net_device *dev);
extern int dev_close(struct net_device *dev);
@ -659,14 +803,35 @@ extern void free_netdev(struct net_device *dev);
extern void synchronize_net(void);
extern int register_netdevice_notifier(struct notifier_block *nb);
extern int unregister_netdevice_notifier(struct notifier_block *nb);
extern int call_netdevice_notifiers(unsigned long val, void *v);
extern struct net_device *dev_get_by_index(int ifindex);
extern struct net_device *__dev_get_by_index(int ifindex);
extern int call_netdevice_notifiers(unsigned long val, struct net_device *dev);
extern struct net_device *dev_get_by_index(struct net *net, int ifindex);
extern struct net_device *__dev_get_by_index(struct net *net, int ifindex);
extern int dev_restart(struct net_device *dev);
#ifdef CONFIG_NETPOLL_TRAP
extern int netpoll_trap(void);
#endif
static inline int dev_hard_header(struct sk_buff *skb, struct net_device *dev,
unsigned short type,
const void *daddr, const void *saddr,
unsigned len)
{
if (!dev->header_ops)
return 0;
return dev->header_ops->create(skb, dev, type, daddr, saddr, len);
}
static inline int dev_parse_header(const struct sk_buff *skb,
unsigned char *haddr)
{
const struct net_device *dev = skb->dev;
if (!dev->header_ops->parse)
return 0;
return dev->header_ops->parse(skb, haddr);
}
typedef int gifconf_func_t(struct net_device * dev, char __user * bufptr, int len);
extern int register_gifconf(unsigned int family, gifconf_func_t * gifconf);
static inline int unregister_gifconf(unsigned int family)
@ -678,7 +843,6 @@ static inline int unregister_gifconf(unsigned int family)
* Incoming packets are placed on per-cpu queues so that
* no locking is needed.
*/
struct softnet_data
{
struct net_device *output_queue;
@ -686,7 +850,7 @@ struct softnet_data
struct list_head poll_list;
struct sk_buff *completion_queue;
struct net_device backlog_dev; /* Sorry. 8) */
struct napi_struct backlog;
#ifdef CONFIG_NET_DMA
struct dma_chan *net_dma;
#endif
@ -704,11 +868,24 @@ static inline void netif_schedule(struct net_device *dev)
__netif_schedule(dev);
}
/**
* netif_start_queue - allow transmit
* @dev: network device
*
* Allow upper layers to call the device hard_start_xmit routine.
*/
static inline void netif_start_queue(struct net_device *dev)
{
clear_bit(__LINK_STATE_XOFF, &dev->state);
}
/**
* netif_wake_queue - restart transmit
* @dev: network device
*
* Allow upper layers to call the device hard_start_xmit routine.
* Used for flow control when transmit resources are available.
*/
static inline void netif_wake_queue(struct net_device *dev)
{
#ifdef CONFIG_NETPOLL_TRAP
@ -721,16 +898,35 @@ static inline void netif_wake_queue(struct net_device *dev)
__netif_schedule(dev);
}
/**
* netif_stop_queue - stop transmitted packets
* @dev: network device
*
* Stop upper layers calling the device hard_start_xmit routine.
* Used for flow control when transmit resources are unavailable.
*/
static inline void netif_stop_queue(struct net_device *dev)
{
set_bit(__LINK_STATE_XOFF, &dev->state);
}
/**
* netif_queue_stopped - test if transmit queue is flowblocked
* @dev: network device
*
* Test if transmit queue on device is currently unable to send.
*/
static inline int netif_queue_stopped(const struct net_device *dev)
{
return test_bit(__LINK_STATE_XOFF, &dev->state);
}
/**
* netif_running - test if up
* @dev: network device
*
* Test if the device has been brought up.
*/
static inline int netif_running(const struct net_device *dev)
{
return test_bit(__LINK_STATE_START, &dev->state);
@ -742,6 +938,14 @@ static inline int netif_running(const struct net_device *dev)
* done at the overall netdevice level.
* Also test the device if we're multiqueue.
*/
/**
* netif_start_subqueue - allow sending packets on subqueue
* @dev: network device
* @queue_index: sub queue index
*
* Start individual transmit queue of a device with multiple transmit queues.
*/
static inline void netif_start_subqueue(struct net_device *dev, u16 queue_index)
{
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
@ -749,6 +953,13 @@ static inline void netif_start_subqueue(struct net_device *dev, u16 queue_index)
#endif
}
/**
* netif_stop_subqueue - stop sending packets on subqueue
* @dev: network device
* @queue_index: sub queue index
*
* Stop individual transmit queue of a device with multiple transmit queues.
*/
static inline void netif_stop_subqueue(struct net_device *dev, u16 queue_index)
{
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
@ -760,6 +971,13 @@ static inline void netif_stop_subqueue(struct net_device *dev, u16 queue_index)
#endif
}
/**
* netif_subqueue_stopped - test status of subqueue
* @dev: network device
* @queue_index: sub queue index
*
* Check individual transmit queue of a device with multiple transmit queues.
*/
static inline int netif_subqueue_stopped(const struct net_device *dev,
u16 queue_index)
{
@ -771,6 +989,14 @@ static inline int netif_subqueue_stopped(const struct net_device *dev,
#endif
}
/**
* netif_wake_subqueue - allow sending packets on subqueue
* @dev: network device
* @queue_index: sub queue index
*
* Resume individual transmit queue of a device with multiple transmit queues.
*/
static inline void netif_wake_subqueue(struct net_device *dev, u16 queue_index)
{
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
@ -784,6 +1010,13 @@ static inline void netif_wake_subqueue(struct net_device *dev, u16 queue_index)
#endif
}
/**
* netif_is_multiqueue - test if device has multiple transmit queues
* @dev: network device
*
* Check if device has multiple transmit queues
* Always falls if NETDEVICE_MULTIQUEUE is not configured
*/
static inline int netif_is_multiqueue(const struct net_device *dev)
{
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
@ -796,20 +1029,7 @@ static inline int netif_is_multiqueue(const struct net_device *dev)
/* Use this variant when it is known for sure that it
* is executing from interrupt context.
*/
static inline void dev_kfree_skb_irq(struct sk_buff *skb)
{
if (atomic_dec_and_test(&skb->users)) {
struct softnet_data *sd;
unsigned long flags;
local_irq_save(flags);
sd = &__get_cpu_var(softnet_data);
skb->next = sd->completion_queue;
sd->completion_queue = skb;
raise_softirq_irqoff(NET_TX_SOFTIRQ);
local_irq_restore(flags);
}
}
extern void dev_kfree_skb_irq(struct sk_buff *skb);
/* Use this variant in places where it could be invoked
* either from interrupt or non-interrupt context.
@ -822,29 +1042,41 @@ extern int netif_rx_ni(struct sk_buff *skb);
#define HAVE_NETIF_RECEIVE_SKB 1
extern int netif_receive_skb(struct sk_buff *skb);
extern int dev_valid_name(const char *name);
extern int dev_ioctl(unsigned int cmd, void __user *);
extern int dev_ethtool(struct ifreq *);
extern int dev_ioctl(struct net *net, unsigned int cmd, void __user *);
extern int dev_ethtool(struct net *net, struct ifreq *);
extern unsigned dev_get_flags(const struct net_device *);
extern int dev_change_flags(struct net_device *, unsigned);
extern int dev_change_name(struct net_device *, char *);
extern int dev_change_net_namespace(struct net_device *,
struct net *, const char *);
extern int dev_set_mtu(struct net_device *, int);
extern int dev_set_mac_address(struct net_device *,
struct sockaddr *);
extern int dev_hard_start_xmit(struct sk_buff *skb,
struct net_device *dev);
extern void dev_init(void);
extern int netdev_budget;
/* Called by rtnetlink.c:rtnl_unlock() */
extern void netdev_run_todo(void);
/**
* dev_put - release reference to device
* @dev: network device
*
* Release reference to device to allow it to be freed.
*/
static inline void dev_put(struct net_device *dev)
{
atomic_dec(&dev->refcnt);
}
/**
* dev_hold - get reference to device
* @dev: network device
*
* Hold reference to device to keep it from being freed.
*/
static inline void dev_hold(struct net_device *dev)
{
atomic_inc(&dev->refcnt);
@ -861,6 +1093,12 @@ static inline void dev_hold(struct net_device *dev)
extern void linkwatch_fire_event(struct net_device *dev);
/**
* netif_carrier_ok - test if carrier present
* @dev: network device
*
* Check if carrier is present on device
*/
static inline int netif_carrier_ok(const struct net_device *dev)
{
return !test_bit(__LINK_STATE_NOCARRIER, &dev->state);
@ -872,30 +1110,66 @@ extern void netif_carrier_on(struct net_device *dev);
extern void netif_carrier_off(struct net_device *dev);
/**
* netif_dormant_on - mark device as dormant.
* @dev: network device
*
* Mark device as dormant (as per RFC2863).
*
* The dormant state indicates that the relevant interface is not
* actually in a condition to pass packets (i.e., it is not 'up') but is
* in a "pending" state, waiting for some external event. For "on-
* demand" interfaces, this new state identifies the situation where the
* interface is waiting for events to place it in the up state.
*
*/
static inline void netif_dormant_on(struct net_device *dev)
{
if (!test_and_set_bit(__LINK_STATE_DORMANT, &dev->state))
linkwatch_fire_event(dev);
}
/**
* netif_dormant_off - set device as not dormant.
* @dev: network device
*
* Device is not in dormant state.
*/
static inline void netif_dormant_off(struct net_device *dev)
{
if (test_and_clear_bit(__LINK_STATE_DORMANT, &dev->state))
linkwatch_fire_event(dev);
}
/**
* netif_dormant - test if carrier present
* @dev: network device
*
* Check if carrier is present on device
*/
static inline int netif_dormant(const struct net_device *dev)
{
return test_bit(__LINK_STATE_DORMANT, &dev->state);
}
/**
* netif_oper_up - test if device is operational
* @dev: network device
*
* Check if carrier is operational
*/
static inline int netif_oper_up(const struct net_device *dev) {
return (dev->operstate == IF_OPER_UP ||
dev->operstate == IF_OPER_UNKNOWN /* backward compat */);
}
/* Hot-plugging. */
/**
* netif_device_present - is device available or removed
* @dev: network device
*
* Check if device has not been removed from system.
*/
static inline int netif_device_present(struct net_device *dev)
{
return test_bit(__LINK_STATE_PRESENT, &dev->state);
@ -955,46 +1229,38 @@ static inline u32 netif_msg_init(int debug_value, int default_msg_enable_bits)
return (1 << debug_value) - 1;
}
/* Test if receive needs to be scheduled */
static inline int __netif_rx_schedule_prep(struct net_device *dev)
{
return !test_and_set_bit(__LINK_STATE_RX_SCHED, &dev->state);
}
/* Test if receive needs to be scheduled but only if up */
static inline int netif_rx_schedule_prep(struct net_device *dev)
static inline int netif_rx_schedule_prep(struct net_device *dev,
struct napi_struct *napi)
{
return netif_running(dev) && __netif_rx_schedule_prep(dev);
return netif_running(dev) && napi_schedule_prep(napi);
}
/* Add interface to tail of rx poll list. This assumes that _prep has
* already been called and returned 1.
*/
extern void __netif_rx_schedule(struct net_device *dev);
static inline void __netif_rx_schedule(struct net_device *dev,
struct napi_struct *napi)
{
dev_hold(dev);
__napi_schedule(napi);
}
/* Try to reschedule poll. Called by irq handler. */
static inline void netif_rx_schedule(struct net_device *dev)
static inline void netif_rx_schedule(struct net_device *dev,
struct napi_struct *napi)
{
if (netif_rx_schedule_prep(dev))
__netif_rx_schedule(dev);
if (netif_rx_schedule_prep(dev, napi))
__netif_rx_schedule(dev, napi);
}
/* Try to reschedule poll. Called by dev->poll() after netif_rx_complete().
* Do not inline this?
*/
static inline int netif_rx_reschedule(struct net_device *dev, int undo)
/* Try to reschedule poll. Called by dev->poll() after netif_rx_complete(). */
static inline int netif_rx_reschedule(struct net_device *dev,
struct napi_struct *napi)
{
if (netif_rx_schedule_prep(dev)) {
unsigned long flags;
dev->quota += undo;
local_irq_save(flags);
list_add_tail(&dev->poll_list, &__get_cpu_var(softnet_data).poll_list);
__raise_softirq_irqoff(NET_RX_SOFTIRQ);
local_irq_restore(flags);
if (napi_schedule_prep(napi)) {
__netif_rx_schedule(dev, napi);
return 1;
}
return 0;
@ -1003,12 +1269,11 @@ static inline int netif_rx_reschedule(struct net_device *dev, int undo)
/* same as netif_rx_complete, except that local_irq_save(flags)
* has already been issued
*/
static inline void __netif_rx_complete(struct net_device *dev)
static inline void __netif_rx_complete(struct net_device *dev,
struct napi_struct *napi)
{
BUG_ON(!test_bit(__LINK_STATE_RX_SCHED, &dev->state));
list_del(&dev->poll_list);
smp_mb__before_clear_bit();
clear_bit(__LINK_STATE_RX_SCHED, &dev->state);
__napi_complete(napi);
dev_put(dev);
}
/* Remove interface from poll list: it must be in the poll list
@ -1016,32 +1281,31 @@ static inline void __netif_rx_complete(struct net_device *dev)
* it completes the work. The device cannot be out of poll list at this
* moment, it is BUG().
*/
static inline void netif_rx_complete(struct net_device *dev)
static inline void netif_rx_complete(struct net_device *dev,
struct napi_struct *napi)
{
unsigned long flags;
local_irq_save(flags);
__netif_rx_complete(dev);
__netif_rx_complete(dev, napi);
local_irq_restore(flags);
}
static inline void netif_poll_disable(struct net_device *dev)
/**
* netif_tx_lock - grab network device transmit lock
* @dev: network device
*
* Get network device transmit lock
*/
static inline void __netif_tx_lock(struct net_device *dev, int cpu)
{
while (test_and_set_bit(__LINK_STATE_RX_SCHED, &dev->state))
/* No hurry. */
schedule_timeout_interruptible(1);
}
static inline void netif_poll_enable(struct net_device *dev)
{
smp_mb__before_clear_bit();
clear_bit(__LINK_STATE_RX_SCHED, &dev->state);
spin_lock(&dev->_xmit_lock);
dev->xmit_lock_owner = cpu;
}
static inline void netif_tx_lock(struct net_device *dev)
{
spin_lock(&dev->_xmit_lock);
dev->xmit_lock_owner = smp_processor_id();
__netif_tx_lock(dev, smp_processor_id());
}
static inline void netif_tx_lock_bh(struct net_device *dev)
@ -1070,6 +1334,18 @@ static inline void netif_tx_unlock_bh(struct net_device *dev)
spin_unlock_bh(&dev->_xmit_lock);
}
#define HARD_TX_LOCK(dev, cpu) { \
if ((dev->features & NETIF_F_LLTX) == 0) { \
__netif_tx_lock(dev, cpu); \
} \
}
#define HARD_TX_UNLOCK(dev) { \
if ((dev->features & NETIF_F_LLTX) == 0) { \
netif_tx_unlock(dev); \
} \
}
static inline void netif_tx_disable(struct net_device *dev)
{
netif_tx_lock_bh(dev);
@ -1105,7 +1381,7 @@ extern void dev_set_allmulti(struct net_device *dev, int inc);
extern void netdev_state_change(struct net_device *dev);
extern void netdev_features_change(struct net_device *dev);
/* Load a device via the kmod */
extern void dev_load(const char *name);
extern void dev_load(struct net *net, const char *name);
extern void dev_mcast_init(void);
extern int netdev_max_backlog;
extern int weight_p;

View file

@ -40,5 +40,6 @@ unifdef-y += nf_conntrack_common.h
unifdef-y += nf_conntrack_ftp.h
unifdef-y += nf_conntrack_tcp.h
unifdef-y += nfnetlink.h
unifdef-y += nfnetlink_compat.h
unifdef-y += x_tables.h
unifdef-y += xt_physdev.h

View file

@ -1,16 +1,7 @@
#ifndef _NFNETLINK_H
#define _NFNETLINK_H
#include <linux/types.h>
#ifndef __KERNEL__
/* nfnetlink groups: Up to 32 maximum - backwards compatibility for userspace */
#define NF_NETLINK_CONNTRACK_NEW 0x00000001
#define NF_NETLINK_CONNTRACK_UPDATE 0x00000002
#define NF_NETLINK_CONNTRACK_DESTROY 0x00000004
#define NF_NETLINK_CONNTRACK_EXP_NEW 0x00000008
#define NF_NETLINK_CONNTRACK_EXP_UPDATE 0x00000010
#define NF_NETLINK_CONNTRACK_EXP_DESTROY 0x00000020
#endif
#include <linux/netfilter/nfnetlink_compat.h>
enum nfnetlink_groups {
NFNLGRP_NONE,
@ -31,48 +22,6 @@ enum nfnetlink_groups {
};
#define NFNLGRP_MAX (__NFNLGRP_MAX - 1)
/* Generic structure for encapsulation optional netfilter information.
* It is reminiscent of sockaddr, but with sa_family replaced
* with attribute type.
* ! This should someday be put somewhere generic as now rtnetlink and
* ! nfnetlink use the same attributes methods. - J. Schulist.
*/
struct nfattr
{
u_int16_t nfa_len;
u_int16_t nfa_type; /* we use 15 bits for the type, and the highest
* bit to indicate whether the payload is nested */
};
/* FIXME: Apart from NFNL_NFA_NESTED shamelessly copy and pasted from
* rtnetlink.h, it's time to put this in a generic file */
#define NFNL_NFA_NEST 0x8000
#define NFA_TYPE(attr) ((attr)->nfa_type & 0x7fff)
#define NFA_ALIGNTO 4
#define NFA_ALIGN(len) (((len) + NFA_ALIGNTO - 1) & ~(NFA_ALIGNTO - 1))
#define NFA_OK(nfa,len) ((len) > 0 && (nfa)->nfa_len >= sizeof(struct nfattr) \
&& (nfa)->nfa_len <= (len))
#define NFA_NEXT(nfa,attrlen) ((attrlen) -= NFA_ALIGN((nfa)->nfa_len), \
(struct nfattr *)(((char *)(nfa)) + NFA_ALIGN((nfa)->nfa_len)))
#define NFA_LENGTH(len) (NFA_ALIGN(sizeof(struct nfattr)) + (len))
#define NFA_SPACE(len) NFA_ALIGN(NFA_LENGTH(len))
#define NFA_DATA(nfa) ((void *)(((char *)(nfa)) + NFA_LENGTH(0)))
#define NFA_PAYLOAD(nfa) ((int)((nfa)->nfa_len) - NFA_LENGTH(0))
#define NFA_NEST(skb, type) \
({ struct nfattr *__start = (struct nfattr *)skb_tail_pointer(skb); \
NFA_PUT(skb, (NFNL_NFA_NEST | type), 0, NULL); \
__start; })
#define NFA_NEST_END(skb, start) \
({ (start)->nfa_len = skb_tail_pointer(skb) - (unsigned char *)(start); \
(skb)->len; })
#define NFA_NEST_CANCEL(skb, start) \
({ if (start) \
skb_trim(skb, (unsigned char *) (start) - (skb)->data); \
-1; })
/* General form of address family dependent message.
*/
struct nfgenmsg {
@ -83,10 +32,6 @@ struct nfgenmsg {
#define NFNETLINK_V0 0
#define NFM_NFA(n) ((struct nfattr *)(((char *)(n)) \
+ NLMSG_ALIGN(sizeof(struct nfgenmsg))))
#define NFM_PAYLOAD(n) NLMSG_PAYLOAD(n, sizeof(struct nfgenmsg))
/* netfilter netlink message types are split in two pieces:
* 8 bit subsystem, 8bit operation.
*/
@ -107,49 +52,26 @@ struct nfgenmsg {
#include <linux/netlink.h>
#include <linux/capability.h>
#include <net/netlink.h>
struct nfnl_callback
{
int (*call)(struct sock *nl, struct sk_buff *skb,
struct nlmsghdr *nlh, struct nfattr *cda[]);
u_int16_t attr_count; /* number of nfattr's */
struct nlmsghdr *nlh, struct nlattr *cda[]);
const struct nla_policy *policy; /* netlink attribute policy */
const u_int16_t attr_count; /* number of nlattr's */
};
struct nfnetlink_subsystem
{
const char *name;
__u8 subsys_id; /* nfnetlink subsystem ID */
__u8 cb_count; /* number of callbacks */
struct nfnl_callback *cb; /* callback for individual types */
__u8 subsys_id; /* nfnetlink subsystem ID */
__u8 cb_count; /* number of callbacks */
const struct nfnl_callback *cb; /* callback for individual types */
};
extern void __nfa_fill(struct sk_buff *skb, int attrtype,
int attrlen, const void *data);
#define NFA_PUT(skb, attrtype, attrlen, data) \
({ if (skb_tailroom(skb) < (int)NFA_SPACE(attrlen)) goto nfattr_failure; \
__nfa_fill(skb, attrtype, attrlen, data); })
extern int nfnetlink_subsys_register(struct nfnetlink_subsystem *n);
extern int nfnetlink_subsys_unregister(struct nfnetlink_subsystem *n);
extern void nfattr_parse(struct nfattr *tb[], int maxattr,
struct nfattr *nfa, int len);
#define nfattr_parse_nested(tb, max, nfa) \
nfattr_parse((tb), (max), NFA_DATA((nfa)), NFA_PAYLOAD((nfa)))
#define nfattr_bad_size(tb, max, cta_min) \
({ int __i, __res = 0; \
for (__i=0; __i<max; __i++) { \
if (!cta_min[__i]) \
continue; \
if (tb[__i] && NFA_PAYLOAD(tb[__i]) < cta_min[__i]){ \
__res = 1; \
break; \
} \
} \
__res; \
})
extern int nfnetlink_subsys_register(const struct nfnetlink_subsystem *n);
extern int nfnetlink_subsys_unregister(const struct nfnetlink_subsystem *n);
extern int nfnetlink_has_listeners(unsigned int group);
extern int nfnetlink_send(struct sk_buff *skb, u32 pid, unsigned group,

View file

@ -0,0 +1,61 @@
#ifndef _NFNETLINK_COMPAT_H
#define _NFNETLINK_COMPAT_H
#ifndef __KERNEL
/* Old nfnetlink macros for userspace */
/* nfnetlink groups: Up to 32 maximum */
#define NF_NETLINK_CONNTRACK_NEW 0x00000001
#define NF_NETLINK_CONNTRACK_UPDATE 0x00000002
#define NF_NETLINK_CONNTRACK_DESTROY 0x00000004
#define NF_NETLINK_CONNTRACK_EXP_NEW 0x00000008
#define NF_NETLINK_CONNTRACK_EXP_UPDATE 0x00000010
#define NF_NETLINK_CONNTRACK_EXP_DESTROY 0x00000020
/* Generic structure for encapsulation optional netfilter information.
* It is reminiscent of sockaddr, but with sa_family replaced
* with attribute type.
* ! This should someday be put somewhere generic as now rtnetlink and
* ! nfnetlink use the same attributes methods. - J. Schulist.
*/
struct nfattr
{
u_int16_t nfa_len;
u_int16_t nfa_type; /* we use 15 bits for the type, and the highest
* bit to indicate whether the payload is nested */
};
/* FIXME: Apart from NFNL_NFA_NESTED shamelessly copy and pasted from
* rtnetlink.h, it's time to put this in a generic file */
#define NFNL_NFA_NEST 0x8000
#define NFA_TYPE(attr) ((attr)->nfa_type & 0x7fff)
#define NFA_ALIGNTO 4
#define NFA_ALIGN(len) (((len) + NFA_ALIGNTO - 1) & ~(NFA_ALIGNTO - 1))
#define NFA_OK(nfa,len) ((len) > 0 && (nfa)->nfa_len >= sizeof(struct nfattr) \
&& (nfa)->nfa_len <= (len))
#define NFA_NEXT(nfa,attrlen) ((attrlen) -= NFA_ALIGN((nfa)->nfa_len), \
(struct nfattr *)(((char *)(nfa)) + NFA_ALIGN((nfa)->nfa_len)))
#define NFA_LENGTH(len) (NFA_ALIGN(sizeof(struct nfattr)) + (len))
#define NFA_SPACE(len) NFA_ALIGN(NFA_LENGTH(len))
#define NFA_DATA(nfa) ((void *)(((char *)(nfa)) + NFA_LENGTH(0)))
#define NFA_PAYLOAD(nfa) ((int)((nfa)->nfa_len) - NFA_LENGTH(0))
#define NFA_NEST(skb, type) \
({ struct nfattr *__start = (struct nfattr *)skb_tail_pointer(skb); \
NFA_PUT(skb, (NFNL_NFA_NEST | type), 0, NULL); \
__start; })
#define NFA_NEST_END(skb, start) \
({ (start)->nfa_len = skb_tail_pointer(skb) - (unsigned char *)(start); \
(skb)->len; })
#define NFA_NEST_CANCEL(skb, start) \
({ if (start) \
skb_trim(skb, (unsigned char *) (start) - (skb)->data); \
-1; })
#define NFM_NFA(n) ((struct nfattr *)(((char *)(n)) \
+ NLMSG_ALIGN(sizeof(struct nfgenmsg))))
#define NFM_PAYLOAD(n) NLMSG_PAYLOAD(n, sizeof(struct nfgenmsg))
#endif /* ! __KERNEL__ */
#endif /* _NFNETLINK_COMPAT_H */

View file

@ -36,6 +36,7 @@ enum ctattr_type {
CTA_USE,
CTA_ID,
CTA_NAT_DST,
CTA_TUPLE_MASTER,
__CTA_MAX
};
#define CTA_MAX (__CTA_MAX - 1)

View file

@ -0,0 +1,25 @@
#ifndef _XT_TIME_H
#define _XT_TIME_H 1
struct xt_time_info {
u_int32_t date_start;
u_int32_t date_stop;
u_int32_t daytime_start;
u_int32_t daytime_stop;
u_int32_t monthdays_match;
u_int8_t weekdays_match;
u_int8_t flags;
};
enum {
/* Match against local time (instead of UTC) */
XT_TIME_LOCAL_TZ = 1 << 0,
/* Shortcuts */
XT_TIME_ALL_MONTHDAYS = 0xFFFFFFFE,
XT_TIME_ALL_WEEKDAYS = 0xFE,
XT_TIME_MIN_DAYTIME = 0,
XT_TIME_MAX_DAYTIME = 24 * 60 * 60 - 1,
};
#endif /* _XT_TIME_H */

View file

@ -27,6 +27,8 @@
#define MAX_LINKS 32
struct net;
struct sockaddr_nl
{
sa_family_t nl_family; /* AF_NETLINK */
@ -129,6 +131,20 @@ struct nlattr
__u16 nla_type;
};
/*
* nla_type (16 bits)
* +---+---+-------------------------------+
* | N | O | Attribute Type |
* +---+---+-------------------------------+
* N := Carries nested attributes
* O := Payload stored in network byte order
*
* Note: The N and O flag are mutually exclusive.
*/
#define NLA_F_NESTED (1 << 15)
#define NLA_F_NET_BYTEORDER (1 << 14)
#define NLA_TYPE_MASK ~(NLA_F_NESTED | NLA_F_NET_BYTEORDER)
#define NLA_ALIGNTO 4
#define NLA_ALIGN(len) (((len) + NLA_ALIGNTO - 1) & ~(NLA_ALIGNTO - 1))
#define NLA_HDRLEN ((int) NLA_ALIGN(sizeof(struct nlattr)))
@ -157,8 +173,9 @@ struct netlink_skb_parms
#define NETLINK_CREDS(skb) (&NETLINK_CB((skb)).creds)
extern struct sock *netlink_kernel_create(int unit, unsigned int groups,
void (*input)(struct sock *sk, int len),
extern struct sock *netlink_kernel_create(struct net *net,
int unit,unsigned int groups,
void (*input)(struct sk_buff *skb),
struct mutex *cb_mutex,
struct module *module);
extern int netlink_change_ngroups(struct sock *sk, unsigned int groups);
@ -177,7 +194,7 @@ struct sock *netlink_getsockbyfilp(struct file *filp);
int netlink_attachskb(struct sock *sk, struct sk_buff *skb, int nonblock,
long timeo, struct sock *ssk);
void netlink_detachskb(struct sock *sk, struct sk_buff *skb);
int netlink_sendskb(struct sock *sk, struct sk_buff *skb, int protocol);
int netlink_sendskb(struct sock *sk, struct sk_buff *skb);
/*
* skb should fit one page. This choice is good for headerless malloc.
@ -206,6 +223,7 @@ struct netlink_callback
struct netlink_notify
{
struct net *net;
int pid;
int protocol;
};

View file

@ -25,8 +25,6 @@ struct netpoll {
struct netpoll_info {
atomic_t refcnt;
spinlock_t poll_lock;
int poll_owner;
int rx_flags;
spinlock_t rx_lock;
struct netpoll *rx_np; /* netpoll that registered an rx_hook */
@ -37,6 +35,7 @@ struct netpoll_info {
void netpoll_poll(struct netpoll *np);
void netpoll_send_udp(struct netpoll *np, const char *msg, int len);
void netpoll_print_options(struct netpoll *np);
int netpoll_parse_options(struct netpoll *np, char *opt);
int netpoll_setup(struct netpoll *np);
int netpoll_trap(void);
@ -64,32 +63,61 @@ static inline int netpoll_rx(struct sk_buff *skb)
return ret;
}
static inline void *netpoll_poll_lock(struct net_device *dev)
static inline int netpoll_receive_skb(struct sk_buff *skb)
{
if (!list_empty(&skb->dev->napi_list))
return netpoll_rx(skb);
return 0;
}
static inline void *netpoll_poll_lock(struct napi_struct *napi)
{
struct net_device *dev = napi->dev;
rcu_read_lock(); /* deal with race on ->npinfo */
if (dev->npinfo) {
spin_lock(&dev->npinfo->poll_lock);
dev->npinfo->poll_owner = smp_processor_id();
return dev->npinfo;
if (dev && dev->npinfo) {
spin_lock(&napi->poll_lock);
napi->poll_owner = smp_processor_id();
return napi;
}
return NULL;
}
static inline void netpoll_poll_unlock(void *have)
{
struct netpoll_info *npi = have;
struct napi_struct *napi = have;
if (npi) {
npi->poll_owner = -1;
spin_unlock(&npi->poll_lock);
if (napi) {
napi->poll_owner = -1;
spin_unlock(&napi->poll_lock);
}
rcu_read_unlock();
}
static inline void netpoll_netdev_init(struct net_device *dev)
{
INIT_LIST_HEAD(&dev->napi_list);
}
#else
#define netpoll_rx(a) 0
#define netpoll_poll_lock(a) NULL
#define netpoll_poll_unlock(a)
static inline int netpoll_rx(struct sk_buff *skb)
{
return 0;
}
static inline int netpoll_receive_skb(struct sk_buff *skb)
{
return 0;
}
static inline void *netpoll_poll_lock(struct napi_struct *napi)
{
return NULL;
}
static inline void netpoll_poll_unlock(void *have)
{
}
static inline void netpoll_netdev_init(struct net_device *dev)
{
}
#endif
#endif

View file

@ -6,8 +6,98 @@
* Copyright 2006, 2007 Johannes Berg <johannes@sipsolutions.net>
*/
/**
* enum nl80211_commands - supported nl80211 commands
*
* @NL80211_CMD_UNSPEC: unspecified command to catch errors
*
* @NL80211_CMD_GET_WIPHY: request information about a wiphy or dump request
* to get a list of all present wiphys.
* @NL80211_CMD_SET_WIPHY: set wiphy name, needs %NL80211_ATTR_WIPHY and
* %NL80211_ATTR_WIPHY_NAME.
* @NL80211_CMD_NEW_WIPHY: Newly created wiphy, response to get request
* or rename notification. Has attributes %NL80211_ATTR_WIPHY and
* %NL80211_ATTR_WIPHY_NAME.
* @NL80211_CMD_DEL_WIPHY: Wiphy deleted. Has attributes
* %NL80211_ATTR_WIPHY and %NL80211_ATTR_WIPHY_NAME.
*
* @NL80211_CMD_GET_INTERFACE: Request an interface's configuration;
* either a dump request on a %NL80211_ATTR_WIPHY or a specific get
* on an %NL80211_ATTR_IFINDEX is supported.
* @NL80211_CMD_SET_INTERFACE: Set type of a virtual interface, requires
* %NL80211_ATTR_IFINDEX and %NL80211_ATTR_IFTYPE.
* @NL80211_CMD_NEW_INTERFACE: Newly created virtual interface or response
* to %NL80211_CMD_GET_INTERFACE. Has %NL80211_ATTR_IFINDEX,
* %NL80211_ATTR_WIPHY and %NL80211_ATTR_IFTYPE attributes. Can also
* be sent from userspace to request creation of a new virtual interface,
* then requires attributes %NL80211_ATTR_WIPHY, %NL80211_ATTR_IFTYPE and
* %NL80211_ATTR_IFNAME.
* @NL80211_CMD_DEL_INTERFACE: Virtual interface was deleted, has attributes
* %NL80211_ATTR_IFINDEX and %NL80211_ATTR_WIPHY. Can also be sent from
* userspace to request deletion of a virtual interface, then requires
* attribute %NL80211_ATTR_IFINDEX.
*
* @NL80211_CMD_MAX: highest used command number
* @__NL80211_CMD_AFTER_LAST: internal use
*/
enum nl80211_commands {
/* don't change the order or add anything inbetween, this is ABI! */
NL80211_CMD_UNSPEC,
NL80211_CMD_GET_WIPHY, /* can dump */
NL80211_CMD_SET_WIPHY,
NL80211_CMD_NEW_WIPHY,
NL80211_CMD_DEL_WIPHY,
NL80211_CMD_GET_INTERFACE, /* can dump */
NL80211_CMD_SET_INTERFACE,
NL80211_CMD_NEW_INTERFACE,
NL80211_CMD_DEL_INTERFACE,
/* add commands here */
/* used to define NL80211_CMD_MAX below */
__NL80211_CMD_AFTER_LAST,
NL80211_CMD_MAX = __NL80211_CMD_AFTER_LAST - 1
};
/**
* enum nl80211_attrs - nl80211 netlink attributes
*
* @NL80211_ATTR_UNSPEC: unspecified attribute to catch errors
*
* @NL80211_ATTR_WIPHY: index of wiphy to operate on, cf.
* /sys/class/ieee80211/<phyname>/index
* @NL80211_ATTR_WIPHY_NAME: wiphy name (used for renaming)
*
* @NL80211_ATTR_IFINDEX: network interface index of the device to operate on
* @NL80211_ATTR_IFNAME: network interface name
* @NL80211_ATTR_IFTYPE: type of virtual interface, see &enum nl80211_iftype
*
* @NL80211_ATTR_MAX: highest attribute number currently defined
* @__NL80211_ATTR_AFTER_LAST: internal use
*/
enum nl80211_attrs {
/* don't change the order or add anything inbetween, this is ABI! */
NL80211_ATTR_UNSPEC,
NL80211_ATTR_WIPHY,
NL80211_ATTR_WIPHY_NAME,
NL80211_ATTR_IFINDEX,
NL80211_ATTR_IFNAME,
NL80211_ATTR_IFTYPE,
/* add attributes here, update the policy in nl80211.c */
__NL80211_ATTR_AFTER_LAST,
NL80211_ATTR_MAX = __NL80211_ATTR_AFTER_LAST - 1
};
/**
* enum nl80211_iftype - (virtual) interface types
*
* @NL80211_IFTYPE_UNSPECIFIED: unspecified type, driver decides
* @NL80211_IFTYPE_ADHOC: independent BSS member
* @NL80211_IFTYPE_STATION: managed BSS member
@ -15,9 +105,10 @@
* @NL80211_IFTYPE_AP_VLAN: VLAN interface for access points
* @NL80211_IFTYPE_WDS: wireless distribution interface
* @NL80211_IFTYPE_MONITOR: monitor interface receiving all frames
* @NL80211_IFTYPE_MAX: highest interface type number currently defined
* @__NL80211_IFTYPE_AFTER_LAST: internal use
*
* These values are used with the NL80211_ATTR_IFTYPE
* These values are used with the %NL80211_ATTR_IFTYPE
* to set the type of an interface.
*
*/
@ -31,8 +122,8 @@ enum nl80211_iftype {
NL80211_IFTYPE_MONITOR,
/* keep last */
__NL80211_IFTYPE_AFTER_LAST
__NL80211_IFTYPE_AFTER_LAST,
NL80211_IFTYPE_MAX = __NL80211_IFTYPE_AFTER_LAST - 1
};
#define NL80211_IFTYPE_MAX (__NL80211_IFTYPE_AFTER_LAST - 1)
#endif /* __LINUX_NL80211_H */

View file

@ -29,6 +29,7 @@ struct nsproxy {
struct mnt_namespace *mnt_ns;
struct pid_namespace *pid_ns;
struct user_namespace *user_ns;
struct net *net_ns;
};
extern struct nsproxy init_nsproxy;

View file

@ -54,7 +54,6 @@ extern int of_device_is_compatible(const struct device_node *device,
extern const void *of_get_property(const struct device_node *node,
const char *name,
int *lenp);
#define get_property(a, b, c) of_get_property((a), (b), (c))
extern int of_n_addr_cells(struct device_node *np);
extern int of_n_size_cells(struct device_node *np);

View file

@ -685,13 +685,16 @@ extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
* a PCI domain is defined to be a set of PCI busses which share
* configuration space.
*/
#ifndef CONFIG_PCI_DOMAINS
#ifdef CONFIG_PCI_DOMAINS
extern int pci_domains_supported;
#else
enum { pci_domains_supported = 0 };
static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
static inline int pci_proc_domain(struct pci_bus *bus)
{
return 0;
}
#endif
#endif /* CONFIG_PCI_DOMAINS */
#else /* CONFIG_PCI is not enabled */

View file

@ -829,6 +829,9 @@
#define PCI_DEVICE_ID_UMC_UM8886BF 0x673a
#define PCI_DEVICE_ID_UMC_UM8886A 0x886a
#define PCI_VENDOR_ID_PICOPOWER 0x1066
#define PCI_DEVICE_ID_PICOPOWER_PT86C523 0x0002
#define PCI_DEVICE_ID_PICOPOWER_PT86C523BBP 0x8002
#define PCI_VENDOR_ID_MYLEX 0x1069
#define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001
@ -1471,6 +1474,8 @@
#define PCI_DEVICE_ID_RICOH_RL5C476 0x0476
#define PCI_DEVICE_ID_RICOH_RL5C478 0x0478
#define PCI_DEVICE_ID_RICOH_R5C822 0x0822
#define PCI_DEVICE_ID_RICOH_R5C832 0x0832
#define PCI_DEVICE_ID_RICOH_R5C843 0x0843
#define PCI_VENDOR_ID_DLINK 0x1186
#define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00
@ -1736,6 +1741,11 @@
#define PCI_VENDOR_ID_RADISYS 0x1331
#define PCI_VENDOR_ID_MICRO_MEMORY 0x1332
#define PCI_DEVICE_ID_MICRO_MEMORY_5415CN 0x5415
#define PCI_DEVICE_ID_MICRO_MEMORY_5425CN 0x5425
#define PCI_DEVICE_ID_MICRO_MEMORY_6155 0x6155
#define PCI_VENDOR_ID_DOMEX 0x134a
#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001
@ -1841,6 +1851,8 @@
#define PCI_VENDOR_ID_ABOCOM 0x13D1
#define PCI_DEVICE_ID_ABOCOM_2BD1 0x2BD1
#define PCI_VENDOR_ID_SUNDANCE 0x13f0
#define PCI_VENDOR_ID_CMEDIA 0x13f6
#define PCI_DEVICE_ID_CMEDIA_CM8338A 0x0100
#define PCI_DEVICE_ID_CMEDIA_CM8338B 0x0101
@ -1948,8 +1960,12 @@
#define PCI_DEVICE_ID_TIGON3_5751M 0x167d
#define PCI_DEVICE_ID_TIGON3_5751F 0x167e
#define PCI_DEVICE_ID_TIGON3_5787F 0x167f
#define PCI_DEVICE_ID_TIGON3_5761E 0x1680
#define PCI_DEVICE_ID_TIGON3_5761 0x1681
#define PCI_DEVICE_ID_TIGON3_5764 0x1684
#define PCI_DEVICE_ID_TIGON3_5787M 0x1693
#define PCI_DEVICE_ID_TIGON3_5782 0x1696
#define PCI_DEVICE_ID_TIGON3_5784 0x1698
#define PCI_DEVICE_ID_TIGON3_5786 0x169a
#define PCI_DEVICE_ID_TIGON3_5787 0x169b
#define PCI_DEVICE_ID_TIGON3_5788 0x169c
@ -2100,8 +2116,11 @@
#define PCI_DEVICE_ID_MPC8533 0x0031
#define PCI_DEVICE_ID_MPC8544E 0x0032
#define PCI_DEVICE_ID_MPC8544 0x0033
#define PCI_DEVICE_ID_MPC8572E 0x0040
#define PCI_DEVICE_ID_MPC8572 0x0041
#define PCI_DEVICE_ID_MPC8641 0x7010
#define PCI_DEVICE_ID_MPC8641D 0x7011
#define PCI_DEVICE_ID_MPC8610 0x7018
#define PCI_VENDOR_ID_PASEMI 0x1959
@ -2123,6 +2142,11 @@
#define PCI_VENDOR_ID_TEKRAM 0x1de1
#define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29
#define PCI_VENDOR_ID_TEHUTI 0x1fc9
#define PCI_DEVICE_ID_TEHUTI_3009 0x3009
#define PCI_DEVICE_ID_TEHUTI_3010 0x3010
#define PCI_DEVICE_ID_TEHUTI_3014 0x3014
#define PCI_VENDOR_ID_HINT 0x3388
#define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013
@ -2221,6 +2245,7 @@
#define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5
#define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6
#define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db
#define PCI_DEVICE_ID_INTEL_82801EB_12 0x24dc
#define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd
#define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1
#define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2

View file

@ -147,7 +147,7 @@
#define PCI_BRIDGE_CONTROL 0x3e
#define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */
#define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */
#define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */
#define PCI_BRIDGE_CTL_ISA 0x04 /* Enable ISA mode */
#define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */
#define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */
#define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */
@ -202,8 +202,12 @@
#define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */
#define PCI_CAP_ID_PCIX 0x07 /* PCI-X */
#define PCI_CAP_ID_HT 0x08 /* HyperTransport */
#define PCI_CAP_ID_VNDR 0x09 /* Vendor specific capability */
#define PCI_CAP_ID_VNDR 0x09 /* Vendor specific */
#define PCI_CAP_ID_DBG 0x0A /* Debug port */
#define PCI_CAP_ID_CCRC 0x0B /* CompactPCI Central Resource Control */
#define PCI_CAP_ID_SHPC 0x0C /* PCI Standard Hot-Plug Controller */
#define PCI_CAP_ID_SSVID 0x0D /* Bridge subsystem vendor/device ID */
#define PCI_CAP_ID_AGP3 0x0E /* AGP Target PCI-PCI bridge */
#define PCI_CAP_ID_EXP 0x10 /* PCI Express */
#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */
#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
@ -316,7 +320,20 @@
#define PCI_X_CMD 2 /* Modes & Features */
#define PCI_X_CMD_DPERR_E 0x0001 /* Data Parity Error Recovery Enable */
#define PCI_X_CMD_ERO 0x0002 /* Enable Relaxed Ordering */
#define PCI_X_CMD_READ_512 0x0000 /* 512 byte maximum read byte count */
#define PCI_X_CMD_READ_1K 0x0004 /* 1Kbyte maximum read byte count */
#define PCI_X_CMD_READ_2K 0x0008 /* 2Kbyte maximum read byte count */
#define PCI_X_CMD_READ_4K 0x000c /* 4Kbyte maximum read byte count */
#define PCI_X_CMD_MAX_READ 0x000c /* Max Memory Read Byte Count */
/* Max # of outstanding split transactions */
#define PCI_X_CMD_SPLIT_1 0x0000 /* Max 1 */
#define PCI_X_CMD_SPLIT_2 0x0010 /* Max 2 */
#define PCI_X_CMD_SPLIT_3 0x0020 /* Max 3 */
#define PCI_X_CMD_SPLIT_4 0x0030 /* Max 4 */
#define PCI_X_CMD_SPLIT_8 0x0040 /* Max 8 */
#define PCI_X_CMD_SPLIT_12 0x0050 /* Max 12 */
#define PCI_X_CMD_SPLIT_16 0x0060 /* Max 16 */
#define PCI_X_CMD_SPLIT_32 0x0070 /* Max 32 */
#define PCI_X_CMD_MAX_SPLIT 0x0070 /* Max Outstanding Split Transactions */
#define PCI_X_CMD_VERSION(x) (((x) >> 12) & 3) /* Version */
#define PCI_X_STATUS 4 /* PCI-X capabilities */

View file

@ -25,6 +25,8 @@
#include <linux/timer.h>
#include <linux/workqueue.h>
#include <asm/atomic.h>
#define PHY_BASIC_FEATURES (SUPPORTED_10baseT_Half | \
SUPPORTED_10baseT_Full | \
SUPPORTED_100baseT_Half | \
@ -281,6 +283,7 @@ struct phy_device {
/* Interrupt and Polling infrastructure */
struct work_struct phy_queue;
struct timer_list phy_timer;
atomic_t irq_disable;
spinlock_t lock;

38
include/linux/phy_fixed.h Normal file
View file

@ -0,0 +1,38 @@
#ifndef __PHY_FIXED_H
#define __PHY_FIXED_H
#define MII_REGS_NUM 29
/* max number of virtual phy stuff */
#define MAX_PHY_AMNT 10
/*
The idea is to emulate normal phy behavior by responding with
pre-defined values to mii BMCR read, so that read_status hook could
take all the needed info.
*/
struct fixed_phy_status {
u8 link;
u16 speed;
u8 duplex;
};
/*-----------------------------------------------------------------------------
* Private information hoder for mii_bus
*-----------------------------------------------------------------------------*/
struct fixed_info {
u16 *regs;
u8 regs_num;
struct fixed_phy_status phy_status;
struct phy_device *phydev; /* pointer to the container */
/* link & speed cb */
int (*link_update) (struct net_device *, struct fixed_phy_status *);
};
int fixed_mdio_set_link_update(struct phy_device *,
int (*link_update) (struct net_device *, struct fixed_phy_status *));
struct fixed_info *fixed_mdio_get_phydev (int phydev_ind);
#endif /* __PHY_FIXED_H */

View file

@ -77,8 +77,8 @@ struct tc_ratespec
{
unsigned char cell_log;
unsigned char __reserved;
unsigned short feature;
short addend;
unsigned short overhead;
short cell_align;
unsigned short mpu;
__u32 rate;
};

View file

@ -15,7 +15,7 @@
struct platform_device {
const char * name;
u32 id;
int id;
struct device dev;
u32 num_resources;
struct resource * resource;
@ -35,9 +35,10 @@ extern struct resource *platform_get_resource_byname(struct platform_device *, u
extern int platform_get_irq_byname(struct platform_device *, char *);
extern int platform_add_devices(struct platform_device **, int);
extern struct platform_device *platform_device_register_simple(char *, unsigned int, struct resource *, unsigned int);
extern struct platform_device *platform_device_register_simple(char *, int id,
struct resource *, unsigned int);
extern struct platform_device *platform_device_alloc(const char *name, unsigned int id);
extern struct platform_device *platform_device_alloc(const char *name, int id);
extern int platform_device_add_resources(struct platform_device *pdev, struct resource *res, unsigned int num);
extern int platform_device_add_data(struct platform_device *pdev, const void *data, size_t size);
extern int platform_device_add(struct platform_device *pdev);

View file

@ -7,6 +7,7 @@
#include <linux/magic.h>
#include <asm/atomic.h>
struct net;
struct completion;
/*
@ -97,8 +98,6 @@ struct vmcore {
extern struct proc_dir_entry proc_root;
extern struct proc_dir_entry *proc_root_fs;
extern struct proc_dir_entry *proc_net;
extern struct proc_dir_entry *proc_net_stat;
extern struct proc_dir_entry *proc_bus;
extern struct proc_dir_entry *proc_root_driver;
extern struct proc_dir_entry *proc_root_kcore;
@ -192,36 +191,21 @@ static inline struct proc_dir_entry *create_proc_info_entry(const char *name,
if (res) res->get_info=get_info;
return res;
}
static inline struct proc_dir_entry *proc_net_create(const char *name,
mode_t mode, get_info_t *get_info)
{
return create_proc_info_entry(name,mode,proc_net,get_info);
}
static inline struct proc_dir_entry *proc_net_fops_create(const char *name,
mode_t mode, const struct file_operations *fops)
{
struct proc_dir_entry *res = create_proc_entry(name, mode, proc_net);
if (res)
res->proc_fops = fops;
return res;
}
static inline void proc_net_remove(const char *name)
{
remove_proc_entry(name,proc_net);
}
extern struct proc_dir_entry *proc_net_create(struct net *net,
const char *name, mode_t mode, get_info_t *get_info);
extern struct proc_dir_entry *proc_net_fops_create(struct net *net,
const char *name, mode_t mode, const struct file_operations *fops);
extern void proc_net_remove(struct net *net, const char *name);
#else
#define proc_root_driver NULL
#define proc_net NULL
#define proc_bus NULL
#define proc_net_fops_create(name, mode, fops) ({ (void)(mode), NULL; })
#define proc_net_create(name, mode, info) ({ (void)(mode), NULL; })
static inline void proc_net_remove(const char *name) {}
#define proc_net_fops_create(net, name, mode, fops) ({ (void)(mode), NULL; })
#define proc_net_create(net, name, mode, info) ({ (void)(mode), NULL; })
static inline void proc_net_remove(struct net *net, const char *name) {}
static inline void proc_flush_task(struct task_struct *task) { }
@ -281,6 +265,13 @@ static inline struct proc_dir_entry *PDE(const struct inode *inode)
return PROC_I(inode)->pde;
}
static inline struct net *PDE_NET(struct proc_dir_entry *pde)
{
return pde->parent->data;
}
struct net *get_proc_net(const struct inode *inode);
struct proc_maps_private {
struct pid *pid;
struct task_struct *task;

View file

@ -2,7 +2,7 @@
#define __RFKILL_H
/*
* Copyright (C) 2006 Ivo van Doorn
* Copyright (C) 2006 - 2007 Ivo van Doorn
* Copyright (C) 2007 Dmitry Torokhov
*
* This program is free software; you can redistribute it and/or modify
@ -26,18 +26,19 @@
#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/leds.h>
/**
* enum rfkill_type - type of rfkill switch.
* RFKILL_TYPE_WLAN: switch is no a Wireless network devices.
* RFKILL_TYPE_BlUETOOTH: switch is on a bluetooth device.
* RFKILL_TYPE_IRDA: switch is on an infrared devices.
* RFKILL_TYPE_WLAN: switch is on a 802.11 wireless network device.
* RFKILL_TYPE_BLUETOOTH: switch is on a bluetooth device.
* RFKILL_TYPE_UWB: switch is on a ultra wideband device.
*/
enum rfkill_type {
RFKILL_TYPE_WLAN = 0,
RFKILL_TYPE_BLUETOOTH = 1,
RFKILL_TYPE_IRDA = 2,
RFKILL_TYPE_MAX = 3,
RFKILL_TYPE_WLAN ,
RFKILL_TYPE_BLUETOOTH,
RFKILL_TYPE_UWB,
RFKILL_TYPE_MAX,
};
enum rfkill_state {
@ -51,11 +52,14 @@ enum rfkill_state {
* @type: Radio type which the button controls, the value stored
* here should be a value from enum rfkill_type.
* @state: State of the switch (on/off).
* @user_claim_unsupported: Whether the hardware supports exclusive
* RF-kill control by userspace. Set this before registering.
* @user_claim: Set when the switch is controlled exlusively by userspace.
* @mutex: Guards switch state transitions
* @data: Pointer to the RF button drivers private data which will be
* passed along when toggling radio state.
* @toggle_radio(): Mandatory handler to control state of the radio.
* @led_trigger: A LED trigger for this button's LED.
* @dev: Device structure integrating the switch into device tree.
* @node: Used to place switch into list of all switches known to the
* the system.
@ -67,6 +71,7 @@ struct rfkill {
enum rfkill_type type;
enum rfkill_state state;
bool user_claim_unsupported;
bool user_claim;
struct mutex mutex;
@ -74,6 +79,10 @@ struct rfkill {
void *data;
int (*toggle_radio)(void *data, enum rfkill_state state);
#ifdef CONFIG_RFKILL_LEDS
struct led_trigger led_trigger;
#endif
struct device dev;
struct list_head node;
};
@ -84,6 +93,19 @@ void rfkill_free(struct rfkill *rfkill);
int rfkill_register(struct rfkill *rfkill);
void rfkill_unregister(struct rfkill *rfkill);
void rfkill_switch_all(enum rfkill_type type, enum rfkill_state state);
/**
* rfkill_get_led_name - Get the LED trigger name for the button's LED.
* This function might return a NULL pointer if registering of the
* LED trigger failed.
* Use this as "default_trigger" for the LED.
*/
static inline char *rfkill_get_led_name(struct rfkill *rfkill)
{
#ifdef CONFIG_RFKILL_LEDS
return (char *)(rfkill->led_trigger.name);
#else
return NULL;
#endif
}
#endif /* RFKILL_H */

View file

@ -97,6 +97,9 @@ enum {
RTM_SETNEIGHTBL,
#define RTM_SETNEIGHTBL RTM_SETNEIGHTBL
RTM_NEWNDUSEROPT = 68,
#define RTM_NEWNDUSEROPT RTM_NEWNDUSEROPT
__RTM_MAX,
#define RTM_MAX (((__RTM_MAX + 3) & ~3) - 1)
};
@ -479,6 +482,30 @@ enum
#define TCA_RTA(r) ((struct rtattr*)(((char*)(r)) + NLMSG_ALIGN(sizeof(struct tcmsg))))
#define TCA_PAYLOAD(n) NLMSG_PAYLOAD(n,sizeof(struct tcmsg))
/********************************************************************
* Neighbor Discovery userland options
****/
struct nduseroptmsg
{
unsigned char nduseropt_family;
unsigned char nduseropt_pad1;
unsigned short nduseropt_opts_len; /* Total length of options */
__u8 nduseropt_icmp_type;
__u8 nduseropt_icmp_code;
unsigned short nduseropt_pad2;
/* Followed by one or more ND options */
};
enum
{
NDUSEROPT_UNSPEC,
NDUSEROPT_SRCADDR,
__NDUSEROPT_MAX
};
#define NDUSEROPT_MAX (__NDUSEROPT_MAX - 1)
#ifndef __KERNEL__
/* RTnetlink multicast groups - backwards compatibility for userspace */
#define RTMGRP_LINK 1
@ -542,6 +569,8 @@ enum rtnetlink_groups {
#define RTNLGRP_IPV6_PREFIX RTNLGRP_IPV6_PREFIX
RTNLGRP_IPV6_RULE,
#define RTNLGRP_IPV6_RULE RTNLGRP_IPV6_RULE
RTNLGRP_ND_USEROPT,
#define RTNLGRP_ND_USEROPT RTNLGRP_ND_USEROPT
__RTNLGRP_MAX
};
#define RTNLGRP_MAX (__RTNLGRP_MAX - 1)

View file

@ -27,6 +27,7 @@
#define CLONE_NEWUTS 0x04000000 /* New utsname group? */
#define CLONE_NEWIPC 0x08000000 /* New ipcs */
#define CLONE_NEWUSER 0x10000000 /* New user namespace */
#define CLONE_NEWNET 0x40000000 /* New network namespace */
/*
* Scheduling policies

View file

@ -102,6 +102,9 @@ typedef enum {
SCTP_CID_ECN_CWR = 13,
SCTP_CID_SHUTDOWN_COMPLETE = 14,
/* AUTH Extension Section 4.1 */
SCTP_CID_AUTH = 0x0F,
/* PR-SCTP Sec 3.2 */
SCTP_CID_FWD_TSN = 0xC0,
@ -180,6 +183,14 @@ typedef enum {
SCTP_PARAM_SUPPORTED_ADDRESS_TYPES = __constant_htons(12),
SCTP_PARAM_ECN_CAPABLE = __constant_htons(0x8000),
/* AUTH Extension Section 3 */
SCTP_PARAM_RANDOM = __constant_htons(0x8002),
SCTP_PARAM_CHUNKS = __constant_htons(0x8003),
SCTP_PARAM_HMAC_ALGO = __constant_htons(0x8004),
/* Add-IP: Supported Extensions, Section 4.2 */
SCTP_PARAM_SUPPORTED_EXT = __constant_htons(0x8008),
/* PR-SCTP Sec 3.1 */
SCTP_PARAM_FWD_TSN_SUPPORT = __constant_htons(0xc000),
@ -296,6 +307,30 @@ typedef struct sctp_adaptation_ind_param {
__be32 adaptation_ind;
} __attribute__((packed)) sctp_adaptation_ind_param_t;
/* ADDIP Section 4.2.7 Supported Extensions Parameter */
typedef struct sctp_supported_ext_param {
struct sctp_paramhdr param_hdr;
__u8 chunks[0];
} __attribute__((packed)) sctp_supported_ext_param_t;
/* AUTH Section 3.1 Random */
typedef struct sctp_random_param {
sctp_paramhdr_t param_hdr;
__u8 random_val[0];
} __attribute__((packed)) sctp_random_param_t;
/* AUTH Section 3.2 Chunk List */
typedef struct sctp_chunks_param {
sctp_paramhdr_t param_hdr;
__u8 chunks[0];
} __attribute__((packed)) sctp_chunks_param_t;
/* AUTH Section 3.3 HMAC Algorithm */
typedef struct sctp_hmac_algo_param {
sctp_paramhdr_t param_hdr;
__be16 hmac_ids[0];
} __attribute__((packed)) sctp_hmac_algo_param_t;
/* RFC 2960. Section 3.3.3 Initiation Acknowledgement (INIT ACK) (2):
* The INIT ACK chunk is used to acknowledge the initiation of an SCTP
* association.
@ -462,7 +497,19 @@ typedef enum {
SCTP_ERROR_RSRC_LOW = __constant_htons(0x0101),
SCTP_ERROR_DEL_SRC_IP = __constant_htons(0x0102),
SCTP_ERROR_ASCONF_ACK = __constant_htons(0x0103),
SCTP_ERROR_REQ_REFUSED = __constant_htons(0x0104)
SCTP_ERROR_REQ_REFUSED = __constant_htons(0x0104),
/* AUTH Section 4. New Error Cause
*
* This section defines a new error cause that will be sent if an AUTH
* chunk is received with an unsupported HMAC identifier.
* illustrates the new error cause.
*
* Cause Code Error Cause Name
* --------------------------------------------------------------
* 0x0105 Unsupported HMAC Identifier
*/
SCTP_ERROR_UNSUP_HMAC = __constant_htons(0x0105)
} sctp_error_t;
@ -600,4 +647,64 @@ typedef struct sctp_addip_chunk {
sctp_addiphdr_t addip_hdr;
} __attribute__((packed)) sctp_addip_chunk_t;
/* AUTH
* Section 4.1 Authentication Chunk (AUTH)
*
* This chunk is used to hold the result of the HMAC calculation.
*
* 0 1 2 3
* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
* | Type = 0x0F | Flags=0 | Length |
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
* | Shared Key Identifier | HMAC Identifier |
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
* | |
* \ HMAC /
* / \
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
*
* Type: 1 byte (unsigned integer)
* This value MUST be set to 0x0F for all AUTH-chunks.
*
* Flags: 1 byte (unsigned integer)
* Set to zero on transmit and ignored on receipt.
*
* Length: 2 bytes (unsigned integer)
* This value holds the length of the HMAC in bytes plus 8.
*
* Shared Key Identifier: 2 bytes (unsigned integer)
* This value describes which endpoint pair shared key is used.
*
* HMAC Identifier: 2 bytes (unsigned integer)
* This value describes which message digest is being used. Table 2
* shows the currently defined values.
*
* The following Table 2 shows the currently defined values for HMAC
* identifiers.
*
* +-----------------+--------------------------+
* | HMAC Identifier | Message Digest Algorithm |
* +-----------------+--------------------------+
* | 0 | Reserved |
* | 1 | SHA-1 defined in [8] |
* | 2 | Reserved |
* | 3 | SHA-256 defined in [8] |
* +-----------------+--------------------------+
*
*
* HMAC: n bytes (unsigned integer) This hold the result of the HMAC
* calculation.
*/
typedef struct sctp_authhdr {
__be16 shkey_id;
__be16 hmac_id;
__u8 hmac[0];
} __attribute__((packed)) sctp_authhdr_t;
typedef struct sctp_auth_chunk {
sctp_chunkhdr_t chunk_hdr;
sctp_authhdr_t auth_hdr;
} __attribute__((packed)) sctp_auth_chunk_t;
#endif /* __LINUX_SCTP_H__ */

View file

@ -46,6 +46,8 @@ int seq_path(struct seq_file *, struct vfsmount *, struct dentry *, char *);
int single_open(struct file *, int (*)(struct seq_file *, void *), void *);
int single_release(struct inode *, struct file *);
void *__seq_open_private(struct file *, const struct seq_operations *, int);
int seq_open_private(struct file *, const struct seq_operations *, int);
int seq_release_private(struct inode *, struct file *);
#define SEQ_START_TOKEN ((void *)1)

View file

@ -82,6 +82,8 @@ enum
__ICMP_MIB_MAX
};
#define __ICMPMSG_MIB_MAX 512 /* Out+In for all 8-bit ICMP types */
/* icmp6 mib definitions */
/*
* RFC 2466: ICMPv6-MIB
@ -91,35 +93,12 @@ enum
ICMP6_MIB_NUM = 0,
ICMP6_MIB_INMSGS, /* InMsgs */
ICMP6_MIB_INERRORS, /* InErrors */
ICMP6_MIB_INDESTUNREACHS, /* InDestUnreachs */
ICMP6_MIB_INPKTTOOBIGS, /* InPktTooBigs */
ICMP6_MIB_INTIMEEXCDS, /* InTimeExcds */
ICMP6_MIB_INPARMPROBLEMS, /* InParmProblems */
ICMP6_MIB_INECHOS, /* InEchos */
ICMP6_MIB_INECHOREPLIES, /* InEchoReplies */
ICMP6_MIB_INGROUPMEMBQUERIES, /* InGroupMembQueries */
ICMP6_MIB_INGROUPMEMBRESPONSES, /* InGroupMembResponses */
ICMP6_MIB_INGROUPMEMBREDUCTIONS, /* InGroupMembReductions */
ICMP6_MIB_INROUTERSOLICITS, /* InRouterSolicits */
ICMP6_MIB_INROUTERADVERTISEMENTS, /* InRouterAdvertisements */
ICMP6_MIB_INNEIGHBORSOLICITS, /* InNeighborSolicits */
ICMP6_MIB_INNEIGHBORADVERTISEMENTS, /* InNeighborAdvertisements */
ICMP6_MIB_INREDIRECTS, /* InRedirects */
ICMP6_MIB_OUTMSGS, /* OutMsgs */
ICMP6_MIB_OUTDESTUNREACHS, /* OutDestUnreachs */
ICMP6_MIB_OUTPKTTOOBIGS, /* OutPktTooBigs */
ICMP6_MIB_OUTTIMEEXCDS, /* OutTimeExcds */
ICMP6_MIB_OUTPARMPROBLEMS, /* OutParmProblems */
ICMP6_MIB_OUTECHOREPLIES, /* OutEchoReplies */
ICMP6_MIB_OUTROUTERSOLICITS, /* OutRouterSolicits */
ICMP6_MIB_OUTNEIGHBORSOLICITS, /* OutNeighborSolicits */
ICMP6_MIB_OUTNEIGHBORADVERTISEMENTS, /* OutNeighborAdvertisements */
ICMP6_MIB_OUTREDIRECTS, /* OutRedirects */
ICMP6_MIB_OUTGROUPMEMBRESPONSES, /* OutGroupMembResponses */
ICMP6_MIB_OUTGROUPMEMBREDUCTIONS, /* OutGroupMembReductions */
__ICMP6_MIB_MAX
};
#define __ICMP6MSG_MIB_MAX 512 /* Out+In for all 8-bit ICMPv6 types */
/* tcp mib definitions */
/*
* RFC 1213: MIB-II TCP group
@ -231,6 +210,10 @@ enum
LINUX_MIB_TCPABORTONLINGER, /* TCPAbortOnLinger */
LINUX_MIB_TCPABORTFAILED, /* TCPAbortFailed */
LINUX_MIB_TCPMEMORYPRESSURES, /* TCPMemoryPressures */
LINUX_MIB_TCPSACKDISCARD, /* TCPSACKDiscard */
LINUX_MIB_TCPDSACKIGNOREDOLD, /* TCPSACKIgnoredOld */
LINUX_MIB_TCPDSACKIGNOREDNOUNDO, /* TCPSACKIgnoredNoUndo */
LINUX_MIB_TCPSPURIOUSRTOS, /* TCPSpuriousRTOs */
__LINUX_MIB_MAX
};

View file

@ -0,0 +1,33 @@
#ifndef __LINUX_SPI_MMC_SPI_H
#define __LINUX_SPI_MMC_SPI_H
struct device;
struct mmc_host;
/* Put this in platform_data of a device being used to manage an MMC/SD
* card slot. (Modeled after PXA mmc glue; see that for usage examples.)
*
* REVISIT This is not a spi-specific notion. Any card slot should be
* able to handle it. If the MMC core doesn't adopt this kind of notion,
* switch the "struct device *" parameters over to "struct spi_device *".
*/
struct mmc_spi_platform_data {
/* driver activation and (optional) card detect irq hookup */
int (*init)(struct device *,
irqreturn_t (*)(int, void *),
void *);
void (*exit)(struct device *, void *);
/* sense switch on sd cards */
int (*get_ro)(struct device *);
/* how long to debounce card detect, in msecs */
u16 detect_delay;
/* power management */
u16 powerup_msecs; /* delay of up to 250 msec */
u32 ocr_mask; /* available voltages */
void (*setpower)(struct device *, unsigned int maskval);
};
#endif /* __LINUX_SPI_MMC_SPI_H */

424
include/linux/ssb/ssb.h Normal file
View file

@ -0,0 +1,424 @@
#ifndef LINUX_SSB_H_
#define LINUX_SSB_H_
#include <linux/device.h>
#include <linux/list.h>
#include <linux/types.h>
#include <linux/spinlock.h>
#include <linux/pci.h>
#include <linux/mod_devicetable.h>
#include <linux/ssb/ssb_regs.h>
struct pcmcia_device;
struct ssb_bus;
struct ssb_driver;
struct ssb_sprom_r1 {
u16 pci_spid; /* Subsystem Product ID for PCI */
u16 pci_svid; /* Subsystem Vendor ID for PCI */
u16 pci_pid; /* Product ID for PCI */
u8 il0mac[6]; /* MAC address for 802.11b/g */
u8 et0mac[6]; /* MAC address for Ethernet */
u8 et1mac[6]; /* MAC address for 802.11a */
u8 et0phyaddr:5; /* MII address for enet0 */
u8 et1phyaddr:5; /* MII address for enet1 */
u8 et0mdcport:1; /* MDIO for enet0 */
u8 et1mdcport:1; /* MDIO for enet1 */
u8 board_rev; /* Board revision */
u8 country_code:4; /* Country Code */
u8 antenna_a:2; /* Antenna 0/1 available for A-PHY */
u8 antenna_bg:2; /* Antenna 0/1 available for B-PHY and G-PHY */
u16 pa0b0;
u16 pa0b1;
u16 pa0b2;
u16 pa1b0;
u16 pa1b1;
u16 pa1b2;
u8 gpio0; /* GPIO pin 0 */
u8 gpio1; /* GPIO pin 1 */
u8 gpio2; /* GPIO pin 2 */
u8 gpio3; /* GPIO pin 3 */
u16 maxpwr_a; /* A-PHY Power Amplifier Max Power (in dBm Q5.2) */
u16 maxpwr_bg; /* B/G-PHY Power Amplifier Max Power (in dBm Q5.2) */
u8 itssi_a; /* Idle TSSI Target for A-PHY */
u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
u16 boardflags_lo; /* Boardflags (low 16 bits) */
u8 antenna_gain_a; /* A-PHY Antenna gain (in dBm Q5.2) */
u8 antenna_gain_bg; /* B/G-PHY Antenna gain (in dBm Q5.2) */
u8 oem[8]; /* OEM string (rev 1 only) */
};
struct ssb_sprom_r2 {
u16 boardflags_hi; /* Boardflags (high 16 bits) */
u8 maxpwr_a_lo; /* A-PHY Max Power Low */
u8 maxpwr_a_hi; /* A-PHY Max Power High */
u16 pa1lob0; /* A-PHY PA Low Settings */
u16 pa1lob1; /* A-PHY PA Low Settings */
u16 pa1lob2; /* A-PHY PA Low Settings */
u16 pa1hib0; /* A-PHY PA High Settings */
u16 pa1hib1; /* A-PHY PA High Settings */
u16 pa1hib2; /* A-PHY PA High Settings */
u8 ofdm_pwr_off; /* OFDM Power Offset from CCK Level */
u8 country_str[2]; /* Two char Country Code */
};
struct ssb_sprom_r3 {
u32 ofdmapo; /* A-PHY OFDM Mid Power Offset */
u32 ofdmalpo; /* A-PHY OFDM Low Power Offset */
u32 ofdmahpo; /* A-PHY OFDM High Power Offset */
u8 gpioldc_on_cnt; /* GPIO LED Powersave Duty Cycle ON count */
u8 gpioldc_off_cnt; /* GPIO LED Powersave Duty Cycle OFF count */
u8 cckpo_1M:4; /* CCK Power Offset for Rate 1M */
u8 cckpo_2M:4; /* CCK Power Offset for Rate 2M */
u8 cckpo_55M:4; /* CCK Power Offset for Rate 5.5M */
u8 cckpo_11M:4; /* CCK Power Offset for Rate 11M */
u32 ofdmgpo; /* G-PHY OFDM Power Offset */
};
struct ssb_sprom_r4 {
/* TODO */
};
struct ssb_sprom {
u8 revision;
u8 crc;
/* The valid r# fields are selected by the "revision".
* Revision 3 and lower inherit from lower revisions.
*/
union {
struct {
struct ssb_sprom_r1 r1;
struct ssb_sprom_r2 r2;
struct ssb_sprom_r3 r3;
};
struct ssb_sprom_r4 r4;
};
};
/* Information about the PCB the circuitry is soldered on. */
struct ssb_boardinfo {
u16 vendor;
u16 type;
u16 rev;
};
struct ssb_device;
/* Lowlevel read/write operations on the device MMIO.
* Internal, don't use that outside of ssb. */
struct ssb_bus_ops {
u16 (*read16)(struct ssb_device *dev, u16 offset);
u32 (*read32)(struct ssb_device *dev, u16 offset);
void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
};
/* Core-ID values. */
#define SSB_DEV_CHIPCOMMON 0x800
#define SSB_DEV_ILINE20 0x801
#define SSB_DEV_SDRAM 0x803
#define SSB_DEV_PCI 0x804
#define SSB_DEV_MIPS 0x805
#define SSB_DEV_ETHERNET 0x806
#define SSB_DEV_V90 0x807
#define SSB_DEV_USB11_HOSTDEV 0x808
#define SSB_DEV_ADSL 0x809
#define SSB_DEV_ILINE100 0x80A
#define SSB_DEV_IPSEC 0x80B
#define SSB_DEV_PCMCIA 0x80D
#define SSB_DEV_INTERNAL_MEM 0x80E
#define SSB_DEV_MEMC_SDRAM 0x80F
#define SSB_DEV_EXTIF 0x811
#define SSB_DEV_80211 0x812
#define SSB_DEV_MIPS_3302 0x816
#define SSB_DEV_USB11_HOST 0x817
#define SSB_DEV_USB11_DEV 0x818
#define SSB_DEV_USB20_HOST 0x819
#define SSB_DEV_USB20_DEV 0x81A
#define SSB_DEV_SDIO_HOST 0x81B
#define SSB_DEV_ROBOSWITCH 0x81C
#define SSB_DEV_PARA_ATA 0x81D
#define SSB_DEV_SATA_XORDMA 0x81E
#define SSB_DEV_ETHERNET_GBIT 0x81F
#define SSB_DEV_PCIE 0x820
#define SSB_DEV_MIMO_PHY 0x821
#define SSB_DEV_SRAM_CTRLR 0x822
#define SSB_DEV_MINI_MACPHY 0x823
#define SSB_DEV_ARM_1176 0x824
#define SSB_DEV_ARM_7TDMI 0x825
/* Vendor-ID values */
#define SSB_VENDOR_BROADCOM 0x4243
/* Some kernel subsystems poke with dev->drvdata, so we must use the
* following ugly workaround to get from struct device to struct ssb_device */
struct __ssb_dev_wrapper {
struct device dev;
struct ssb_device *sdev;
};
struct ssb_device {
/* Having a copy of the ops pointer in each dev struct
* is an optimization. */
const struct ssb_bus_ops *ops;
struct device *dev;
struct ssb_bus *bus;
struct ssb_device_id id;
u8 core_index;
unsigned int irq;
/* Internal-only stuff follows. */
void *drvdata; /* Per-device data */
void *devtypedata; /* Per-devicetype (eg 802.11) data */
};
/* Go from struct device to struct ssb_device. */
static inline
struct ssb_device * dev_to_ssb_dev(struct device *dev)
{
struct __ssb_dev_wrapper *wrap;
wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
return wrap->sdev;
}
/* Device specific user data */
static inline
void ssb_set_drvdata(struct ssb_device *dev, void *data)
{
dev->drvdata = data;
}
static inline
void * ssb_get_drvdata(struct ssb_device *dev)
{
return dev->drvdata;
}
/* Devicetype specific user data. This is per device-type (not per device) */
void ssb_set_devtypedata(struct ssb_device *dev, void *data);
static inline
void * ssb_get_devtypedata(struct ssb_device *dev)
{
return dev->devtypedata;
}
struct ssb_driver {
const char *name;
const struct ssb_device_id *id_table;
int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
void (*remove)(struct ssb_device *dev);
int (*suspend)(struct ssb_device *dev, pm_message_t state);
int (*resume)(struct ssb_device *dev);
void (*shutdown)(struct ssb_device *dev);
struct device_driver drv;
};
#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
static inline int ssb_driver_register(struct ssb_driver *drv)
{
return __ssb_driver_register(drv, THIS_MODULE);
}
extern void ssb_driver_unregister(struct ssb_driver *drv);
enum ssb_bustype {
SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
};
/* board_vendor */
#define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */
#define SSB_BOARD_BCM94306MP 0x0418
#define SSB_BOARD_BCM4309G 0x0421
#define SSB_BOARD_BCM4306CB 0x0417
#define SSB_BOARD_BCM4309MP 0x040C
#define SSB_BOARD_MP4318 0x044A
#define SSB_BOARD_BU4306 0x0416
#define SSB_BOARD_BU4309 0x040A
/* chip_package */
#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
#include <linux/ssb/ssb_driver_chipcommon.h>
#include <linux/ssb/ssb_driver_mips.h>
#include <linux/ssb/ssb_driver_extif.h>
#include <linux/ssb/ssb_driver_pci.h>
struct ssb_bus {
/* The MMIO area. */
void __iomem *mmio;
const struct ssb_bus_ops *ops;
/* The core in the basic address register window. (PCI bus only) */
struct ssb_device *mapped_device;
/* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
u8 mapped_pcmcia_seg;
/* Lock for core and segment switching. */
spinlock_t bar_lock;
/* The bus this backplane is running on. */
enum ssb_bustype bustype;
/* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
struct pci_dev *host_pci;
/* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
struct pcmcia_device *host_pcmcia;
#ifdef CONFIG_SSB_PCIHOST
/* Mutex to protect the SPROM writing. */
struct mutex pci_sprom_mutex;
#endif
/* ID information about the Chip. */
u16 chip_id;
u16 chip_rev;
u8 chip_package;
/* List of devices (cores) on the backplane. */
struct ssb_device devices[SSB_MAX_NR_CORES];
u8 nr_devices;
/* Reference count. Number of suspended devices. */
u8 suspend_cnt;
/* Software ID number for this bus. */
unsigned int busnumber;
/* The ChipCommon device (if available). */
struct ssb_chipcommon chipco;
/* The PCI-core device (if available). */
struct ssb_pcicore pcicore;
/* The MIPS-core device (if available). */
struct ssb_mipscore mipscore;
/* The EXTif-core device (if available). */
struct ssb_extif extif;
/* The following structure elements are not available in early
* SSB initialization. Though, they are available for regular
* registered drivers at any stage. So be careful when
* using them in the ssb core code. */
/* ID information about the PCB. */
struct ssb_boardinfo boardinfo;
/* Contents of the SPROM. */
struct ssb_sprom sprom;
/* Internal-only stuff follows. Do not touch. */
struct list_head list;
#ifdef CONFIG_SSB_DEBUG
/* Is the bus already powered up? */
bool powered_up;
int power_warn_count;
#endif /* DEBUG */
};
/* The initialization-invariants. */
struct ssb_init_invariants {
struct ssb_boardinfo boardinfo;
struct ssb_sprom sprom;
};
/* Type of function to fetch the invariants. */
typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
struct ssb_init_invariants *iv);
/* Register a SSB system bus. get_invariants() is called after the
* basic system devices are initialized.
* The invariants are usually fetched from some NVRAM.
* Put the invariants into the struct pointed to by iv. */
extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
unsigned long baseaddr,
ssb_invariants_func_t get_invariants);
#ifdef CONFIG_SSB_PCIHOST
extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
struct pci_dev *host_pci);
#endif /* CONFIG_SSB_PCIHOST */
#ifdef CONFIG_SSB_PCMCIAHOST
extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
struct pcmcia_device *pcmcia_dev,
unsigned long baseaddr);
#endif /* CONFIG_SSB_PCMCIAHOST */
extern void ssb_bus_unregister(struct ssb_bus *bus);
extern u32 ssb_clockspeed(struct ssb_bus *bus);
/* Is the device enabled in hardware? */
int ssb_device_is_enabled(struct ssb_device *dev);
/* Enable a device and pass device-specific SSB_TMSLOW flags.
* If no device-specific flags are available, use 0. */
void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
/* Device MMIO register read/write functions. */
static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
{
return dev->ops->read16(dev, offset);
}
static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
{
return dev->ops->read32(dev, offset);
}
static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
{
dev->ops->write16(dev, offset, value);
}
static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
{
dev->ops->write32(dev, offset, value);
}
/* Translation (routing) bits that need to be ORed to DMA
* addresses before they are given to a device. */
extern u32 ssb_dma_translation(struct ssb_device *dev);
#define SSB_DMA_TRANSLATION_MASK 0xC0000000
#define SSB_DMA_TRANSLATION_SHIFT 30
extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask);
#ifdef CONFIG_SSB_PCIHOST
/* PCI-host wrapper driver */
extern int ssb_pcihost_register(struct pci_driver *driver);
static inline void ssb_pcihost_unregister(struct pci_driver *driver)
{
pci_unregister_driver(driver);
}
#endif /* CONFIG_SSB_PCIHOST */
/* If a driver is shutdown or suspended, call this to signal
* that the bus may be completely powered down. SSB will decide,
* if it's really time to power down the bus, based on if there
* are other devices that want to run. */
extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
/* Before initializing and enabling a device, call this to power-up the bus.
* If you want to allow use of dynamic-power-control, pass the flag.
* Otherwise static always-on powercontrol will be used. */
extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
/* Various helper functions */
extern u32 ssb_admatch_base(u32 adm);
extern u32 ssb_admatch_size(u32 adm);
#endif /* LINUX_SSB_H_ */

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@ -0,0 +1,396 @@
#ifndef LINUX_SSB_CHIPCO_H_
#define LINUX_SSB_CHIPCO_H_
/* SonicsSiliconBackplane CHIPCOMMON core hardware definitions
*
* The chipcommon core provides chip identification, SB control,
* jtag, 0/1/2 uarts, clock frequency control, a watchdog interrupt timer,
* gpio interface, extbus, and support for serial and parallel flashes.
*
* Copyright 2005, Broadcom Corporation
* Copyright 2006, Michael Buesch <mb@bu3sch.de>
*
* Licensed under the GPL version 2. See COPYING for details.
*/
/** ChipCommon core registers. **/
#define SSB_CHIPCO_CHIPID 0x0000
#define SSB_CHIPCO_IDMASK 0x0000FFFF
#define SSB_CHIPCO_REVMASK 0x000F0000
#define SSB_CHIPCO_REVSHIFT 16
#define SSB_CHIPCO_PACKMASK 0x00F00000
#define SSB_CHIPCO_PACKSHIFT 20
#define SSB_CHIPCO_NRCORESMASK 0x0F000000
#define SSB_CHIPCO_NRCORESSHIFT 24
#define SSB_CHIPCO_CAP 0x0004 /* Capabilities */
#define SSB_CHIPCO_CAP_NRUART 0x00000003 /* # of UARTs */
#define SSB_CHIPCO_CAP_MIPSEB 0x00000004 /* MIPS in BigEndian Mode */
#define SSB_CHIPCO_CAP_UARTCLK 0x00000018 /* UART clock select */
#define SSB_CHIPCO_CAP_UARTCLK_INT 0x00000008 /* UARTs are driven by internal divided clock */
#define SSB_CHIPCO_CAP_UARTGPIO 0x00000020 /* UARTs on GPIO 15-12 */
#define SSB_CHIPCO_CAP_EXTBUS 0x000000C0 /* External buses present */
#define SSB_CHIPCO_CAP_FLASHT 0x00000700 /* Flash Type */
#define SSB_CHIPCO_FLASHT_NONE 0x00000000 /* No flash */
#define SSB_CHIPCO_FLASHT_STSER 0x00000100 /* ST serial flash */
#define SSB_CHIPCO_FLASHT_ATSER 0x00000200 /* Atmel serial flash */
#define SSB_CHIPCO_FLASHT_PARA 0x00000700 /* Parallel flash */
#define SSB_CHIPCO_CAP_PLLT 0x00038000 /* PLL Type */
#define SSB_PLLTYPE_NONE 0x00000000
#define SSB_PLLTYPE_1 0x00010000 /* 48Mhz base, 3 dividers */
#define SSB_PLLTYPE_2 0x00020000 /* 48Mhz, 4 dividers */
#define SSB_PLLTYPE_3 0x00030000 /* 25Mhz, 2 dividers */
#define SSB_PLLTYPE_4 0x00008000 /* 48Mhz, 4 dividers */
#define SSB_PLLTYPE_5 0x00018000 /* 25Mhz, 4 dividers */
#define SSB_PLLTYPE_6 0x00028000 /* 100/200 or 120/240 only */
#define SSB_PLLTYPE_7 0x00038000 /* 25Mhz, 4 dividers */
#define SSB_CHIPCO_CAP_PCTL 0x00040000 /* Power Control */
#define SSB_CHIPCO_CAP_OTPS 0x00380000 /* OTP size */
#define SSB_CHIPCO_CAP_OTPS_SHIFT 19
#define SSB_CHIPCO_CAP_OTPS_BASE 5
#define SSB_CHIPCO_CAP_JTAGM 0x00400000 /* JTAG master present */
#define SSB_CHIPCO_CAP_BROM 0x00800000 /* Internal boot ROM active */
#define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
#define SSB_CHIPCO_CORECTL 0x0008
#define SSB_CHIPCO_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */
#define SSB_CHIPCO_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */
#define SSB_CHIPCO_BIST 0x000C
#define SSB_CHIPCO_OTPS 0x0010 /* OTP status */
#define SSB_CHIPCO_OTPS_PROGFAIL 0x80000000
#define SSB_CHIPCO_OTPS_PROTECT 0x00000007
#define SSB_CHIPCO_OTPS_HW_PROTECT 0x00000001
#define SSB_CHIPCO_OTPS_SW_PROTECT 0x00000002
#define SSB_CHIPCO_OTPS_CID_PROTECT 0x00000004
#define SSB_CHIPCO_OTPC 0x0014 /* OTP control */
#define SSB_CHIPCO_OTPC_RECWAIT 0xFF000000
#define SSB_CHIPCO_OTPC_PROGWAIT 0x00FFFF00
#define SSB_CHIPCO_OTPC_PRW_SHIFT 8
#define SSB_CHIPCO_OTPC_MAXFAIL 0x00000038
#define SSB_CHIPCO_OTPC_VSEL 0x00000006
#define SSB_CHIPCO_OTPC_SELVL 0x00000001
#define SSB_CHIPCO_OTPP 0x0018 /* OTP prog */
#define SSB_CHIPCO_OTPP_COL 0x000000FF
#define SSB_CHIPCO_OTPP_ROW 0x0000FF00
#define SSB_CHIPCO_OTPP_ROW_SHIFT 8
#define SSB_CHIPCO_OTPP_READERR 0x10000000
#define SSB_CHIPCO_OTPP_VALUE 0x20000000
#define SSB_CHIPCO_OTPP_READ 0x40000000
#define SSB_CHIPCO_OTPP_START 0x80000000
#define SSB_CHIPCO_OTPP_BUSY 0x80000000
#define SSB_CHIPCO_IRQSTAT 0x0020
#define SSB_CHIPCO_IRQMASK 0x0024
#define SSB_CHIPCO_IRQ_GPIO 0x00000001 /* gpio intr */
#define SSB_CHIPCO_IRQ_EXT 0x00000002 /* ro: ext intr pin (corerev >= 3) */
#define SSB_CHIPCO_IRQ_WDRESET 0x80000000 /* watchdog reset occurred */
#define SSB_CHIPCO_CHIPCTL 0x0028 /* Rev >= 11 only */
#define SSB_CHIPCO_CHIPSTAT 0x002C /* Rev >= 11 only */
#define SSB_CHIPCO_JCMD 0x0030 /* Rev >= 10 only */
#define SSB_CHIPCO_JCMD_START 0x80000000
#define SSB_CHIPCO_JCMD_BUSY 0x80000000
#define SSB_CHIPCO_JCMD_PAUSE 0x40000000
#define SSB_CHIPCO_JCMD0_ACC_MASK 0x0000F000
#define SSB_CHIPCO_JCMD0_ACC_IRDR 0x00000000
#define SSB_CHIPCO_JCMD0_ACC_DR 0x00001000
#define SSB_CHIPCO_JCMD0_ACC_IR 0x00002000
#define SSB_CHIPCO_JCMD0_ACC_RESET 0x00003000
#define SSB_CHIPCO_JCMD0_ACC_IRPDR 0x00004000
#define SSB_CHIPCO_JCMD0_ACC_PDR 0x00005000
#define SSB_CHIPCO_JCMD0_IRW_MASK 0x00000F00
#define SSB_CHIPCO_JCMD_ACC_MASK 0x000F0000 /* Changes for corerev 11 */
#define SSB_CHIPCO_JCMD_ACC_IRDR 0x00000000
#define SSB_CHIPCO_JCMD_ACC_DR 0x00010000
#define SSB_CHIPCO_JCMD_ACC_IR 0x00020000
#define SSB_CHIPCO_JCMD_ACC_RESET 0x00030000
#define SSB_CHIPCO_JCMD_ACC_IRPDR 0x00040000
#define SSB_CHIPCO_JCMD_ACC_PDR 0x00050000
#define SSB_CHIPCO_JCMD_IRW_MASK 0x00001F00
#define SSB_CHIPCO_JCMD_IRW_SHIFT 8
#define SSB_CHIPCO_JCMD_DRW_MASK 0x0000003F
#define SSB_CHIPCO_JIR 0x0034 /* Rev >= 10 only */
#define SSB_CHIPCO_JDR 0x0038 /* Rev >= 10 only */
#define SSB_CHIPCO_JCTL 0x003C /* Rev >= 10 only */
#define SSB_CHIPCO_JCTL_FORCE_CLK 4 /* Force clock */
#define SSB_CHIPCO_JCTL_EXT_EN 2 /* Enable external targets */
#define SSB_CHIPCO_JCTL_EN 1 /* Enable Jtag master */
#define SSB_CHIPCO_FLASHCTL 0x0040
#define SSB_CHIPCO_FLASHCTL_START 0x80000000
#define SSB_CHIPCO_FLASHCTL_BUSY SSB_CHIPCO_FLASHCTL_START
#define SSB_CHIPCO_FLASHADDR 0x0044
#define SSB_CHIPCO_FLASHDATA 0x0048
#define SSB_CHIPCO_BCAST_ADDR 0x0050
#define SSB_CHIPCO_BCAST_DATA 0x0054
#define SSB_CHIPCO_GPIOIN 0x0060
#define SSB_CHIPCO_GPIOOUT 0x0064
#define SSB_CHIPCO_GPIOOUTEN 0x0068
#define SSB_CHIPCO_GPIOCTL 0x006C
#define SSB_CHIPCO_GPIOPOL 0x0070
#define SSB_CHIPCO_GPIOIRQ 0x0074
#define SSB_CHIPCO_WATCHDOG 0x0080
#define SSB_CHIPCO_GPIOTIMER 0x0088 /* LED powersave (corerev >= 16) */
#define SSB_CHIPCO_GPIOTIMER_ONTIME_SHIFT 16
#define SSB_CHIPCO_GPIOTOUTM 0x008C /* LED powersave (corerev >= 16) */
#define SSB_CHIPCO_CLOCK_N 0x0090
#define SSB_CHIPCO_CLOCK_SB 0x0094
#define SSB_CHIPCO_CLOCK_PCI 0x0098
#define SSB_CHIPCO_CLOCK_M2 0x009C
#define SSB_CHIPCO_CLOCK_MIPS 0x00A0
#define SSB_CHIPCO_CLKDIV 0x00A4 /* Rev >= 3 only */
#define SSB_CHIPCO_CLKDIV_SFLASH 0x0F000000
#define SSB_CHIPCO_CLKDIV_SFLASH_SHIFT 24
#define SSB_CHIPCO_CLKDIV_OTP 0x000F0000
#define SSB_CHIPCO_CLKDIV_OTP_SHIFT 16
#define SSB_CHIPCO_CLKDIV_JTAG 0x00000F00
#define SSB_CHIPCO_CLKDIV_JTAG_SHIFT 8
#define SSB_CHIPCO_CLKDIV_UART 0x000000FF
#define SSB_CHIPCO_PLLONDELAY 0x00B0 /* Rev >= 4 only */
#define SSB_CHIPCO_FREFSELDELAY 0x00B4 /* Rev >= 4 only */
#define SSB_CHIPCO_SLOWCLKCTL 0x00B8 /* 6 <= Rev <= 9 only */
#define SSB_CHIPCO_SLOWCLKCTL_SRC 0x00000007 /* slow clock source mask */
#define SSB_CHIPCO_SLOWCLKCTL_SRC_LPO 0x00000000 /* source of slow clock is LPO */
#define SSB_CHIPCO_SLOWCLKCTL_SRC_XTAL 0x00000001 /* source of slow clock is crystal */
#define SSB_CHIPCO_SLOECLKCTL_SRC_PCI 0x00000002 /* source of slow clock is PCI */
#define SSB_CHIPCO_SLOWCLKCTL_LPOFREQ 0x00000200 /* LPOFreqSel, 1: 160Khz, 0: 32KHz */
#define SSB_CHIPCO_SLOWCLKCTL_LPOPD 0x00000400 /* LPOPowerDown, 1: LPO is disabled, 0: LPO is enabled */
#define SSB_CHIPCO_SLOWCLKCTL_FSLOW 0x00000800 /* ForceSlowClk, 1: sb/cores running on slow clock, 0: power logic control */
#define SSB_CHIPCO_SLOWCLKCTL_IPLL 0x00001000 /* IgnorePllOffReq, 1/0: power logic ignores/honors PLL clock disable requests from core */
#define SSB_CHIPCO_SLOWCLKCTL_ENXTAL 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't disable crystal when appropriate */
#define SSB_CHIPCO_SLOWCLKCTL_XTALPU 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */
#define SSB_CHIPCO_SLOWCLKCTL_CLKDIV 0xFFFF0000 /* ClockDivider (SlowClk = 1/(4+divisor)) */
#define SSB_CHIPCO_SLOWCLKCTL_CLKDIV_SHIFT 16
#define SSB_CHIPCO_SYSCLKCTL 0x00C0 /* Rev >= 3 only */
#define SSB_CHIPCO_SYSCLKCTL_IDLPEN 0x00000001 /* ILPen: Enable Idle Low Power */
#define SSB_CHIPCO_SYSCLKCTL_ALPEN 0x00000002 /* ALPen: Enable Active Low Power */
#define SSB_CHIPCO_SYSCLKCTL_PLLEN 0x00000004 /* ForcePLLOn */
#define SSB_CHIPCO_SYSCLKCTL_FORCEALP 0x00000008 /* Force ALP (or HT if ALPen is not set */
#define SSB_CHIPCO_SYSCLKCTL_FORCEHT 0x00000010 /* Force HT */
#define SSB_CHIPCO_SYSCLKCTL_CLKDIV 0xFFFF0000 /* ClkDiv (ILP = 1/(4+divisor)) */
#define SSB_CHIPCO_SYSCLKCTL_CLKDIV_SHIFT 16
#define SSB_CHIPCO_CLKSTSTR 0x00C4 /* Rev >= 3 only */
#define SSB_CHIPCO_PCMCIA_CFG 0x0100
#define SSB_CHIPCO_PCMCIA_MEMWAIT 0x0104
#define SSB_CHIPCO_PCMCIA_ATTRWAIT 0x0108
#define SSB_CHIPCO_PCMCIA_IOWAIT 0x010C
#define SSB_CHIPCO_IDE_CFG 0x0110
#define SSB_CHIPCO_IDE_MEMWAIT 0x0114
#define SSB_CHIPCO_IDE_ATTRWAIT 0x0118
#define SSB_CHIPCO_IDE_IOWAIT 0x011C
#define SSB_CHIPCO_PROG_CFG 0x0120
#define SSB_CHIPCO_PROG_WAITCNT 0x0124
#define SSB_CHIPCO_FLASH_CFG 0x0128
#define SSB_CHIPCO_FLASH_WAITCNT 0x012C
#define SSB_CHIPCO_UART0_DATA 0x0300
#define SSB_CHIPCO_UART0_IMR 0x0304
#define SSB_CHIPCO_UART0_FCR 0x0308
#define SSB_CHIPCO_UART0_LCR 0x030C
#define SSB_CHIPCO_UART0_MCR 0x0310
#define SSB_CHIPCO_UART0_LSR 0x0314
#define SSB_CHIPCO_UART0_MSR 0x0318
#define SSB_CHIPCO_UART0_SCRATCH 0x031C
#define SSB_CHIPCO_UART1_DATA 0x0400
#define SSB_CHIPCO_UART1_IMR 0x0404
#define SSB_CHIPCO_UART1_FCR 0x0408
#define SSB_CHIPCO_UART1_LCR 0x040C
#define SSB_CHIPCO_UART1_MCR 0x0410
#define SSB_CHIPCO_UART1_LSR 0x0414
#define SSB_CHIPCO_UART1_MSR 0x0418
#define SSB_CHIPCO_UART1_SCRATCH 0x041C
/** Clockcontrol masks and values **/
/* SSB_CHIPCO_CLOCK_N */
#define SSB_CHIPCO_CLK_N1 0x0000003F /* n1 control */
#define SSB_CHIPCO_CLK_N2 0x00003F00 /* n2 control */
#define SSB_CHIPCO_CLK_N2_SHIFT 8
#define SSB_CHIPCO_CLK_PLLC 0x000F0000 /* pll control */
#define SSB_CHIPCO_CLK_PLLC_SHIFT 16
/* SSB_CHIPCO_CLOCK_SB/PCI/UART */
#define SSB_CHIPCO_CLK_M1 0x0000003F /* m1 control */
#define SSB_CHIPCO_CLK_M2 0x00003F00 /* m2 control */
#define SSB_CHIPCO_CLK_M2_SHIFT 8
#define SSB_CHIPCO_CLK_M3 0x003F0000 /* m3 control */
#define SSB_CHIPCO_CLK_M3_SHIFT 16
#define SSB_CHIPCO_CLK_MC 0x1F000000 /* mux control */
#define SSB_CHIPCO_CLK_MC_SHIFT 24
/* N3M Clock control magic field values */
#define SSB_CHIPCO_CLK_F6_2 0x02 /* A factor of 2 in */
#define SSB_CHIPCO_CLK_F6_3 0x03 /* 6-bit fields like */
#define SSB_CHIPCO_CLK_F6_4 0x05 /* N1, M1 or M3 */
#define SSB_CHIPCO_CLK_F6_5 0x09
#define SSB_CHIPCO_CLK_F6_6 0x11
#define SSB_CHIPCO_CLK_F6_7 0x21
#define SSB_CHIPCO_CLK_F5_BIAS 5 /* 5-bit fields get this added */
#define SSB_CHIPCO_CLK_MC_BYPASS 0x08
#define SSB_CHIPCO_CLK_MC_M1 0x04
#define SSB_CHIPCO_CLK_MC_M1M2 0x02
#define SSB_CHIPCO_CLK_MC_M1M2M3 0x01
#define SSB_CHIPCO_CLK_MC_M1M3 0x11
/* Type 2 Clock control magic field values */
#define SSB_CHIPCO_CLK_T2_BIAS 2 /* n1, n2, m1 & m3 bias */
#define SSB_CHIPCO_CLK_T2M2_BIAS 3 /* m2 bias */
#define SSB_CHIPCO_CLK_T2MC_M1BYP 1
#define SSB_CHIPCO_CLK_T2MC_M2BYP 2
#define SSB_CHIPCO_CLK_T2MC_M3BYP 4
/* Type 6 Clock control magic field values */
#define SSB_CHIPCO_CLK_T6_MMASK 1 /* bits of interest in m */
#define SSB_CHIPCO_CLK_T6_M0 120000000 /* sb clock for m = 0 */
#define SSB_CHIPCO_CLK_T6_M1 100000000 /* sb clock for m = 1 */
#define SSB_CHIPCO_CLK_SB2MIPS_T6(sb) (2 * (sb))
/* Common clock base */
#define SSB_CHIPCO_CLK_BASE1 24000000 /* Half the clock freq */
#define SSB_CHIPCO_CLK_BASE2 12500000 /* Alternate crystal on some PLL's */
/* Clock control values for 200Mhz in 5350 */
#define SSB_CHIPCO_CLK_5350_N 0x0311
#define SSB_CHIPCO_CLK_5350_M 0x04020009
/** Bits in the config registers **/
#define SSB_CHIPCO_CFG_EN 0x0001 /* Enable */
#define SSB_CHIPCO_CFG_EXTM 0x000E /* Extif Mode */
#define SSB_CHIPCO_CFG_EXTM_ASYNC 0x0002 /* Async/Parallel flash */
#define SSB_CHIPCO_CFG_EXTM_SYNC 0x0004 /* Synchronous */
#define SSB_CHIPCO_CFG_EXTM_PCMCIA 0x0008 /* PCMCIA */
#define SSB_CHIPCO_CFG_EXTM_IDE 0x000A /* IDE */
#define SSB_CHIPCO_CFG_DS16 0x0010 /* Data size, 0=8bit, 1=16bit */
#define SSB_CHIPCO_CFG_CLKDIV 0x0060 /* Sync: Clock divisor */
#define SSB_CHIPCO_CFG_CLKEN 0x0080 /* Sync: Clock enable */
#define SSB_CHIPCO_CFG_BSTRO 0x0100 /* Sync: Size/Bytestrobe */
/** Flash-specific control/status values */
/* flashcontrol opcodes for ST flashes */
#define SSB_CHIPCO_FLASHCTL_ST_WREN 0x0006 /* Write Enable */
#define SSB_CHIPCO_FLASHCTL_ST_WRDIS 0x0004 /* Write Disable */
#define SSB_CHIPCO_FLASHCTL_ST_RDSR 0x0105 /* Read Status Register */
#define SSB_CHIPCO_FLASHCTL_ST_WRSR 0x0101 /* Write Status Register */
#define SSB_CHIPCO_FLASHCTL_ST_READ 0x0303 /* Read Data Bytes */
#define SSB_CHIPCO_FLASHCTL_ST_PP 0x0302 /* Page Program */
#define SSB_CHIPCO_FLASHCTL_ST_SE 0x02D8 /* Sector Erase */
#define SSB_CHIPCO_FLASHCTL_ST_BE 0x00C7 /* Bulk Erase */
#define SSB_CHIPCO_FLASHCTL_ST_DP 0x00B9 /* Deep Power-down */
#define SSB_CHIPCO_FLASHCTL_ST_RSIG 0x03AB /* Read Electronic Signature */
/* Status register bits for ST flashes */
#define SSB_CHIPCO_FLASHSTA_ST_WIP 0x01 /* Write In Progress */
#define SSB_CHIPCO_FLASHSTA_ST_WEL 0x02 /* Write Enable Latch */
#define SSB_CHIPCO_FLASHSTA_ST_BP 0x1C /* Block Protect */
#define SSB_CHIPCO_FLASHSTA_ST_BP_SHIFT 2
#define SSB_CHIPCO_FLASHSTA_ST_SRWD 0x80 /* Status Register Write Disable */
/* flashcontrol opcodes for Atmel flashes */
#define SSB_CHIPCO_FLASHCTL_AT_READ 0x07E8
#define SSB_CHIPCO_FLASHCTL_AT_PAGE_READ 0x07D2
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_READ /* FIXME */
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_READ /* FIXME */
#define SSB_CHIPCO_FLASHCTL_AT_STATUS 0x01D7
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_WRITE 0x0384
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_WRITE 0x0387
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_ERASE_PRGM 0x0283 /* Erase program */
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_ERASE_PRGM 0x0286 /* Erase program */
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_PROGRAM 0x0288
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_PROGRAM 0x0289
#define SSB_CHIPCO_FLASHCTL_AT_PAGE_ERASE 0x0281
#define SSB_CHIPCO_FLASHCTL_AT_BLOCK_ERASE 0x0250
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_WRER_PRGM 0x0382 /* Write erase program */
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_WRER_PRGM 0x0385 /* Write erase program */
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_LOAD 0x0253
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_LOAD 0x0255
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_COMPARE 0x0260
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_COMPARE 0x0261
#define SSB_CHIPCO_FLASHCTL_AT_BUF1_REPROGRAM 0x0258
#define SSB_CHIPCO_FLASHCTL_AT_BUF2_REPROGRAM 0x0259
/* Status register bits for Atmel flashes */
#define SSB_CHIPCO_FLASHSTA_AT_READY 0x80
#define SSB_CHIPCO_FLASHSTA_AT_MISMATCH 0x40
#define SSB_CHIPCO_FLASHSTA_AT_ID 0x38
#define SSB_CHIPCO_FLASHSTA_AT_ID_SHIFT 3
/** OTP **/
/* OTP regions */
#define SSB_CHIPCO_OTP_HW_REGION SSB_CHIPCO_OTPS_HW_PROTECT
#define SSB_CHIPCO_OTP_SW_REGION SSB_CHIPCO_OTPS_SW_PROTECT
#define SSB_CHIPCO_OTP_CID_REGION SSB_CHIPCO_OTPS_CID_PROTECT
/* OTP regions (Byte offsets from otp size) */
#define SSB_CHIPCO_OTP_SWLIM_OFF (-8)
#define SSB_CHIPCO_OTP_CIDBASE_OFF 0
#define SSB_CHIPCO_OTP_CIDLIM_OFF 8
/* Predefined OTP words (Word offset from otp size) */
#define SSB_CHIPCO_OTP_BOUNDARY_OFF (-4)
#define SSB_CHIPCO_OTP_HWSIGN_OFF (-3)
#define SSB_CHIPCO_OTP_SWSIGN_OFF (-2)
#define SSB_CHIPCO_OTP_CIDSIGN_OFF (-1)
#define SSB_CHIPCO_OTP_CID_OFF 0
#define SSB_CHIPCO_OTP_PKG_OFF 1
#define SSB_CHIPCO_OTP_FID_OFF 2
#define SSB_CHIPCO_OTP_RSV_OFF 3
#define SSB_CHIPCO_OTP_LIM_OFF 4
#define SSB_CHIPCO_OTP_SIGNATURE 0x578A
#define SSB_CHIPCO_OTP_MAGIC 0x4E56
struct ssb_device;
struct ssb_serial_port;
struct ssb_chipcommon {
struct ssb_device *dev;
u32 capabilities;
/* Fast Powerup Delay constant */
u16 fast_pwrup_delay;
};
extern void ssb_chipcommon_init(struct ssb_chipcommon *cc);
#include <linux/pm.h>
extern void ssb_chipco_suspend(struct ssb_chipcommon *cc, pm_message_t state);
extern void ssb_chipco_resume(struct ssb_chipcommon *cc);
extern void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m);
extern void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m);
extern void ssb_chipco_timing_init(struct ssb_chipcommon *cc,
unsigned long ns_per_cycle);
enum ssb_clkmode {
SSB_CLKMODE_SLOW,
SSB_CLKMODE_FAST,
SSB_CLKMODE_DYNAMIC,
};
extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
enum ssb_clkmode mode);
extern void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc,
u32 ticks);
u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask);
void ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value);
void ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
#ifdef CONFIG_SSB_SERIAL
extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
struct ssb_serial_port *ports);
#endif /* CONFIG_SSB_SERIAL */
#endif /* LINUX_SSB_CHIPCO_H_ */

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/*
* Hardware-specific External Interface I/O core definitions
* for the BCM47xx family of SiliconBackplane-based chips.
*
* The External Interface core supports a total of three external chip selects
* supporting external interfaces. One of the external chip selects is
* used for Flash, one is used for PCMCIA, and the other may be
* programmed to support either a synchronous interface or an
* asynchronous interface. The asynchronous interface can be used to
* support external devices such as UARTs and the BCM2019 Bluetooth
* baseband processor.
* The external interface core also contains 2 on-chip 16550 UARTs, clock
* frequency control, a watchdog interrupt timer, and a GPIO interface.
*
* Copyright 2005, Broadcom Corporation
* Copyright 2006, Michael Buesch
*
* Licensed under the GPL version 2. See COPYING for details.
*/
#ifndef LINUX_SSB_EXTIFCORE_H_
#define LINUX_SSB_EXTIFCORE_H_
/* external interface address space */
#define SSB_EXTIF_PCMCIA_MEMBASE(x) (x)
#define SSB_EXTIF_PCMCIA_IOBASE(x) ((x) + 0x100000)
#define SSB_EXTIF_PCMCIA_CFGBASE(x) ((x) + 0x200000)
#define SSB_EXTIF_CFGIF_BASE(x) ((x) + 0x800000)
#define SSB_EXTIF_FLASH_BASE(x) ((x) + 0xc00000)
#define SSB_EXTIF_NR_GPIOOUT 5
/* GPIO NOTE:
* The multiple instances of output and output enable registers
* are present to allow driver software for multiple cores to control
* gpio outputs without needing to share a single register pair.
* Use the following helper macro to get a register offset value.
*/
#define SSB_EXTIF_GPIO_OUT(index) ({ \
BUILD_BUG_ON(index >= SSB_EXTIF_NR_GPIOOUT); \
SSB_EXTIF_GPIO_OUT_BASE + ((index) * 8); \
})
#define SSB_EXTIF_GPIO_OUTEN(index) ({ \
BUILD_BUG_ON(index >= SSB_EXTIF_NR_GPIOOUT); \
SSB_EXTIF_GPIO_OUTEN_BASE + ((index) * 8); \
})
/** EXTIF core registers **/
#define SSB_EXTIF_CTL 0x0000
#define SSB_EXTIF_CTL_UARTEN (1 << 0) /* UART enable */
#define SSB_EXTIF_EXTSTAT 0x0004
#define SSB_EXTIF_EXTSTAT_EMODE (1 << 0) /* Endian mode (ro) */
#define SSB_EXTIF_EXTSTAT_EIRQPIN (1 << 1) /* External interrupt pin (ro) */
#define SSB_EXTIF_EXTSTAT_GPIOIRQPIN (1 << 2) /* GPIO interrupt pin (ro) */
#define SSB_EXTIF_PCMCIA_CFG 0x0010
#define SSB_EXTIF_PCMCIA_MEMWAIT 0x0014
#define SSB_EXTIF_PCMCIA_ATTRWAIT 0x0018
#define SSB_EXTIF_PCMCIA_IOWAIT 0x001C
#define SSB_EXTIF_PROG_CFG 0x0020
#define SSB_EXTIF_PROG_WAITCNT 0x0024
#define SSB_EXTIF_FLASH_CFG 0x0028
#define SSB_EXTIF_FLASH_WAITCNT 0x002C
#define SSB_EXTIF_WATCHDOG 0x0040
#define SSB_EXTIF_CLOCK_N 0x0044
#define SSB_EXTIF_CLOCK_SB 0x0048
#define SSB_EXTIF_CLOCK_PCI 0x004C
#define SSB_EXTIF_CLOCK_MII 0x0050
#define SSB_EXTIF_GPIO_IN 0x0060
#define SSB_EXTIF_GPIO_OUT_BASE 0x0064
#define SSB_EXTIF_GPIO_OUTEN_BASE 0x0068
#define SSB_EXTIF_EJTAG_OUTEN 0x0090
#define SSB_EXTIF_GPIO_INTPOL 0x0094
#define SSB_EXTIF_GPIO_INTMASK 0x0098
#define SSB_EXTIF_UART_DATA 0x0300
#define SSB_EXTIF_UART_TIMER 0x0310
#define SSB_EXTIF_UART_FCR 0x0320
#define SSB_EXTIF_UART_LCR 0x0330
#define SSB_EXTIF_UART_MCR 0x0340
#define SSB_EXTIF_UART_LSR 0x0350
#define SSB_EXTIF_UART_MSR 0x0360
#define SSB_EXTIF_UART_SCRATCH 0x0370
/* pcmcia/prog/flash_config */
#define SSB_EXTCFG_EN (1 << 0) /* enable */
#define SSB_EXTCFG_MODE 0xE /* mode */
#define SSB_EXTCFG_MODE_SHIFT 1
#define SSB_EXTCFG_MODE_FLASH 0x0 /* flash/asynchronous mode */
#define SSB_EXTCFG_MODE_SYNC 0x2 /* synchronous mode */
#define SSB_EXTCFG_MODE_PCMCIA 0x4 /* pcmcia mode */
#define SSB_EXTCFG_DS16 (1 << 4) /* destsize: 0=8bit, 1=16bit */
#define SSB_EXTCFG_BSWAP (1 << 5) /* byteswap */
#define SSB_EXTCFG_CLKDIV 0xC0 /* clock divider */
#define SSB_EXTCFG_CLKDIV_SHIFT 6
#define SSB_EXTCFG_CLKDIV_2 0x0 /* backplane/2 */
#define SSB_EXTCFG_CLKDIV_3 0x40 /* backplane/3 */
#define SSB_EXTCFG_CLKDIV_4 0x80 /* backplane/4 */
#define SSB_EXTCFG_CLKEN (1 << 8) /* clock enable */
#define SSB_EXTCFG_STROBE (1 << 9) /* size/bytestrobe (synch only) */
/* pcmcia_memwait */
#define SSB_PCMCIA_MEMW_0 0x0000003F /* waitcount0 */
#define SSB_PCMCIA_MEMW_1 0x00001F00 /* waitcount1 */
#define SSB_PCMCIA_MEMW_1_SHIFT 8
#define SSB_PCMCIA_MEMW_2 0x001F0000 /* waitcount2 */
#define SSB_PCMCIA_MEMW_2_SHIFT 16
#define SSB_PCMCIA_MEMW_3 0x1F000000 /* waitcount3 */
#define SSB_PCMCIA_MEMW_3_SHIFT 24
/* pcmcia_attrwait */
#define SSB_PCMCIA_ATTW_0 0x0000003F /* waitcount0 */
#define SSB_PCMCIA_ATTW_1 0x00001F00 /* waitcount1 */
#define SSB_PCMCIA_ATTW_1_SHIFT 8
#define SSB_PCMCIA_ATTW_2 0x001F0000 /* waitcount2 */
#define SSB_PCMCIA_ATTW_2_SHIFT 16
#define SSB_PCMCIA_ATTW_3 0x1F000000 /* waitcount3 */
#define SSB_PCMCIA_ATTW_3_SHIFT 24
/* pcmcia_iowait */
#define SSB_PCMCIA_IOW_0 0x0000003F /* waitcount0 */
#define SSB_PCMCIA_IOW_1 0x00001F00 /* waitcount1 */
#define SSB_PCMCIA_IOW_1_SHIFT 8
#define SSB_PCMCIA_IOW_2 0x001F0000 /* waitcount2 */
#define SSB_PCMCIA_IOW_2_SHIFT 16
#define SSB_PCMCIA_IOW_3 0x1F000000 /* waitcount3 */
#define SSB_PCMCIA_IOW_3_SHIFT 24
/* prog_waitcount */
#define SSB_PROG_WCNT_0 0x0000001F /* waitcount0 */
#define SSB_PROG_WCNT_1 0x00001F00 /* waitcount1 */
#define SSB_PROG_WCNT_1_SHIFT 8
#define SSB_PROG_WCNT_2 0x001F0000 /* waitcount2 */
#define SSB_PROG_WCNT_2_SHIFT 16
#define SSB_PROG_WCNT_3 0x1F000000 /* waitcount3 */
#define SSB_PROG_WCNT_3_SHIFT 24
#define SSB_PROG_W0 0x0000000C
#define SSB_PROG_W1 0x00000A00
#define SSB_PROG_W2 0x00020000
#define SSB_PROG_W3 0x01000000
/* flash_waitcount */
#define SSB_FLASH_WCNT_0 0x0000001F /* waitcount0 */
#define SSB_FLASH_WCNT_1 0x00001F00 /* waitcount1 */
#define SSB_FLASH_WCNT_1_SHIFT 8
#define SSB_FLASH_WCNT_2 0x001F0000 /* waitcount2 */
#define SSB_FLASH_WCNT_2_SHIFT 16
#define SSB_FLASH_WCNT_3 0x1F000000 /* waitcount3 */
#define SSB_FLASH_WCNT_3_SHIFT 24
/* watchdog */
#define SSB_EXTIF_WATCHDOG_CLK 48000000 /* Hz */
#ifdef CONFIG_SSB_DRIVER_EXTIF
struct ssb_extif {
struct ssb_device *dev;
};
static inline bool ssb_extif_available(struct ssb_extif *extif)
{
return (extif->dev != NULL);
}
extern void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
u32 *plltype, u32 *n, u32 *m);
extern void ssb_extif_timing_init(struct ssb_extif *extif,
unsigned long ns);
u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask);
void ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value);
void ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value);
#ifdef CONFIG_SSB_SERIAL
extern int ssb_extif_serial_init(struct ssb_extif *extif,
struct ssb_serial_port *ports);
#endif /* CONFIG_SSB_SERIAL */
#else /* CONFIG_SSB_DRIVER_EXTIF */
/* extif disabled */
struct ssb_extif {
};
static inline bool ssb_extif_available(struct ssb_extif *extif)
{
return 0;
}
static inline
void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
u32 *plltype, u32 *n, u32 *m)
{
}
#endif /* CONFIG_SSB_DRIVER_EXTIF */
#endif /* LINUX_SSB_EXTIFCORE_H_ */

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#ifndef LINUX_SSB_MIPSCORE_H_
#define LINUX_SSB_MIPSCORE_H_
#ifdef CONFIG_SSB_DRIVER_MIPS
struct ssb_device;
struct ssb_serial_port {
void *regs;
unsigned long clockspeed;
unsigned int irq;
unsigned int baud_base;
unsigned int reg_shift;
};
struct ssb_mipscore {
struct ssb_device *dev;
int nr_serial_ports;
struct ssb_serial_port serial_ports[4];
u8 flash_buswidth;
u32 flash_window;
u32 flash_window_size;
};
extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
extern u32 ssb_cpu_clock(struct ssb_mipscore *mcore);
extern unsigned int ssb_mips_irq(struct ssb_device *dev);
#else /* CONFIG_SSB_DRIVER_MIPS */
struct ssb_mipscore {
};
static inline
void ssb_mipscore_init(struct ssb_mipscore *mcore)
{
}
#endif /* CONFIG_SSB_DRIVER_MIPS */
#endif /* LINUX_SSB_MIPSCORE_H_ */

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#ifndef LINUX_SSB_PCICORE_H_
#define LINUX_SSB_PCICORE_H_
#ifdef CONFIG_SSB_DRIVER_PCICORE
/* PCI core registers. */
#define SSB_PCICORE_CTL 0x0000 /* PCI Control */
#define SSB_PCICORE_CTL_RST_OE 0x00000001 /* PCI_RESET Output Enable */
#define SSB_PCICORE_CTL_RST 0x00000002 /* PCI_RESET driven out to pin */
#define SSB_PCICORE_CTL_CLK_OE 0x00000004 /* Clock gate Output Enable */
#define SSB_PCICORE_CTL_CLK 0x00000008 /* Gate for clock driven out to pin */
#define SSB_PCICORE_ARBCTL 0x0010 /* PCI Arbiter Control */
#define SSB_PCICORE_ARBCTL_INTERN 0x00000001 /* Use internal arbiter */
#define SSB_PCICORE_ARBCTL_EXTERN 0x00000002 /* Use external arbiter */
#define SSB_PCICORE_ARBCTL_PARKID 0x00000006 /* Mask, selects which agent is parked on an idle bus */
#define SSB_PCICORE_ARBCTL_PARKID_LAST 0x00000000 /* Last requestor */
#define SSB_PCICORE_ARBCTL_PARKID_4710 0x00000002 /* 4710 */
#define SSB_PCICORE_ARBCTL_PARKID_EXT0 0x00000004 /* External requestor 0 */
#define SSB_PCICORE_ARBCTL_PARKID_EXT1 0x00000006 /* External requestor 1 */
#define SSB_PCICORE_ISTAT 0x0020 /* Interrupt status */
#define SSB_PCICORE_ISTAT_INTA 0x00000001 /* PCI INTA# */
#define SSB_PCICORE_ISTAT_INTB 0x00000002 /* PCI INTB# */
#define SSB_PCICORE_ISTAT_SERR 0x00000004 /* PCI SERR# (write to clear) */
#define SSB_PCICORE_ISTAT_PERR 0x00000008 /* PCI PERR# (write to clear) */
#define SSB_PCICORE_ISTAT_PME 0x00000010 /* PCI PME# */
#define SSB_PCICORE_IMASK 0x0024 /* Interrupt mask */
#define SSB_PCICORE_IMASK_INTA 0x00000001 /* PCI INTA# */
#define SSB_PCICORE_IMASK_INTB 0x00000002 /* PCI INTB# */
#define SSB_PCICORE_IMASK_SERR 0x00000004 /* PCI SERR# */
#define SSB_PCICORE_IMASK_PERR 0x00000008 /* PCI PERR# */
#define SSB_PCICORE_IMASK_PME 0x00000010 /* PCI PME# */
#define SSB_PCICORE_MBOX 0x0028 /* Backplane to PCI Mailbox */
#define SSB_PCICORE_MBOX_F0_0 0x00000100 /* PCI function 0, INT 0 */
#define SSB_PCICORE_MBOX_F0_1 0x00000200 /* PCI function 0, INT 1 */
#define SSB_PCICORE_MBOX_F1_0 0x00000400 /* PCI function 1, INT 0 */
#define SSB_PCICORE_MBOX_F1_1 0x00000800 /* PCI function 1, INT 1 */
#define SSB_PCICORE_MBOX_F2_0 0x00001000 /* PCI function 2, INT 0 */
#define SSB_PCICORE_MBOX_F2_1 0x00002000 /* PCI function 2, INT 1 */
#define SSB_PCICORE_MBOX_F3_0 0x00004000 /* PCI function 3, INT 0 */
#define SSB_PCICORE_MBOX_F3_1 0x00008000 /* PCI function 3, INT 1 */
#define SSB_PCICORE_BCAST_ADDR 0x0050 /* Backplane Broadcast Address */
#define SSB_PCICORE_BCAST_ADDR_MASK 0x000000FF
#define SSB_PCICORE_BCAST_DATA 0x0054 /* Backplane Broadcast Data */
#define SSB_PCICORE_GPIO_IN 0x0060 /* rev >= 2 only */
#define SSB_PCICORE_GPIO_OUT 0x0064 /* rev >= 2 only */
#define SSB_PCICORE_GPIO_ENABLE 0x0068 /* rev >= 2 only */
#define SSB_PCICORE_GPIO_CTL 0x006C /* rev >= 2 only */
#define SSB_PCICORE_SBTOPCI0 0x0100 /* Backplane to PCI translation 0 (sbtopci0) */
#define SSB_PCICORE_SBTOPCI0_MASK 0xFC000000
#define SSB_PCICORE_SBTOPCI1 0x0104 /* Backplane to PCI translation 1 (sbtopci1) */
#define SSB_PCICORE_SBTOPCI1_MASK 0xFC000000
#define SSB_PCICORE_SBTOPCI2 0x0108 /* Backplane to PCI translation 2 (sbtopci2) */
#define SSB_PCICORE_SBTOPCI2_MASK 0xC0000000
/* SBtoPCIx */
#define SSB_PCICORE_SBTOPCI_MEM 0x00000000
#define SSB_PCICORE_SBTOPCI_IO 0x00000001
#define SSB_PCICORE_SBTOPCI_CFG0 0x00000002
#define SSB_PCICORE_SBTOPCI_CFG1 0x00000003
#define SSB_PCICORE_SBTOPCI_PREF 0x00000004 /* Prefetch enable */
#define SSB_PCICORE_SBTOPCI_BURST 0x00000008 /* Burst enable */
#define SSB_PCICORE_SBTOPCI_MRM 0x00000020 /* Memory Read Multiple */
#define SSB_PCICORE_SBTOPCI_RC 0x00000030 /* Read Command mask (rev >= 11) */
#define SSB_PCICORE_SBTOPCI_RC_READ 0x00000000 /* Memory read */
#define SSB_PCICORE_SBTOPCI_RC_READL 0x00000010 /* Memory read line */
#define SSB_PCICORE_SBTOPCI_RC_READM 0x00000020 /* Memory read multiple */
/* PCIcore specific boardflags */
#define SSB_PCICORE_BFL_NOPCI 0x00000400 /* Board leaves PCI floating */
struct ssb_pcicore {
struct ssb_device *dev;
u8 setup_done:1;
u8 hostmode:1;
u8 cardbusmode:1;
};
extern void ssb_pcicore_init(struct ssb_pcicore *pc);
/* Enable IRQ routing for a specific device */
extern int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,
struct ssb_device *dev);
#else /* CONFIG_SSB_DRIVER_PCICORE */
struct ssb_pcicore {
};
static inline
void ssb_pcicore_init(struct ssb_pcicore *pc)
{
}
static inline
int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,
struct ssb_device *dev)
{
return 0;
}
#endif /* CONFIG_SSB_DRIVER_PCICORE */
#endif /* LINUX_SSB_PCICORE_H_ */

View file

@ -0,0 +1,292 @@
#ifndef LINUX_SSB_REGS_H_
#define LINUX_SSB_REGS_H_
/* SiliconBackplane Address Map.
* All regions may not exist on all chips.
*/
#define SSB_SDRAM_BASE 0x00000000U /* Physical SDRAM */
#define SSB_PCI_MEM 0x08000000U /* Host Mode sb2pcitranslation0 (64 MB) */
#define SSB_PCI_CFG 0x0c000000U /* Host Mode sb2pcitranslation1 (64 MB) */
#define SSB_SDRAM_SWAPPED 0x10000000U /* Byteswapped Physical SDRAM */
#define SSB_ENUM_BASE 0x18000000U /* Enumeration space base */
#define SSB_ENUM_LIMIT 0x18010000U /* Enumeration space limit */
#define SSB_FLASH2 0x1c000000U /* Flash Region 2 (region 1 shadowed here) */
#define SSB_FLASH2_SZ 0x02000000U /* Size of Flash Region 2 */
#define SSB_EXTIF_BASE 0x1f000000U /* External Interface region base address */
#define SSB_FLASH1 0x1fc00000U /* Flash Region 1 */
#define SSB_FLASH1_SZ 0x00400000U /* Size of Flash Region 1 */
#define SSB_PCI_DMA 0x40000000U /* Client Mode sb2pcitranslation2 (1 GB) */
#define SSB_PCI_DMA_SZ 0x40000000U /* Client Mode sb2pcitranslation2 size in bytes */
#define SSB_PCIE_DMA_L32 0x00000000U /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), low 32 bits */
#define SSB_PCIE_DMA_H32 0x80000000U /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), high 32 bits */
#define SSB_EUART (SSB_EXTIF_BASE + 0x00800000)
#define SSB_LED (SSB_EXTIF_BASE + 0x00900000)
/* Enumeration space constants */
#define SSB_CORE_SIZE 0x1000 /* Size of a core MMIO area */
#define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE)
/* mips address */
#define SSB_EJTAG 0xff200000 /* MIPS EJTAG space (2M) */
/* SSB PCI config space registers. */
#define SSB_PMCSR 0x44
#define SSB_PE 0x100
#define SSB_BAR0_WIN 0x80 /* Backplane address space 0 */
#define SSB_BAR1_WIN 0x84 /* Backplane address space 1 */
#define SSB_SPROMCTL 0x88 /* SPROM control */
#define SSB_SPROMCTL_WE 0x10 /* SPROM write enable */
#define SSB_BAR1_CONTROL 0x8c /* Address space 1 burst control */
#define SSB_PCI_IRQS 0x90 /* PCI interrupts */
#define SSB_PCI_IRQMASK 0x94 /* PCI IRQ control and mask (pcirev >= 6 only) */
#define SSB_BACKPLANE_IRQS 0x98 /* Backplane Interrupts */
#define SSB_GPIO_IN 0xB0 /* GPIO Input (pcirev >= 3 only) */
#define SSB_GPIO_OUT 0xB4 /* GPIO Output (pcirev >= 3 only) */
#define SSB_GPIO_OUT_ENABLE 0xB8 /* GPIO Output Enable/Disable (pcirev >= 3 only) */
#define SSB_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */
#define SSB_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */
#define SSB_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */
#define SSB_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */
#define SSB_BAR0_MAX_RETRIES 50
/* Silicon backplane configuration register definitions */
#define SSB_IPSFLAG 0x0F08
#define SSB_IPSFLAG_IRQ1 0x0000003F /* which sbflags get routed to mips interrupt 1 */
#define SSB_IPSFLAG_IRQ1_SHIFT 0
#define SSB_IPSFLAG_IRQ2 0x00003F00 /* which sbflags get routed to mips interrupt 2 */
#define SSB_IPSFLAG_IRQ2_SHIFT 8
#define SSB_IPSFLAG_IRQ3 0x003F0000 /* which sbflags get routed to mips interrupt 3 */
#define SSB_IPSFLAG_IRQ3_SHIFT 16
#define SSB_IPSFLAG_IRQ4 0x3F000000 /* which sbflags get routed to mips interrupt 4 */
#define SSB_IPSFLAG_IRQ4_SHIFT 24
#define SSB_TPSFLAG 0x0F18
#define SSB_TPSFLAG_BPFLAG 0x0000003F /* Backplane flag # */
#define SSB_TPSFLAG_ALWAYSIRQ 0x00000040 /* IRQ is always sent on the Backplane */
#define SSB_TMERRLOGA 0x0F48
#define SSB_TMERRLOG 0x0F50
#define SSB_ADMATCH3 0x0F60
#define SSB_ADMATCH2 0x0F68
#define SSB_ADMATCH1 0x0F70
#define SSB_IMSTATE 0x0F90 /* SB Initiator Agent State */
#define SSB_IMSTATE_PC 0x0000000f /* Pipe Count */
#define SSB_IMSTATE_AP_MASK 0x00000030 /* Arbitration Priority */
#define SSB_IMSTATE_AP_BOTH 0x00000000 /* Use both timeslices and token */
#define SSB_IMSTATE_AP_TS 0x00000010 /* Use timeslices only */
#define SSB_IMSTATE_AP_TK 0x00000020 /* Use token only */
#define SSB_IMSTATE_AP_RSV 0x00000030 /* Reserved */
#define SSB_IMSTATE_IBE 0x00020000 /* In Band Error */
#define SSB_IMSTATE_TO 0x00040000 /* Timeout */
#define SSB_INTVEC 0x0F94 /* SB Interrupt Mask */
#define SSB_INTVEC_PCI 0x00000001 /* Enable interrupts for PCI */
#define SSB_INTVEC_ENET0 0x00000002 /* Enable interrupts for enet 0 */
#define SSB_INTVEC_ILINE20 0x00000004 /* Enable interrupts for iline20 */
#define SSB_INTVEC_CODEC 0x00000008 /* Enable interrupts for v90 codec */
#define SSB_INTVEC_USB 0x00000010 /* Enable interrupts for usb */
#define SSB_INTVEC_EXTIF 0x00000020 /* Enable interrupts for external i/f */
#define SSB_INTVEC_ENET1 0x00000040 /* Enable interrupts for enet 1 */
#define SSB_TMSLOW 0x0F98 /* SB Target State Low */
#define SSB_TMSLOW_RESET 0x00000001 /* Reset */
#define SSB_TMSLOW_REJECT_22 0x00000002 /* Reject (Backplane rev 2.2) */
#define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */
#define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */
#define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */
#define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */
#define SSB_TMSLOW_BE 0x80000000 /* BIST Enable */
#define SSB_TMSHIGH 0x0F9C /* SB Target State High */
#define SSB_TMSHIGH_SERR 0x00000001 /* S-error */
#define SSB_TMSHIGH_INT 0x00000002 /* Interrupt */
#define SSB_TMSHIGH_BUSY 0x00000004 /* Busy */
#define SSB_TMSHIGH_TO 0x00000020 /* Timeout. Backplane rev >= 2.3 only */
#define SSB_TMSHIGH_COREFL 0x1FFF0000 /* Core specific flags */
#define SSB_TMSHIGH_COREFL_SHIFT 16
#define SSB_TMSHIGH_DMA64 0x10000000 /* 64bit DMA supported */
#define SSB_TMSHIGH_GCR 0x20000000 /* Gated Clock Request */
#define SSB_TMSHIGH_BISTF 0x40000000 /* BIST Failed */
#define SSB_TMSHIGH_BISTD 0x80000000 /* BIST Done */
#define SSB_BWA0 0x0FA0
#define SSB_IMCFGLO 0x0FA8
#define SSB_IMCFGLO_SERTO 0x00000007 /* Service timeout */
#define SSB_IMCFGLO_REQTO 0x00000070 /* Request timeout */
#define SSB_IMCFGLO_REQTO_SHIFT 4
#define SSB_IMCFGLO_CONNID 0x00FF0000 /* Connection ID */
#define SSB_IMCFGLO_CONNID_SHIFT 16
#define SSB_IMCFGHI 0x0FAC
#define SSB_ADMATCH0 0x0FB0
#define SSB_TMCFGLO 0x0FB8
#define SSB_TMCFGHI 0x0FBC
#define SSB_BCONFIG 0x0FC0
#define SSB_BSTATE 0x0FC8
#define SSB_ACTCFG 0x0FD8
#define SSB_FLAGST 0x0FE8
#define SSB_IDLOW 0x0FF8
#define SSB_IDLOW_CFGSP 0x00000003 /* Config Space */
#define SSB_IDLOW_ADDRNGE 0x00000038 /* Address Ranges supported */
#define SSB_IDLOW_ADDRNGE_SHIFT 3
#define SSB_IDLOW_SYNC 0x00000040
#define SSB_IDLOW_INITIATOR 0x00000080
#define SSB_IDLOW_MIBL 0x00000F00 /* Minimum Backplane latency */
#define SSB_IDLOW_MIBL_SHIFT 8
#define SSB_IDLOW_MABL 0x0000F000 /* Maximum Backplane latency */
#define SSB_IDLOW_MABL_SHIFT 12
#define SSB_IDLOW_TIF 0x00010000 /* This Initiator is first */
#define SSB_IDLOW_CCW 0x000C0000 /* Cycle counter width */
#define SSB_IDLOW_CCW_SHIFT 18
#define SSB_IDLOW_TPT 0x00F00000 /* Target ports */
#define SSB_IDLOW_TPT_SHIFT 20
#define SSB_IDLOW_INITP 0x0F000000 /* Initiator ports */
#define SSB_IDLOW_INITP_SHIFT 24
#define SSB_IDLOW_SSBREV 0xF0000000 /* Sonics Backplane Revision code */
#define SSB_IDLOW_SSBREV_22 0x00000000 /* <= 2.2 */
#define SSB_IDLOW_SSBREV_23 0x10000000 /* 2.3 */
#define SSB_IDHIGH 0x0FFC /* SB Identification High */
#define SSB_IDHIGH_RCLO 0x0000000F /* Revision Code (low part) */
#define SSB_IDHIGH_CC 0x00008FF0 /* Core Code */
#define SSB_IDHIGH_CC_SHIFT 4
#define SSB_IDHIGH_RCHI 0x00007000 /* Revision Code (high part) */
#define SSB_IDHIGH_RCHI_SHIFT 8 /* yes, shift 8 is right */
#define SSB_IDHIGH_VC 0xFFFF0000 /* Vendor Code */
#define SSB_IDHIGH_VC_SHIFT 16
/* SPROM shadow area. If not otherwise noted, fields are
* two bytes wide. Note that the SPROM can _only_ be read
* in two-byte quantinies.
*/
#define SSB_SPROMSIZE_WORDS 64
#define SSB_SPROMSIZE_BYTES (SSB_SPROMSIZE_WORDS * sizeof(u16))
#define SSB_SPROM_BASE 0x1000
#define SSB_SPROM_REVISION 0x107E
#define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */
#define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */
#define SSB_SPROM_REVISION_CRC_SHIFT 8
/* SPROM Revision 1 */
#define SSB_SPROM1_SPID 0x1004 /* Subsystem Product ID for PCI */
#define SSB_SPROM1_SVID 0x1006 /* Subsystem Vendor ID for PCI */
#define SSB_SPROM1_PID 0x1008 /* Product ID for PCI */
#define SSB_SPROM1_IL0MAC 0x1048 /* 6 bytes MAC address for 802.11b/g */
#define SSB_SPROM1_ET0MAC 0x104E /* 6 bytes MAC address for Ethernet */
#define SSB_SPROM1_ET1MAC 0x1054 /* 6 bytes MAC address for 802.11a */
#define SSB_SPROM1_ETHPHY 0x105A /* Ethernet PHY settings */
#define SSB_SPROM1_ETHPHY_ET0A 0x001F /* MII Address for enet0 */
#define SSB_SPROM1_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */
#define SSB_SPROM1_ETHPHY_ET1A_SHIFT 5
#define SSB_SPROM1_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
#define SSB_SPROM1_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
#define SSB_SPROM1_BINF 0x105C /* Board info */
#define SSB_SPROM1_BINF_BREV 0x00FF /* Board Revision */
#define SSB_SPROM1_BINF_CCODE 0x0F00 /* Country Code */
#define SSB_SPROM1_BINF_CCODE_SHIFT 8
#define SSB_SPROM1_BINF_ANTA 0x3000 /* Available A-PHY antennas */
#define SSB_SPROM1_BINF_ANTA_SHIFT 12
#define SSB_SPROM1_BINF_ANTBG 0xC000 /* Available B-PHY antennas */
#define SSB_SPROM1_BINF_ANTBG_SHIFT 14
#define SSB_SPROM1_PA0B0 0x105E
#define SSB_SPROM1_PA0B1 0x1060
#define SSB_SPROM1_PA0B2 0x1062
#define SSB_SPROM1_GPIOA 0x1064 /* General Purpose IO pins 0 and 1 */
#define SSB_SPROM1_GPIOA_P0 0x00FF /* Pin 0 */
#define SSB_SPROM1_GPIOA_P1 0xFF00 /* Pin 1 */
#define SSB_SPROM1_GPIOA_P1_SHIFT 8
#define SSB_SPROM1_GPIOB 0x1066 /* General Purpuse IO pins 2 and 3 */
#define SSB_SPROM1_GPIOB_P2 0x00FF /* Pin 2 */
#define SSB_SPROM1_GPIOB_P3 0xFF00 /* Pin 3 */
#define SSB_SPROM1_GPIOB_P3_SHIFT 8
#define SSB_SPROM1_MAXPWR 0x1068 /* Power Amplifier Max Power */
#define SSB_SPROM1_MAXPWR_BG 0x00FF /* B-PHY and G-PHY (in dBm Q5.2) */
#define SSB_SPROM1_MAXPWR_A 0xFF00 /* A-PHY (in dBm Q5.2) */
#define SSB_SPROM1_MAXPWR_A_SHIFT 8
#define SSB_SPROM1_PA1B0 0x106A
#define SSB_SPROM1_PA1B1 0x106C
#define SSB_SPROM1_PA1B2 0x106E
#define SSB_SPROM1_ITSSI 0x1070 /* Idle TSSI Target */
#define SSB_SPROM1_ITSSI_BG 0x00FF /* B-PHY and G-PHY*/
#define SSB_SPROM1_ITSSI_A 0xFF00 /* A-PHY */
#define SSB_SPROM1_ITSSI_A_SHIFT 8
#define SSB_SPROM1_BFLLO 0x1072 /* Boardflags (low 16 bits) */
#define SSB_SPROM1_AGAIN 0x1074 /* Antenna Gain (in dBm Q5.2) */
#define SSB_SPROM1_AGAIN_A 0x00FF /* A-PHY */
#define SSB_SPROM1_AGAIN_BG 0xFF00 /* B-PHY and G-PHY */
#define SSB_SPROM1_AGAIN_BG_SHIFT 8
#define SSB_SPROM1_OEM 0x1076 /* 8 bytes OEM string (rev 1 only) */
/* SPROM Revision 2 (inherits from rev 1) */
#define SSB_SPROM2_BFLHI 0x1038 /* Boardflags (high 16 bits) */
#define SSB_SPROM2_MAXP_A 0x103A /* A-PHY Max Power */
#define SSB_SPROM2_MAXP_A_HI 0x00FF /* Max Power High */
#define SSB_SPROM2_MAXP_A_LO 0xFF00 /* Max Power Low */
#define SSB_SPROM2_MAXP_A_LO_SHIFT 8
#define SSB_SPROM2_PA1LOB0 0x103C /* A-PHY PowerAmplifier Low Settings */
#define SSB_SPROM2_PA1LOB1 0x103E /* A-PHY PowerAmplifier Low Settings */
#define SSB_SPROM2_PA1LOB2 0x1040 /* A-PHY PowerAmplifier Low Settings */
#define SSB_SPROM2_PA1HIB0 0x1042 /* A-PHY PowerAmplifier High Settings */
#define SSB_SPROM2_PA1HIB1 0x1044 /* A-PHY PowerAmplifier High Settings */
#define SSB_SPROM2_PA1HIB2 0x1046 /* A-PHY PowerAmplifier High Settings */
#define SSB_SPROM2_OPO 0x1078 /* OFDM Power Offset from CCK Level */
#define SSB_SPROM2_OPO_VALUE 0x00FF
#define SSB_SPROM2_OPO_UNUSED 0xFF00
#define SSB_SPROM2_CCODE 0x107C /* Two char Country Code */
/* SPROM Revision 3 (inherits from rev 2) */
#define SSB_SPROM3_OFDMAPO 0x102C /* A-PHY OFDM Mid Power Offset (4 bytes, BigEndian) */
#define SSB_SPROM3_OFDMALPO 0x1030 /* A-PHY OFDM Low Power Offset (4 bytes, BigEndian) */
#define SSB_SPROM3_OFDMAHPO 0x1034 /* A-PHY OFDM High Power Offset (4 bytes, BigEndian) */
#define SSB_SPROM3_GPIOLDC 0x1042 /* GPIO LED Powersave Duty Cycle (4 bytes, BigEndian) */
#define SSB_SPROM3_GPIOLDC_OFF 0x0000FF00 /* Off Count */
#define SSB_SPROM3_GPIOLDC_OFF_SHIFT 8
#define SSB_SPROM3_GPIOLDC_ON 0x00FF0000 /* On Count */
#define SSB_SPROM3_GPIOLDC_ON_SHIFT 16
#define SSB_SPROM3_CCKPO 0x1078 /* CCK Power Offset */
#define SSB_SPROM3_CCKPO_1M 0x000F /* 1M Rate PO */
#define SSB_SPROM3_CCKPO_2M 0x00F0 /* 2M Rate PO */
#define SSB_SPROM3_CCKPO_2M_SHIFT 4
#define SSB_SPROM3_CCKPO_55M 0x0F00 /* 5.5M Rate PO */
#define SSB_SPROM3_CCKPO_55M_SHIFT 8
#define SSB_SPROM3_CCKPO_11M 0xF000 /* 11M Rate PO */
#define SSB_SPROM3_CCKPO_11M_SHIFT 12
#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
/* Values for SSB_SPROM1_BINF_CCODE */
enum {
SSB_SPROM1CCODE_WORLD = 0,
SSB_SPROM1CCODE_THAILAND,
SSB_SPROM1CCODE_ISRAEL,
SSB_SPROM1CCODE_JORDAN,
SSB_SPROM1CCODE_CHINA,
SSB_SPROM1CCODE_JAPAN,
SSB_SPROM1CCODE_USA_CANADA_ANZ,
SSB_SPROM1CCODE_EUROPE,
SSB_SPROM1CCODE_USA_LOW,
SSB_SPROM1CCODE_JAPAN_HIGH,
SSB_SPROM1CCODE_ALL,
SSB_SPROM1CCODE_NONE,
};
/* Address-Match values and masks (SSB_ADMATCHxxx) */
#define SSB_ADM_TYPE 0x00000003 /* Address type */
#define SSB_ADM_TYPE0 0
#define SSB_ADM_TYPE1 1
#define SSB_ADM_TYPE2 2
#define SSB_ADM_AD64 0x00000004
#define SSB_ADM_SZ0 0x000000F8 /* Type0 size */
#define SSB_ADM_SZ0_SHIFT 3
#define SSB_ADM_SZ1 0x000001F8 /* Type1 size */
#define SSB_ADM_SZ1_SHIFT 3
#define SSB_ADM_SZ2 0x000001F8 /* Type2 size */
#define SSB_ADM_SZ2_SHIFT 3
#define SSB_ADM_EN 0x00000400 /* Enable */
#define SSB_ADM_NEG 0x00000800 /* Negative decode */
#define SSB_ADM_BASE0 0xFFFFFF00 /* Type0 base address */
#define SSB_ADM_BASE0_SHIFT 8
#define SSB_ADM_BASE1 0xFFFFF000 /* Type1 base address for the core */
#define SSB_ADM_BASE1_SHIFT 12
#define SSB_ADM_BASE2 0xFFFF0000 /* Type2 base address for the core */
#define SSB_ADM_BASE2_SHIFT 16
#endif /* LINUX_SSB_REGS_H_ */

View file

@ -221,7 +221,7 @@ extern void swap_unplug_io_fn(struct backing_dev_info *, struct page *);
/* linux/mm/page_io.c */
extern int swap_readpage(struct file *, struct page *);
extern int swap_writepage(struct page *page, struct writeback_control *wbc);
extern int end_swap_bio_read(struct bio *bio, unsigned int bytes_done, int err);
extern void end_swap_bio_read(struct bio *bio, int err);
/* linux/mm/swap_state.c */
extern struct address_space swapper_space;

View file

@ -3,6 +3,8 @@
*
* Copyright (c) 2001,2002 Patrick Mochel
* Copyright (c) 2004 Silicon Graphics, Inc.
* Copyright (c) 2007 SUSE Linux Products GmbH
* Copyright (c) 2007 Tejun Heo <teheo@suse.de>
*
* Please see Documentation/filesystems/sysfs.txt for more information.
*/
@ -17,23 +19,20 @@
struct kobject;
struct module;
struct nameidata;
struct dentry;
struct sysfs_dirent;
/* FIXME
* The *owner field is no longer used, but leave around
* until the tree gets cleaned up fully.
*/
struct attribute {
const char * name;
struct module * owner;
const char *name;
struct module *owner;
mode_t mode;
};
struct attribute_group {
const char * name;
struct attribute ** attrs;
const char *name;
struct attribute **attrs;
};
@ -77,72 +76,41 @@ struct sysfs_ops {
ssize_t (*store)(struct kobject *,struct attribute *,const char *, size_t);
};
#define SYSFS_TYPE_MASK 0x00ff
#define SYSFS_ROOT 0x0001
#define SYSFS_DIR 0x0002
#define SYSFS_KOBJ_ATTR 0x0004
#define SYSFS_KOBJ_BIN_ATTR 0x0008
#define SYSFS_KOBJ_LINK 0x0020
#define SYSFS_COPY_NAME (SYSFS_DIR | SYSFS_KOBJ_LINK)
#define SYSFS_FLAG_MASK ~SYSFS_TYPE_MASK
#define SYSFS_FLAG_REMOVED 0x0100
#ifdef CONFIG_SYSFS
extern int sysfs_schedule_callback(struct kobject *kobj,
void (*func)(void *), void *data, struct module *owner);
int sysfs_schedule_callback(struct kobject *kobj, void (*func)(void *),
void *data, struct module *owner);
extern int __must_check
sysfs_create_dir(struct kobject *kobj, struct sysfs_dirent *shadow_parent_sd);
int __must_check sysfs_create_dir(struct kobject *kobj);
void sysfs_remove_dir(struct kobject *kobj);
int __must_check sysfs_rename_dir(struct kobject *kobj, const char *new_name);
int __must_check sysfs_move_dir(struct kobject *kobj,
struct kobject *new_parent_kobj);
extern void
sysfs_remove_dir(struct kobject *);
extern int __must_check
sysfs_rename_dir(struct kobject *kobj, struct sysfs_dirent *new_parent_sd,
const char *new_name);
extern int __must_check
sysfs_move_dir(struct kobject *, struct kobject *);
extern int __must_check
sysfs_create_file(struct kobject *, const struct attribute *);
extern int __must_check
sysfs_update_file(struct kobject *, const struct attribute *);
extern int __must_check
sysfs_chmod_file(struct kobject *kobj, struct attribute *attr, mode_t mode);
extern void
sysfs_remove_file(struct kobject *, const struct attribute *);
extern int __must_check
sysfs_create_link(struct kobject * kobj, struct kobject * target, const char * name);
extern void
sysfs_remove_link(struct kobject *, const char * name);
int __must_check sysfs_create_file(struct kobject *kobj,
const struct attribute *attr);
int __must_check sysfs_chmod_file(struct kobject *kobj, struct attribute *attr,
mode_t mode);
void sysfs_remove_file(struct kobject *kobj, const struct attribute *attr);
int __must_check sysfs_create_bin_file(struct kobject *kobj,
struct bin_attribute *attr);
struct bin_attribute *attr);
void sysfs_remove_bin_file(struct kobject *kobj, struct bin_attribute *attr);
int __must_check sysfs_create_group(struct kobject *,
const struct attribute_group *);
void sysfs_remove_group(struct kobject *, const struct attribute_group *);
int __must_check sysfs_create_link(struct kobject *kobj, struct kobject *target,
const char *name);
void sysfs_remove_link(struct kobject *kobj, const char *name);
int __must_check sysfs_create_group(struct kobject *kobj,
const struct attribute_group *grp);
void sysfs_remove_group(struct kobject *kobj,
const struct attribute_group *grp);
int sysfs_add_file_to_group(struct kobject *kobj,
const struct attribute *attr, const char *group);
const struct attribute *attr, const char *group);
void sysfs_remove_file_from_group(struct kobject *kobj,
const struct attribute *attr, const char *group);
const struct attribute *attr, const char *group);
void sysfs_notify(struct kobject * k, char *dir, char *attr);
extern int sysfs_make_shadowed_dir(struct kobject *kobj,
void * (*follow_link)(struct dentry *, struct nameidata *));
extern struct sysfs_dirent *sysfs_create_shadow_dir(struct kobject *kobj);
extern void sysfs_remove_shadow_dir(struct sysfs_dirent *shadow_sd);
void sysfs_notify(struct kobject *kobj, char *dir, char *attr);
extern int __must_check sysfs_init(void);
@ -154,75 +122,76 @@ static inline int sysfs_schedule_callback(struct kobject *kobj,
return -ENOSYS;
}
static inline int sysfs_create_dir(struct kobject *kobj,
struct sysfs_dirent *shadow_parent_sd)
static inline int sysfs_create_dir(struct kobject *kobj)
{
return 0;
}
static inline void sysfs_remove_dir(struct kobject * k)
static inline void sysfs_remove_dir(struct kobject *kobj)
{
;
}
static inline int sysfs_rename_dir(struct kobject *kobj,
struct sysfs_dirent *new_parent_sd,
const char *new_name)
static inline int sysfs_rename_dir(struct kobject *kobj, const char *new_name)
{
return 0;
}
static inline int sysfs_move_dir(struct kobject * k, struct kobject * new_parent)
static inline int sysfs_move_dir(struct kobject *kobj,
struct kobject *new_parent_kobj)
{
return 0;
}
static inline int sysfs_create_file(struct kobject * k, const struct attribute * a)
static inline int sysfs_create_file(struct kobject *kobj,
const struct attribute *attr)
{
return 0;
}
static inline int sysfs_update_file(struct kobject * k, const struct attribute * a)
{
return 0;
}
static inline int sysfs_chmod_file(struct kobject *kobj, struct attribute *attr, mode_t mode)
static inline int sysfs_chmod_file(struct kobject *kobj,
struct attribute *attr, mode_t mode)
{
return 0;
}
static inline void sysfs_remove_file(struct kobject * k, const struct attribute * a)
static inline void sysfs_remove_file(struct kobject *kobj,
const struct attribute *attr)
{
;
}
static inline int sysfs_create_link(struct kobject * k, struct kobject * t, const char * n)
static inline int sysfs_create_bin_file(struct kobject *kobj,
struct bin_attribute *attr)
{
return 0;
}
static inline void sysfs_remove_link(struct kobject * k, const char * name)
static inline int sysfs_remove_bin_file(struct kobject *kobj,
struct bin_attribute *attr)
{
return 0;
}
static inline int sysfs_create_link(struct kobject *kobj,
struct kobject *target, const char *name)
{
return 0;
}
static inline void sysfs_remove_link(struct kobject *kobj, const char *name)
{
;
}
static inline int sysfs_create_bin_file(struct kobject * k, struct bin_attribute * a)
static inline int sysfs_create_group(struct kobject *kobj,
const struct attribute_group *grp)
{
return 0;
}
static inline int sysfs_remove_bin_file(struct kobject * k, struct bin_attribute * a)
{
return 0;
}
static inline int sysfs_create_group(struct kobject * k, const struct attribute_group *g)
{
return 0;
}
static inline void sysfs_remove_group(struct kobject * k, const struct attribute_group * g)
static inline void sysfs_remove_group(struct kobject *kobj,
const struct attribute_group *grp)
{
;
}
@ -238,16 +207,10 @@ static inline void sysfs_remove_file_from_group(struct kobject *kobj,
{
}
static inline void sysfs_notify(struct kobject * k, char *dir, char *attr)
static inline void sysfs_notify(struct kobject *kobj, char *dir, char *attr)
{
}
static inline int sysfs_make_shadowed_dir(struct kobject *kobj,
void * (*follow_link)(struct dentry *, struct nameidata *))
{
return 0;
}
static inline int __must_check sysfs_init(void)
{
return 0;

View file

@ -0,0 +1,29 @@
#ifndef __LINUX_TC_NAT_H
#define __LINUX_TC_NAT_H
#include <linux/pkt_cls.h>
#include <linux/types.h>
#define TCA_ACT_NAT 9
enum
{
TCA_NAT_UNSPEC,
TCA_NAT_PARMS,
TCA_NAT_TM,
__TCA_NAT_MAX
};
#define TCA_NAT_MAX (__TCA_NAT_MAX - 1)
#define TCA_NAT_FLAG_EGRESS 1
struct tc_nat
{
tc_gen;
__be32 old_addr;
__be32 new_addr;
__be32 mask;
__u32 flags;
};
#endif

View file

@ -304,7 +304,6 @@ struct tcp_sock {
u32 rtt_seq; /* sequence number to update rttvar */
u32 packets_out; /* Packets which are "in flight" */
u32 left_out; /* Packets which leaved network */
u32 retrans_out; /* Retransmitted packets out */
/*
* Options received (usually on last packet, some only on SYN packets).
@ -333,6 +332,9 @@ struct tcp_sock {
struct tcp_sack_block_wire recv_sack_cache[4];
u32 highest_sack; /* Start seq of globally highest revd SACK
* (validity guaranteed only if sacked_out > 0) */
/* from STCP, retrans queue hinting */
struct sk_buff* lost_skb_hint;
@ -341,10 +343,12 @@ struct tcp_sock {
struct sk_buff *forward_skb_hint;
struct sk_buff *fastpath_skb_hint;
int fastpath_cnt_hint;
int fastpath_cnt_hint; /* Lags behind by current skb's pcount
* compared to respective fackets_out */
int lost_cnt_hint;
int retransmit_cnt_hint;
int forward_cnt_hint;
u32 lost_retrans_low; /* Sent seq after any rxmit (lowest) */
u16 advmss; /* Advertised MSS */
u16 prior_ssthresh; /* ssthresh saved at recovery start */

View file

@ -21,7 +21,6 @@
* (Note: the *_driver.minor_start values 1, 64, 128, 192 are
* hardcoded at present.)
*/
#define NR_PTYS CONFIG_LEGACY_PTY_COUNT /* Number of legacy ptys */
#define NR_UNIX98_PTY_DEFAULT 4096 /* Default maximum for Unix98 ptys */
#define NR_UNIX98_PTY_MAX (1 << MINORBITS) /* Absolute limit */
#define NR_LDISCS 17

View file

@ -1,138 +0,0 @@
/*
* This file contains defines for the
* Micro Memory MM5415
* family PCI Memory Module with Battery Backup.
*
* Copyright Micro Memory INC 2001. All rights reserved.
* Release under the terms of the GNU GENERAL PUBLIC LICENSE version 2.
* See the file COPYING.
*/
#ifndef _DRIVERS_BLOCK_MM_H
#define _DRIVERS_BLOCK_MM_H
#define IRQ_TIMEOUT (1 * HZ)
/* CSR register definition */
#define MEMCTRLSTATUS_MAGIC 0x00
#define MM_MAGIC_VALUE (unsigned char)0x59
#define MEMCTRLSTATUS_BATTERY 0x04
#define BATTERY_1_DISABLED 0x01
#define BATTERY_1_FAILURE 0x02
#define BATTERY_2_DISABLED 0x04
#define BATTERY_2_FAILURE 0x08
#define MEMCTRLSTATUS_MEMORY 0x07
#define MEM_128_MB 0xfe
#define MEM_256_MB 0xfc
#define MEM_512_MB 0xf8
#define MEM_1_GB 0xf0
#define MEM_2_GB 0xe0
#define MEMCTRLCMD_LEDCTRL 0x08
#define LED_REMOVE 2
#define LED_FAULT 4
#define LED_POWER 6
#define LED_FLIP 255
#define LED_OFF 0x00
#define LED_ON 0x01
#define LED_FLASH_3_5 0x02
#define LED_FLASH_7_0 0x03
#define LED_POWER_ON 0x00
#define LED_POWER_OFF 0x01
#define USER_BIT1 0x01
#define USER_BIT2 0x02
#define MEMORY_INITIALIZED USER_BIT1
#define MEMCTRLCMD_ERRCTRL 0x0C
#define EDC_NONE_DEFAULT 0x00
#define EDC_NONE 0x01
#define EDC_STORE_READ 0x02
#define EDC_STORE_CORRECT 0x03
#define MEMCTRLCMD_ERRCNT 0x0D
#define MEMCTRLCMD_ERRSTATUS 0x0E
#define ERROR_DATA_LOG 0x20
#define ERROR_ADDR_LOG 0x28
#define ERROR_COUNT 0x3D
#define ERROR_SYNDROME 0x3E
#define ERROR_CHECK 0x3F
#define DMA_PCI_ADDR 0x40
#define DMA_LOCAL_ADDR 0x48
#define DMA_TRANSFER_SIZE 0x50
#define DMA_DESCRIPTOR_ADDR 0x58
#define DMA_SEMAPHORE_ADDR 0x60
#define DMA_STATUS_CTRL 0x68
#define DMASCR_GO 0x00001
#define DMASCR_TRANSFER_READ 0x00002
#define DMASCR_CHAIN_EN 0x00004
#define DMASCR_SEM_EN 0x00010
#define DMASCR_DMA_COMP_EN 0x00020
#define DMASCR_CHAIN_COMP_EN 0x00040
#define DMASCR_ERR_INT_EN 0x00080
#define DMASCR_PARITY_INT_EN 0x00100
#define DMASCR_ANY_ERR 0x00800
#define DMASCR_MBE_ERR 0x01000
#define DMASCR_PARITY_ERR_REP 0x02000
#define DMASCR_PARITY_ERR_DET 0x04000
#define DMASCR_SYSTEM_ERR_SIG 0x08000
#define DMASCR_TARGET_ABT 0x10000
#define DMASCR_MASTER_ABT 0x20000
#define DMASCR_DMA_COMPLETE 0x40000
#define DMASCR_CHAIN_COMPLETE 0x80000
/*
3.SOME PCs HAVE HOST BRIDGES WHICH APPARENTLY DO NOT CORRECTLY HANDLE
READ-LINE (0xE) OR READ-MULTIPLE (0xC) PCI COMMAND CODES DURING DMA
TRANSFERS. IN OTHER SYSTEMS THESE COMMAND CODES WILL CAUSE THE HOST BRIDGE
TO ALLOW LONGER BURSTS DURING DMA READ OPERATIONS. THE UPPER FOUR BITS
(31..28) OF THE DMA CSR HAVE BEEN MADE PROGRAMMABLE, SO THAT EITHER A 0x6,
AN 0xE OR A 0xC CAN BE WRITTEN TO THEM TO SET THE COMMAND CODE USED DURING
DMA READ OPERATIONS.
*/
#define DMASCR_READ 0x60000000
#define DMASCR_READLINE 0xE0000000
#define DMASCR_READMULTI 0xC0000000
#define DMASCR_ERROR_MASK (DMASCR_MASTER_ABT | DMASCR_TARGET_ABT | DMASCR_SYSTEM_ERR_SIG | DMASCR_PARITY_ERR_DET | DMASCR_MBE_ERR | DMASCR_ANY_ERR)
#define DMASCR_HARD_ERROR (DMASCR_MASTER_ABT | DMASCR_TARGET_ABT | DMASCR_SYSTEM_ERR_SIG | DMASCR_PARITY_ERR_DET | DMASCR_MBE_ERR)
#define WINDOWMAP_WINNUM 0x7B
#define DMA_READ_FROM_HOST 0
#define DMA_WRITE_TO_HOST 1
struct mm_dma_desc {
__le64 pci_addr;
__le64 local_addr;
__le32 transfer_size;
u32 zero1;
__le64 next_desc_addr;
__le64 sem_addr;
__le32 control_bits;
u32 zero2;
dma_addr_t data_dma_handle;
/* Copy of the bits */
__le64 sem_control_bits;
} __attribute__((aligned(8)));
#define PCI_VENDOR_ID_MICRO_MEMORY 0x1332
#define PCI_DEVICE_ID_MICRO_MEMORY_5415CN 0x5415
#define PCI_DEVICE_ID_MICRO_MEMORY_5425CN 0x5425
#define PCI_DEVICE_ID_MICRO_MEMORY_6155 0x6155
/* bits for card->flags */
#define UM_FLAG_DMA_IN_REGS 1
#define UM_FLAG_NO_BYTE_STATUS 2
#define UM_FLAG_NO_BATTREG 4
#define UM_FLAG_NO_BATT 8
#endif

View file

@ -52,6 +52,7 @@ struct ep_device;
* @ep_dev: ep_device for sysfs info
* @extra: descriptors following this endpoint in the configuration
* @extralen: how many bytes of "extra" are valid
* @enabled: URBs may be submitted to this endpoint
*
* USB requests are always queued to a given endpoint, identified by a
* descriptor within an active interface in a given USB configuration.
@ -64,6 +65,7 @@ struct usb_host_endpoint {
unsigned char *extra; /* Extra descriptors */
int extralen;
int enabled;
};
/* host-side wrapper for one interface setting's parsed descriptors */
@ -344,6 +346,11 @@ struct usb_tt;
*
* Usbcore drivers should not set usbdev->state directly. Instead use
* usb_set_device_state().
*
* @authorized: (user space) policy determines if we authorize this
* device to be used or not. By default, wired USB
* devices are authorized. WUSB devices are not, until we
* authorize them from user space. FIXME -- complete doc
*/
struct usb_device {
int devnum; /* Address on USB bus */
@ -376,8 +383,11 @@ struct usb_device {
u8 portnum; /* Parent port number (origin 1) */
u8 level; /* Number of USB hub ancestors */
unsigned can_submit:1; /* URBs may be submitted */
unsigned discon_suspended:1; /* Disconnected while suspended */
unsigned have_langid:1; /* whether string_langid is valid */
unsigned authorized:1; /* Policy has determined we can use it */
unsigned wusb:1; /* Device is Wireless USB */
int string_langid; /* language ID for strings */
/* static strings from the device */
@ -405,6 +415,7 @@ struct usb_device {
int pm_usage_cnt; /* usage counter for autosuspend */
u32 quirks; /* quirks of the whole device */
atomic_t urbnum; /* number of URBs submitted for the whole device */
#ifdef CONFIG_PM
struct delayed_work autosuspend; /* for delayed autosuspends */
@ -419,6 +430,7 @@ struct usb_device {
unsigned persist_enabled:1; /* USB_PERSIST enabled for this dev */
unsigned autosuspend_disabled:1; /* autosuspend and autoresume */
unsigned autoresume_disabled:1; /* disabled by the user */
unsigned skip_sys_resume:1; /* skip the next system resume */
#endif
};
#define to_usb_device(d) container_of(d, struct usb_device, dev)
@ -554,6 +566,29 @@ static inline int usb_make_path (struct usb_device *dev, char *buf,
/*-------------------------------------------------------------------------*/
/**
* usb_endpoint_num - get the endpoint's number
* @epd: endpoint to be checked
*
* Returns @epd's number: 0 to 15.
*/
static inline int usb_endpoint_num(const struct usb_endpoint_descriptor *epd)
{
return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
}
/**
* usb_endpoint_type - get the endpoint's transfer type
* @epd: endpoint to be checked
*
* Returns one of USB_ENDPOINT_XFER_{CONTROL, ISOC, BULK, INT} according
* to @epd's transfer type.
*/
static inline int usb_endpoint_type(const struct usb_endpoint_descriptor *epd)
{
return epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
}
/**
* usb_endpoint_dir_in - check if the endpoint has IN direction
* @epd: endpoint to be checked
@ -996,6 +1031,8 @@ extern int usb_disabled(void);
/*
* urb->transfer_flags:
*
* Note: URB_DIR_IN/OUT is automatically set in usb_submit_urb().
*/
#define URB_SHORT_NOT_OK 0x0001 /* report short reads as errors */
#define URB_ISO_ASAP 0x0002 /* iso-only, urb->start_frame
@ -1008,6 +1045,10 @@ extern int usb_disabled(void);
* needed */
#define URB_FREE_BUFFER 0x0100 /* Free transfer buffer with the URB */
#define URB_DIR_IN 0x0200 /* Transfer from device to host */
#define URB_DIR_OUT 0
#define URB_DIR_MASK URB_DIR_IN
struct usb_iso_packet_descriptor {
unsigned int offset;
unsigned int length; /* expected length */
@ -1037,6 +1078,8 @@ typedef void (*usb_complete_t)(struct urb *);
* @urb_list: For use by current owner of the URB.
* @anchor_list: membership in the list of an anchor
* @anchor: to anchor URBs to a common mooring
* @ep: Points to the endpoint's data structure. Will eventually
* replace @pipe.
* @pipe: Holds endpoint number, direction, type, and more.
* Create these values with the eight macros available;
* usb_{snd,rcv}TYPEpipe(dev,endpoint), where the TYPE is "ctrl"
@ -1201,10 +1244,10 @@ struct urb
{
/* private: usb core and host controller only fields in the urb */
struct kref kref; /* reference count of the URB */
spinlock_t lock; /* lock for the URB */
void *hcpriv; /* private data for host controller */
atomic_t use_count; /* concurrent submissions counter */
u8 reject; /* submissions will fail */
int unlinked; /* unlink error code */
/* public: documented fields in the urb that can be used by drivers */
struct list_head urb_list; /* list head for use by the urb's
@ -1212,6 +1255,7 @@ struct urb
struct list_head anchor_list; /* the URB may be anchored by the driver */
struct usb_anchor *anchor;
struct usb_device *dev; /* (in) pointer to associated device */
struct usb_host_endpoint *ep; /* (internal) pointer to endpoint struct */
unsigned int pipe; /* (in) pipe information */
int status; /* (return) non-ISO status */
unsigned int transfer_flags; /* (in) URB_SHORT_NOT_OK | ...*/
@ -1257,7 +1301,6 @@ static inline void usb_fill_control_urb (struct urb *urb,
usb_complete_t complete_fn,
void *context)
{
spin_lock_init(&urb->lock);
urb->dev = dev;
urb->pipe = pipe;
urb->setup_packet = setup_packet;
@ -1288,7 +1331,6 @@ static inline void usb_fill_bulk_urb (struct urb *urb,
usb_complete_t complete_fn,
void *context)
{
spin_lock_init(&urb->lock);
urb->dev = dev;
urb->pipe = pipe;
urb->transfer_buffer = transfer_buffer;
@ -1324,7 +1366,6 @@ static inline void usb_fill_int_urb (struct urb *urb,
void *context,
int interval)
{
spin_lock_init(&urb->lock);
urb->dev = dev;
urb->pipe = pipe;
urb->transfer_buffer = transfer_buffer;
@ -1352,6 +1393,30 @@ extern void usb_unanchor_urb(struct urb *urb);
extern int usb_wait_anchor_empty_timeout(struct usb_anchor *anchor,
unsigned int timeout);
/**
* usb_urb_dir_in - check if an URB describes an IN transfer
* @urb: URB to be checked
*
* Returns 1 if @urb describes an IN transfer (device-to-host),
* otherwise 0.
*/
static inline int usb_urb_dir_in(struct urb *urb)
{
return (urb->transfer_flags & URB_DIR_MASK) == URB_DIR_IN;
}
/**
* usb_urb_dir_out - check if an URB describes an OUT transfer
* @urb: URB to be checked
*
* Returns 1 if @urb describes an OUT transfer (host-to-device),
* otherwise 0.
*/
static inline int usb_urb_dir_out(struct urb *urb)
{
return (urb->transfer_flags & URB_DIR_MASK) == URB_DIR_OUT;
}
void *usb_buffer_alloc (struct usb_device *dev, size_t size,
gfp_t mem_flags, dma_addr_t *dma);
void usb_buffer_free (struct usb_device *dev, size_t size,
@ -1364,13 +1429,13 @@ void usb_buffer_unmap (struct urb *urb);
#endif
struct scatterlist;
int usb_buffer_map_sg(const struct usb_device *dev, unsigned pipe,
int usb_buffer_map_sg(const struct usb_device *dev, int is_in,
struct scatterlist *sg, int nents);
#if 0
void usb_buffer_dmasync_sg(const struct usb_device *dev, unsigned pipe,
void usb_buffer_dmasync_sg(const struct usb_device *dev, int is_in,
struct scatterlist *sg, int n_hw_ents);
#endif
void usb_buffer_unmap_sg(const struct usb_device *dev, unsigned pipe,
void usb_buffer_unmap_sg(const struct usb_device *dev, int is_in,
struct scatterlist *sg, int n_hw_ents);
/*-------------------------------------------------------------------*

View file

@ -1,5 +1,5 @@
/*
* <linux/usb_gadget.h>
* <linux/usb/gadget.h>
*
* We call the USB code inside a Linux-based peripheral device a "gadget"
* driver, except for the hardware-specific bus glue. One USB host can
@ -22,10 +22,10 @@ struct usb_ep;
/**
* struct usb_request - describes one i/o request
* @buf: Buffer used for data. Always provide this; some controllers
* only use PIO, or don't use DMA for some endpoints.
* only use PIO, or don't use DMA for some endpoints.
* @dma: DMA address corresponding to 'buf'. If you don't set this
* field, and the usb controller needs one, it is responsible
* for mapping and unmapping the buffer.
* field, and the usb controller needs one, it is responsible
* for mapping and unmapping the buffer.
* @length: Length of that data
* @no_interrupt: If true, hints that no completion irq is needed.
* Helpful sometimes with deep request queues that are handled
@ -45,16 +45,16 @@ struct usb_ep;
* @context: For use by the completion callback
* @list: For use by the gadget driver.
* @status: Reports completion code, zero or a negative errno.
* Normally, faults block the transfer queue from advancing until
* the completion callback returns.
* Code "-ESHUTDOWN" indicates completion caused by device disconnect,
* or when the driver disabled the endpoint.
* Normally, faults block the transfer queue from advancing until
* the completion callback returns.
* Code "-ESHUTDOWN" indicates completion caused by device disconnect,
* or when the driver disabled the endpoint.
* @actual: Reports bytes transferred to/from the buffer. For reads (OUT
* transfers) this may be less than the requested length. If the
* short_not_ok flag is set, short reads are treated as errors
* even when status otherwise indicates successful completion.
* Note that for writes (IN transfers) some data bytes may still
* reside in a device-side FIFO when the request is reported as
* transfers) this may be less than the requested length. If the
* short_not_ok flag is set, short reads are treated as errors
* even when status otherwise indicates successful completion.
* Note that for writes (IN transfers) some data bytes may still
* reside in a device-side FIFO when the request is reported as
* complete.
*
* These are allocated/freed through the endpoint they're used with. The
@ -128,7 +128,7 @@ struct usb_ep_ops {
* value can sometimes be reduced (hardware allowing), according to
* the endpoint descriptor used to configure the endpoint.
* @driver_data:for use by the gadget driver. all other fields are
* read-only to gadget drivers.
* read-only to gadget drivers.
*
* the bus controller driver lists all the general purpose endpoints in
* gadget->ep_list. the control endpoint (gadget->ep0) is not in that list,
@ -148,10 +148,10 @@ struct usb_ep {
/**
* usb_ep_enable - configure endpoint, making it usable
* @ep:the endpoint being configured. may not be the endpoint named "ep0".
* drivers discover endpoints through the ep_list of a usb_gadget.
* drivers discover endpoints through the ep_list of a usb_gadget.
* @desc:descriptor for desired behavior. caller guarantees this pointer
* remains valid until the endpoint is disabled; the data byte order
* is little-endian (usb-standard).
* remains valid until the endpoint is disabled; the data byte order
* is little-endian (usb-standard).
*
* when configurations are set, or when interface settings change, the driver
* will enable or disable the relevant endpoints. while it is enabled, an
@ -232,7 +232,7 @@ usb_ep_free_request (struct usb_ep *ep, struct usb_request *req)
* @ep:the endpoint associated with the request
* @req:the request being submitted
* @gfp_flags: GFP_* flags to use in case the lower level driver couldn't
* pre-allocate all necessary memory with the request.
* pre-allocate all necessary memory with the request.
*
* This tells the device controller to perform the specified request through
* that endpoint (reading or writing a buffer). When the request completes,
@ -415,7 +415,7 @@ struct usb_gadget_ops {
* struct usb_gadget - represents a usb slave device
* @ops: Function pointers used to access hardware-specific operations.
* @ep0: Endpoint zero, used when reading or writing responses to
* driver setup() requests
* driver setup() requests
* @ep_list: List of other endpoints supported by the device.
* @speed: Speed of current connection to USB host.
* @is_dualspeed: True if the controller supports both high and full speed
@ -432,7 +432,7 @@ struct usb_gadget_ops {
* @b_hnp_enable: OTG device feature flag, indicating that the A-Host
* enabled HNP support.
* @name: Identifies the controller hardware type. Used in diagnostics
* and sometimes configuration.
* and sometimes configuration.
* @dev: Driver model state for this abstract device.
*
* Gadgets have a mostly-portable "gadget driver" implementing device
@ -479,6 +479,39 @@ static inline void *get_gadget_data (struct usb_gadget *gadget)
list_for_each_entry(tmp, &(gadget)->ep_list, ep_list)
/**
* gadget_is_dualspeed - return true iff the hardware handles high speed
* @gadget: controller that might support both high and full speeds
*/
static inline int gadget_is_dualspeed(struct usb_gadget *g)
{
#ifdef CONFIG_USB_GADGET_DUALSPEED
/* runtime test would check "g->is_dualspeed" ... that might be
* useful to work around hardware bugs, but is mostly pointless
*/
return 1;
#else
return 0;
#endif
}
/**
* gadget_is_otg - return true iff the hardware is OTG-ready
* @gadget: controller that might have a Mini-AB connector
*
* This is a runtime test, since kernels with a USB-OTG stack sometimes
* run on boards which only have a Mini-B (or Mini-A) connector.
*/
static inline int gadget_is_otg(struct usb_gadget *g)
{
#ifdef CONFIG_USB_OTG
return g->is_otg;
#else
return 0;
#endif
}
/**
* usb_gadget_frame_number - returns the current frame number
* @gadget: controller that reports the frame number
@ -655,23 +688,23 @@ usb_gadget_disconnect (struct usb_gadget *gadget)
* @function: String describing the gadget's function
* @speed: Highest speed the driver handles.
* @bind: Invoked when the driver is bound to a gadget, usually
* after registering the driver.
* At that point, ep0 is fully initialized, and ep_list holds
* the currently-available endpoints.
* Called in a context that permits sleeping.
* after registering the driver.
* At that point, ep0 is fully initialized, and ep_list holds
* the currently-available endpoints.
* Called in a context that permits sleeping.
* @setup: Invoked for ep0 control requests that aren't handled by
* the hardware level driver. Most calls must be handled by
* the gadget driver, including descriptor and configuration
* management. The 16 bit members of the setup data are in
* USB byte order. Called in_interrupt; this may not sleep. Driver
* the hardware level driver. Most calls must be handled by
* the gadget driver, including descriptor and configuration
* management. The 16 bit members of the setup data are in
* USB byte order. Called in_interrupt; this may not sleep. Driver
* queues a response to ep0, or returns negative to stall.
* @disconnect: Invoked after all transfers have been stopped,
* when the host is disconnected. May be called in_interrupt; this
* may not sleep. Some devices can't detect disconnect, so this might
* when the host is disconnected. May be called in_interrupt; this
* may not sleep. Some devices can't detect disconnect, so this might
* not be called except as part of controller shutdown.
* @unbind: Invoked when the driver is unbound from a gadget,
* usually from rmmod (after a disconnect is reported).
* Called in a context that permits sleeping.
* usually from rmmod (after a disconnect is reported).
* Called in a context that permits sleeping.
* @suspend: Invoked on USB suspend. May be called in_interrupt.
* @resume: Invoked on USB resume. May be called in_interrupt.
* @driver: Driver model state for this driver.

View file

@ -4,11 +4,8 @@
* belong here.
*/
/* device must not be autosuspended */
#define USB_QUIRK_NO_AUTOSUSPEND 0x00000001
/* string descriptors must not be fetched using a 255-byte read */
#define USB_QUIRK_STRING_FETCH_255 0x00000002
#define USB_QUIRK_STRING_FETCH_255 0x00000001
/* device can't resume correctly so reset it instead */
#define USB_QUIRK_RESET_RESUME 0x00000004
#define USB_QUIRK_RESET_RESUME 0x00000002

View file

@ -141,7 +141,7 @@ struct usb_serial {
};
#define to_usb_serial(d) container_of(d, struct usb_serial, kref)
#define NUM_DONT_CARE (-1)
#define NUM_DONT_CARE 99
/* get and set the serial private data pointer helper functions */
static inline void *usb_get_serial_data (struct usb_serial *serial)
@ -160,12 +160,18 @@ static inline void usb_set_serial_data (struct usb_serial *serial, void *data)
* in the syslog messages when a device is inserted or removed.
* @id_table: pointer to a list of usb_device_id structures that define all
* of the devices this structure can support.
* @num_interrupt_in: the number of interrupt in endpoints this device will
* have.
* @num_interrupt_out: the number of interrupt out endpoints this device will
* have.
* @num_bulk_in: the number of bulk in endpoints this device will have.
* @num_bulk_out: the number of bulk out endpoints this device will have.
* @num_interrupt_in: If a device doesn't have this many interrupt-in
* endpoints, it won't be sent to the driver's attach() method.
* (But it might still be sent to the probe() method.)
* @num_interrupt_out: If a device doesn't have this many interrupt-out
* endpoints, it won't be sent to the driver's attach() method.
* (But it might still be sent to the probe() method.)
* @num_bulk_in: If a device doesn't have this many bulk-in
* endpoints, it won't be sent to the driver's attach() method.
* (But it might still be sent to the probe() method.)
* @num_bulk_out: If a device doesn't have this many bulk-out
* endpoints, it won't be sent to the driver's attach() method.
* (But it might still be sent to the probe() method.)
* @num_ports: the number of different ports this device will have.
* @calc_num_ports: pointer to a function to determine how many ports this
* device has dynamically. It will be called after the probe()

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