From ecb7d134c720f8f39930084131b882cb77bbeebe Mon Sep 17 00:00:00 2001 From: Adwait Nayak Date: Fri, 20 Mar 2020 10:22:05 +0530 Subject: [PATCH] qcacmn: CFR: Keep the default subtype as 0 for default RCC config 1. MAC does not really consider the expect TA and the expect RA when the expect TA mask and expect RA mask is 0. Basically, it checks for the subtype, bandwidth and NSS as the filter criteria. 2. In the other scenario, if the RA matches with expect RA and TA matches with expect TA then it does not really consider the expect TA MASK and expect RA MASK. With the current default config, since the expect address mask is 00:00:00:00:00:00 it falls under case 1 and it is written based on the MAC recipe. But actual MAC logic is different from what is mentioned in the recipe. MAC works on below logic: TA & TA MASK = Expect TA & expect TA mask RA & RA MASK = Expect RA & expect RA mask As an additional precaution, we need to modify default subtype as 0 so that if user enables any group by mistake and does not give any input for the other RCC configurations, we can block the RCC to capture CFR data. Change-Id: I759e8812e4ef0e77f773d0d445134e62d9e8a753 CRs-Fixed: 2649714 --- target_if/cfr/src/target_if_cfr.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/target_if/cfr/src/target_if_cfr.c b/target_if/cfr/src/target_if_cfr.c index 21fa5496904a..410f1ba8fb90 100644 --- a/target_if/cfr/src/target_if_cfr.c +++ b/target_if/cfr/src/target_if_cfr.c @@ -255,24 +255,25 @@ void target_if_cfr_default_ta_ra_config(struct cfr_rcc_param *rcc_info, uint8_t def_mac[QDF_MAC_ADDR_SIZE] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; - uint8_t null_mac[QDF_MAC_ADDR_SIZE] = {0, 0, 0, 0, 0, 0}; + uint8_t null_mac[QDF_MAC_ADDR_SIZE] = {0x00, 0x00, 0x00, + 0x00, 0x00, 0x00}; for (grp_id = 0; grp_id < MAX_TA_RA_ENTRIES; grp_id++) { if (qdf_test_bit(grp_id, (unsigned long *)&reset_cfg)) { curr_cfg = &rcc_info->curr[grp_id]; qdf_mem_copy(curr_cfg->tx_addr, - def_mac, QDF_MAC_ADDR_SIZE); + null_mac, QDF_MAC_ADDR_SIZE); qdf_mem_copy(curr_cfg->tx_addr_mask, - null_mac, QDF_MAC_ADDR_SIZE); - qdf_mem_copy(curr_cfg->rx_addr, def_mac, QDF_MAC_ADDR_SIZE); - qdf_mem_copy(curr_cfg->rx_addr_mask, + qdf_mem_copy(curr_cfg->rx_addr, null_mac, QDF_MAC_ADDR_SIZE); + qdf_mem_copy(curr_cfg->rx_addr_mask, + def_mac, QDF_MAC_ADDR_SIZE); curr_cfg->bw = 0xf; curr_cfg->nss = 0xff; - curr_cfg->mgmt_subtype_filter = 0xffff; - curr_cfg->ctrl_subtype_filter = 0xffff; - curr_cfg->data_subtype_filter = 0xffff; + curr_cfg->mgmt_subtype_filter = 0; + curr_cfg->ctrl_subtype_filter = 0; + curr_cfg->data_subtype_filter = 0; if (!allvalid) { curr_cfg->valid_ta = 0; curr_cfg->valid_ta_mask = 0;