From 493897f5507b57dfb85c3cc64bddc433495101e5 Mon Sep 17 00:00:00 2001
From: Patrick Daly <pdaly@quicinc.com>
Date: Thu, 6 Aug 2020 10:28:15 -0700
Subject: [PATCH] ARM: dts: msm: Swap interconnect masters

Correct smmu interconnect property.

Change-Id: Ifba799a82ea14e9245dae15001cb6f17c9459681
---
 qcom/msm-arm-smmu-sdxlemur.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/qcom/msm-arm-smmu-sdxlemur.dtsi b/qcom/msm-arm-smmu-sdxlemur.dtsi
index 47e46d630975..d173665338c3 100644
--- a/qcom/msm-arm-smmu-sdxlemur.dtsi
+++ b/qcom/msm-arm-smmu-sdxlemur.dtsi
@@ -47,8 +47,8 @@
 				<GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
 
-		interconnects = <&system_noc MASTER_APPSS_PROC
-				 &mem_noc SLAVE_IMEM_CFG>;
+		interconnects = <&mem_noc MASTER_APPSS_PROC
+				 &system_noc SLAVE_IMEM_CFG>;
 		qcom,active-only;
 
 		periph_tbu: periph_tbu@15045000 {
@@ -57,8 +57,8 @@
 				<0x15042200 0x8>;
 			reg-names = "base", "status-reg";
 			qcom,stream-id-range = <0x0 0x400>;
-			interconnects = <&system_noc MASTER_APPSS_PROC
-					 &mem_noc SLAVE_IMEM_CFG>;
+			interconnects = <&mem_noc MASTER_APPSS_PROC
+					 &system_noc SLAVE_IMEM_CFG>;
 			qcom,active-only;
 		};
 
@@ -68,8 +68,8 @@
 				<0x15042208 0x8>;
 			reg-names = "base", "status-reg";
 			qcom,stream-id-range = <0x400 0x400>;
-			interconnects = <&system_noc MASTER_APPSS_PROC
-					&mem_noc SLAVE_IMEM_CFG>;
+			interconnects = <&mem_noc MASTER_APPSS_PROC
+					 &system_noc SLAVE_IMEM_CFG>;
 			qcom,active-only;
 		};
 	};