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ARM: dts: msm: remove gcc ahb clock for yupik

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Clock drivers have moved GCC_DISP_AHB_CLK to their probe and
kept it always ON, and are not registering this clock with the
framework. Hence, removing GCC_DISP_AHB_CLK from display clock list.

Change-Id: Ifc21194814275f65776c642777263d9d37da3637
This commit is contained in:
Andhavarapu Karthik 2021-01-18 22:31:41 +05:30
commit eceeb6d6c2
2 changed files with 3 additions and 4 deletions
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4
display/yupik-sde-common.dtsi
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@ -10,8 +10,8 @@
"vbif_phys",
"regdma_phys";
clock-rate = <0 0 0 0 506666667 19200000 506666667 19200000>;
clock-max-rate = <0 0 0 0 608000000 19200000 608000000
clock-rate = <0 0 0 506666667 19200000 506666667 19200000>;
clock-max-rate = <0 0 0 608000000 19200000 608000000
608000000>;
/* interrupt config */

3
display/yupik-sde.dtsi
View file

@ -47,7 +47,6 @@
&mdss_mdp {
clocks =
<&gcc GCC_DISP_AHB_CLK>,
<&gcc GCC_DISP_HF_AXI_CLK>,
<&gcc GCC_DISP_SF_AXI_CLK>,
<&dispcc DISP_CC_MDSS_AHB_CLK>,
@ -55,7 +54,7 @@
<&dispcc DISP_CC_MDSS_VSYNC_CLK>,
<&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
<&dispcc DISP_CC_MDSS_ROT_CLK>;
clock-names = "gcc_iface", "gcc_bus", "gcc_nrt_bus",
clock-names = "gcc_bus", "gcc_nrt_bus",
"iface_clk", "core_clk", "vsync_clk",
"lut_clk", "rot_clk";